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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [sim/] [cris/] [cpuv32.c] - Blame information for rev 247

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Line No. Rev Author Line
1 227 jeremybenn
/* Misc. support for CPU family crisv32f.
2
 
3
THIS FILE IS MACHINE GENERATED WITH CGEN.
4
 
5
Copyright 1996-2010 Free Software Foundation, Inc.
6
 
7
This file is part of the GNU simulators.
8
 
9
   This file is free software; you can redistribute it and/or modify
10
   it under the terms of the GNU General Public License as published by
11
   the Free Software Foundation; either version 3, or (at your option)
12
   any later version.
13
 
14
   It is distributed in the hope that it will be useful, but WITHOUT
15
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
17
   License for more details.
18
 
19
   You should have received a copy of the GNU General Public License along
20
   with this program; if not, write to the Free Software Foundation, Inc.,
21
   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
22
 
23
*/
24
 
25
#define WANT_CPU crisv32f
26
#define WANT_CPU_CRISV32F
27
 
28
#include "sim-main.h"
29
#include "cgen-ops.h"
30
 
31
/* Get the value of h-v32-v32.  */
32
 
33
BI
34
crisv32f_h_v32_v32_get (SIM_CPU *current_cpu)
35
{
36
  return GET_H_V32_V32 ();
37
}
38
 
39
/* Set a value for h-v32-v32.  */
40
 
41
void
42
crisv32f_h_v32_v32_set (SIM_CPU *current_cpu, BI newval)
43
{
44
  SET_H_V32_V32 (newval);
45
}
46
 
47
/* Get the value of h-pc.  */
48
 
49
USI
50
crisv32f_h_pc_get (SIM_CPU *current_cpu)
51
{
52
  return CPU (h_pc);
53
}
54
 
55
/* Set a value for h-pc.  */
56
 
57
void
58
crisv32f_h_pc_set (SIM_CPU *current_cpu, USI newval)
59
{
60
  SET_H_PC (newval);
61
}
62
 
63
/* Get the value of h-gr.  */
64
 
65
SI
66
crisv32f_h_gr_get (SIM_CPU *current_cpu, UINT regno)
67
{
68
  return GET_H_GR (regno);
69
}
70
 
71
/* Set a value for h-gr.  */
72
 
73
void
74
crisv32f_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
75
{
76
  SET_H_GR (regno, newval);
77
}
78
 
79
/* Get the value of h-gr-acr.  */
80
 
81
SI
82
crisv32f_h_gr_acr_get (SIM_CPU *current_cpu, UINT regno)
83
{
84
  return CPU (h_gr_acr[regno]);
85
}
86
 
87
/* Set a value for h-gr-acr.  */
88
 
89
void
90
crisv32f_h_gr_acr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
91
{
92
  CPU (h_gr_acr[regno]) = newval;
93
}
94
 
95
/* Get the value of h-raw-gr-acr.  */
96
 
97
SI
98
crisv32f_h_raw_gr_acr_get (SIM_CPU *current_cpu, UINT regno)
99
{
100
  return GET_H_RAW_GR_ACR (regno);
101
}
102
 
103
/* Set a value for h-raw-gr-acr.  */
104
 
105
void
106
crisv32f_h_raw_gr_acr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
107
{
108
  SET_H_RAW_GR_ACR (regno, newval);
109
}
110
 
111
/* Get the value of h-sr.  */
112
 
113
SI
114
crisv32f_h_sr_get (SIM_CPU *current_cpu, UINT regno)
115
{
116
  return GET_H_SR (regno);
117
}
118
 
119
/* Set a value for h-sr.  */
120
 
121
void
122
crisv32f_h_sr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
123
{
124
  SET_H_SR (regno, newval);
125
}
126
 
127
/* Get the value of h-sr-v32.  */
128
 
129
SI
130
crisv32f_h_sr_v32_get (SIM_CPU *current_cpu, UINT regno)
131
{
132
  return GET_H_SR_V32 (regno);
133
}
134
 
135
/* Set a value for h-sr-v32.  */
136
 
137
void
138
crisv32f_h_sr_v32_set (SIM_CPU *current_cpu, UINT regno, SI newval)
139
{
140
  SET_H_SR_V32 (regno, newval);
141
}
142
 
143
/* Get the value of h-supr.  */
144
 
145
SI
146
crisv32f_h_supr_get (SIM_CPU *current_cpu, UINT regno)
147
{
148
  return GET_H_SUPR (regno);
149
}
150
 
151
/* Set a value for h-supr.  */
152
 
153
void
154
crisv32f_h_supr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
155
{
156
  SET_H_SUPR (regno, newval);
157
}
158
 
159
/* Get the value of h-cbit.  */
160
 
161
BI
162
crisv32f_h_cbit_get (SIM_CPU *current_cpu)
163
{
164
  return CPU (h_cbit);
165
}
166
 
167
/* Set a value for h-cbit.  */
168
 
169
void
170
crisv32f_h_cbit_set (SIM_CPU *current_cpu, BI newval)
171
{
172
  CPU (h_cbit) = newval;
173
}
174
 
175
/* Get the value of h-cbit-move.  */
176
 
177
BI
178
crisv32f_h_cbit_move_get (SIM_CPU *current_cpu)
179
{
180
  return GET_H_CBIT_MOVE ();
181
}
182
 
183
/* Set a value for h-cbit-move.  */
184
 
185
void
186
crisv32f_h_cbit_move_set (SIM_CPU *current_cpu, BI newval)
187
{
188
  SET_H_CBIT_MOVE (newval);
189
}
190
 
191
/* Get the value of h-cbit-move-v32.  */
192
 
193
BI
194
crisv32f_h_cbit_move_v32_get (SIM_CPU *current_cpu)
195
{
196
  return GET_H_CBIT_MOVE_V32 ();
197
}
198
 
199
/* Set a value for h-cbit-move-v32.  */
200
 
201
void
202
crisv32f_h_cbit_move_v32_set (SIM_CPU *current_cpu, BI newval)
203
{
204
  SET_H_CBIT_MOVE_V32 (newval);
205
}
206
 
207
/* Get the value of h-vbit.  */
208
 
209
BI
210
crisv32f_h_vbit_get (SIM_CPU *current_cpu)
211
{
212
  return CPU (h_vbit);
213
}
214
 
215
/* Set a value for h-vbit.  */
216
 
217
void
218
crisv32f_h_vbit_set (SIM_CPU *current_cpu, BI newval)
219
{
220
  CPU (h_vbit) = newval;
221
}
222
 
223
/* Get the value of h-vbit-move.  */
224
 
225
BI
226
crisv32f_h_vbit_move_get (SIM_CPU *current_cpu)
227
{
228
  return GET_H_VBIT_MOVE ();
229
}
230
 
231
/* Set a value for h-vbit-move.  */
232
 
233
void
234
crisv32f_h_vbit_move_set (SIM_CPU *current_cpu, BI newval)
235
{
236
  SET_H_VBIT_MOVE (newval);
237
}
238
 
239
/* Get the value of h-vbit-move-v32.  */
240
 
241
BI
242
crisv32f_h_vbit_move_v32_get (SIM_CPU *current_cpu)
243
{
244
  return GET_H_VBIT_MOVE_V32 ();
245
}
246
 
247
/* Set a value for h-vbit-move-v32.  */
248
 
249
void
250
crisv32f_h_vbit_move_v32_set (SIM_CPU *current_cpu, BI newval)
251
{
252
  SET_H_VBIT_MOVE_V32 (newval);
253
}
254
 
255
/* Get the value of h-zbit.  */
256
 
257
BI
258
crisv32f_h_zbit_get (SIM_CPU *current_cpu)
259
{
260
  return CPU (h_zbit);
261
}
262
 
263
/* Set a value for h-zbit.  */
264
 
265
void
266
crisv32f_h_zbit_set (SIM_CPU *current_cpu, BI newval)
267
{
268
  CPU (h_zbit) = newval;
269
}
270
 
271
/* Get the value of h-zbit-move.  */
272
 
273
BI
274
crisv32f_h_zbit_move_get (SIM_CPU *current_cpu)
275
{
276
  return GET_H_ZBIT_MOVE ();
277
}
278
 
279
/* Set a value for h-zbit-move.  */
280
 
281
void
282
crisv32f_h_zbit_move_set (SIM_CPU *current_cpu, BI newval)
283
{
284
  SET_H_ZBIT_MOVE (newval);
285
}
286
 
287
/* Get the value of h-zbit-move-v32.  */
288
 
289
BI
290
crisv32f_h_zbit_move_v32_get (SIM_CPU *current_cpu)
291
{
292
  return GET_H_ZBIT_MOVE_V32 ();
293
}
294
 
295
/* Set a value for h-zbit-move-v32.  */
296
 
297
void
298
crisv32f_h_zbit_move_v32_set (SIM_CPU *current_cpu, BI newval)
299
{
300
  SET_H_ZBIT_MOVE_V32 (newval);
301
}
302
 
303
/* Get the value of h-nbit.  */
304
 
305
BI
306
crisv32f_h_nbit_get (SIM_CPU *current_cpu)
307
{
308
  return CPU (h_nbit);
309
}
310
 
311
/* Set a value for h-nbit.  */
312
 
313
void
314
crisv32f_h_nbit_set (SIM_CPU *current_cpu, BI newval)
315
{
316
  CPU (h_nbit) = newval;
317
}
318
 
319
/* Get the value of h-nbit-move.  */
320
 
321
BI
322
crisv32f_h_nbit_move_get (SIM_CPU *current_cpu)
323
{
324
  return GET_H_NBIT_MOVE ();
325
}
326
 
327
/* Set a value for h-nbit-move.  */
328
 
329
void
330
crisv32f_h_nbit_move_set (SIM_CPU *current_cpu, BI newval)
331
{
332
  SET_H_NBIT_MOVE (newval);
333
}
334
 
335
/* Get the value of h-nbit-move-v32.  */
336
 
337
BI
338
crisv32f_h_nbit_move_v32_get (SIM_CPU *current_cpu)
339
{
340
  return GET_H_NBIT_MOVE_V32 ();
341
}
342
 
343
/* Set a value for h-nbit-move-v32.  */
344
 
345
void
346
crisv32f_h_nbit_move_v32_set (SIM_CPU *current_cpu, BI newval)
347
{
348
  SET_H_NBIT_MOVE_V32 (newval);
349
}
350
 
351
/* Get the value of h-xbit.  */
352
 
353
BI
354
crisv32f_h_xbit_get (SIM_CPU *current_cpu)
355
{
356
  return CPU (h_xbit);
357
}
358
 
359
/* Set a value for h-xbit.  */
360
 
361
void
362
crisv32f_h_xbit_set (SIM_CPU *current_cpu, BI newval)
363
{
364
  CPU (h_xbit) = newval;
365
}
366
 
367
/* Get the value of h-ibit.  */
368
 
369
BI
370
crisv32f_h_ibit_get (SIM_CPU *current_cpu)
371
{
372
  return GET_H_IBIT ();
373
}
374
 
375
/* Set a value for h-ibit.  */
376
 
377
void
378
crisv32f_h_ibit_set (SIM_CPU *current_cpu, BI newval)
379
{
380
  SET_H_IBIT (newval);
381
}
382
 
383
/* Get the value of h-pbit.  */
384
 
385
BI
386
crisv32f_h_pbit_get (SIM_CPU *current_cpu)
387
{
388
  return CPU (h_pbit);
389
}
390
 
391
/* Set a value for h-pbit.  */
392
 
393
void
394
crisv32f_h_pbit_set (SIM_CPU *current_cpu, BI newval)
395
{
396
  CPU (h_pbit) = newval;
397
}
398
 
399
/* Get the value of h-rbit.  */
400
 
401
BI
402
crisv32f_h_rbit_get (SIM_CPU *current_cpu)
403
{
404
  return CPU (h_rbit);
405
}
406
 
407
/* Set a value for h-rbit.  */
408
 
409
void
410
crisv32f_h_rbit_set (SIM_CPU *current_cpu, BI newval)
411
{
412
  CPU (h_rbit) = newval;
413
}
414
 
415
/* Get the value of h-ubit.  */
416
 
417
BI
418
crisv32f_h_ubit_get (SIM_CPU *current_cpu)
419
{
420
  return GET_H_UBIT ();
421
}
422
 
423
/* Set a value for h-ubit.  */
424
 
425
void
426
crisv32f_h_ubit_set (SIM_CPU *current_cpu, BI newval)
427
{
428
  SET_H_UBIT (newval);
429
}
430
 
431
/* Get the value of h-gbit.  */
432
 
433
BI
434
crisv32f_h_gbit_get (SIM_CPU *current_cpu)
435
{
436
  return CPU (h_gbit);
437
}
438
 
439
/* Set a value for h-gbit.  */
440
 
441
void
442
crisv32f_h_gbit_set (SIM_CPU *current_cpu, BI newval)
443
{
444
  CPU (h_gbit) = newval;
445
}
446
 
447
/* Get the value of h-kernel-sp.  */
448
 
449
SI
450
crisv32f_h_kernel_sp_get (SIM_CPU *current_cpu)
451
{
452
  return CPU (h_kernel_sp);
453
}
454
 
455
/* Set a value for h-kernel-sp.  */
456
 
457
void
458
crisv32f_h_kernel_sp_set (SIM_CPU *current_cpu, SI newval)
459
{
460
  CPU (h_kernel_sp) = newval;
461
}
462
 
463
/* Get the value of h-ubit-v32.  */
464
 
465
BI
466
crisv32f_h_ubit_v32_get (SIM_CPU *current_cpu)
467
{
468
  return CPU (h_ubit_v32);
469
}
470
 
471
/* Set a value for h-ubit-v32.  */
472
 
473
void
474
crisv32f_h_ubit_v32_set (SIM_CPU *current_cpu, BI newval)
475
{
476
  SET_H_UBIT_V32 (newval);
477
}
478
 
479
/* Get the value of h-ibit-v32.  */
480
 
481
BI
482
crisv32f_h_ibit_v32_get (SIM_CPU *current_cpu)
483
{
484
  return CPU (h_ibit_v32);
485
}
486
 
487
/* Set a value for h-ibit-v32.  */
488
 
489
void
490
crisv32f_h_ibit_v32_set (SIM_CPU *current_cpu, BI newval)
491
{
492
  SET_H_IBIT_V32 (newval);
493
}
494
 
495
/* Get the value of h-mbit.  */
496
 
497
BI
498
crisv32f_h_mbit_get (SIM_CPU *current_cpu)
499
{
500
  return CPU (h_mbit);
501
}
502
 
503
/* Set a value for h-mbit.  */
504
 
505
void
506
crisv32f_h_mbit_set (SIM_CPU *current_cpu, BI newval)
507
{
508
  SET_H_MBIT (newval);
509
}
510
 
511
/* Get the value of h-qbit.  */
512
 
513
BI
514
crisv32f_h_qbit_get (SIM_CPU *current_cpu)
515
{
516
  return CPU (h_qbit);
517
}
518
 
519
/* Set a value for h-qbit.  */
520
 
521
void
522
crisv32f_h_qbit_set (SIM_CPU *current_cpu, BI newval)
523
{
524
  SET_H_QBIT (newval);
525
}
526
 
527
/* Get the value of h-sbit.  */
528
 
529
BI
530
crisv32f_h_sbit_get (SIM_CPU *current_cpu)
531
{
532
  return CPU (h_sbit);
533
}
534
 
535
/* Set a value for h-sbit.  */
536
 
537
void
538
crisv32f_h_sbit_set (SIM_CPU *current_cpu, BI newval)
539
{
540
  SET_H_SBIT (newval);
541
}
542
 
543
/* Get the value of h-insn-prefixed-p.  */
544
 
545
BI
546
crisv32f_h_insn_prefixed_p_get (SIM_CPU *current_cpu)
547
{
548
  return GET_H_INSN_PREFIXED_P ();
549
}
550
 
551
/* Set a value for h-insn-prefixed-p.  */
552
 
553
void
554
crisv32f_h_insn_prefixed_p_set (SIM_CPU *current_cpu, BI newval)
555
{
556
  SET_H_INSN_PREFIXED_P (newval);
557
}
558
 
559
/* Get the value of h-insn-prefixed-p-v32.  */
560
 
561
BI
562
crisv32f_h_insn_prefixed_p_v32_get (SIM_CPU *current_cpu)
563
{
564
  return GET_H_INSN_PREFIXED_P_V32 ();
565
}
566
 
567
/* Set a value for h-insn-prefixed-p-v32.  */
568
 
569
void
570
crisv32f_h_insn_prefixed_p_v32_set (SIM_CPU *current_cpu, BI newval)
571
{
572
  SET_H_INSN_PREFIXED_P_V32 (newval);
573
}
574
 
575
/* Get the value of h-prefixreg-v32.  */
576
 
577
SI
578
crisv32f_h_prefixreg_v32_get (SIM_CPU *current_cpu)
579
{
580
  return GET_H_PREFIXREG_V32 ();
581
}
582
 
583
/* Set a value for h-prefixreg-v32.  */
584
 
585
void
586
crisv32f_h_prefixreg_v32_set (SIM_CPU *current_cpu, SI newval)
587
{
588
  SET_H_PREFIXREG_V32 (newval);
589
}
590
 
591
/* Record trace results for INSN.  */
592
 
593
void
594
crisv32f_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
595
                            int *indices, TRACE_RECORD *tr)
596
{
597
}

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