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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [sim/] [m32r/] [cpu.c] - Blame information for rev 375

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/* Misc. support for CPU family m32rbf.
 
THIS FILE IS MACHINE GENERATED WITH CGEN.
 
Copyright 1996-2010 Free Software Foundation, Inc.
 
This file is part of the GNU simulators.
 
   This file is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3, or (at your option)
   any later version.
 
   It is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.
 
   You should have received a copy of the GNU General Public License along
   with this program; if not, write to the Free Software Foundation, Inc.,
   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
*/
 
#define WANT_CPU m32rbf
#define WANT_CPU_M32RBF
 
#include "sim-main.h"
#include "cgen-ops.h"
 
/* Get the value of h-pc.  */
 
USI
m32rbf_h_pc_get (SIM_CPU *current_cpu)
{
  return CPU (h_pc);
}
 
/* Set a value for h-pc.  */
 
void
m32rbf_h_pc_set (SIM_CPU *current_cpu, USI newval)
{
  CPU (h_pc) = newval;
}
 
/* Get the value of h-gr.  */
 
SI
m32rbf_h_gr_get (SIM_CPU *current_cpu, UINT regno)
{
  return CPU (h_gr[regno]);
}
 
/* Set a value for h-gr.  */
 
void
m32rbf_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
{
  CPU (h_gr[regno]) = newval;
}
 
/* Get the value of h-cr.  */
 
USI
m32rbf_h_cr_get (SIM_CPU *current_cpu, UINT regno)
{
  return GET_H_CR (regno);
}
 
/* Set a value for h-cr.  */
 
void
m32rbf_h_cr_set (SIM_CPU *current_cpu, UINT regno, USI newval)
{
  SET_H_CR (regno, newval);
}
 
/* Get the value of h-accum.  */
 
DI
m32rbf_h_accum_get (SIM_CPU *current_cpu)
{
  return GET_H_ACCUM ();
}
 
/* Set a value for h-accum.  */
 
void
m32rbf_h_accum_set (SIM_CPU *current_cpu, DI newval)
{
  SET_H_ACCUM (newval);
}
 
/* Get the value of h-cond.  */
 
BI
m32rbf_h_cond_get (SIM_CPU *current_cpu)
{
  return CPU (h_cond);
}
 
/* Set a value for h-cond.  */
 
void
m32rbf_h_cond_set (SIM_CPU *current_cpu, BI newval)
{
  CPU (h_cond) = newval;
}
 
/* Get the value of h-psw.  */
 
UQI
m32rbf_h_psw_get (SIM_CPU *current_cpu)
{
  return GET_H_PSW ();
}
 
/* Set a value for h-psw.  */
 
void
m32rbf_h_psw_set (SIM_CPU *current_cpu, UQI newval)
{
  SET_H_PSW (newval);
}
 
/* Get the value of h-bpsw.  */
 
UQI
m32rbf_h_bpsw_get (SIM_CPU *current_cpu)
{
  return CPU (h_bpsw);
}
 
/* Set a value for h-bpsw.  */
 
void
m32rbf_h_bpsw_set (SIM_CPU *current_cpu, UQI newval)
{
  CPU (h_bpsw) = newval;
}
 
/* Get the value of h-bbpsw.  */
 
UQI
m32rbf_h_bbpsw_get (SIM_CPU *current_cpu)
{
  return CPU (h_bbpsw);
}
 
/* Set a value for h-bbpsw.  */
 
void
m32rbf_h_bbpsw_set (SIM_CPU *current_cpu, UQI newval)
{
  CPU (h_bbpsw) = newval;
}
 
/* Get the value of h-lock.  */
 
BI
m32rbf_h_lock_get (SIM_CPU *current_cpu)
{
  return CPU (h_lock);
}
 
/* Set a value for h-lock.  */
 
void
m32rbf_h_lock_set (SIM_CPU *current_cpu, BI newval)
{
  CPU (h_lock) = newval;
}
 
/* Record trace results for INSN.  */
 
void
m32rbf_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
                            int *indices, TRACE_RECORD *tr)
{
}

Line No.	Rev	Author	Line
1	227	jeremybenn	`/* Misc. support for CPU family m32rbf.`
2
3			`THIS FILE IS MACHINE GENERATED WITH CGEN.`
4
5			`Copyright 1996-2010 Free Software Foundation, Inc.`
6
7			`This file is part of the GNU simulators.`
8
9			`This file is free software; you can redistribute it and/or modify`
10			`it under the terms of the GNU General Public License as published by`
11			`the Free Software Foundation; either version 3, or (at your option)`
12			`any later version.`
13
14			`It is distributed in the hope that it will be useful, but WITHOUT`
15			`ANY WARRANTY; without even the implied warranty of MERCHANTABILITY`
16			`or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public`
17			`License for more details.`
18
19			`You should have received a copy of the GNU General Public License along`
20			`with this program; if not, write to the Free Software Foundation, Inc.,`
21			`51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.`
22
23			`*/`
24
25			`#define WANT_CPU m32rbf`
26			`#define WANT_CPU_M32RBF`
27
28			`#include "sim-main.h"`
29			`#include "cgen-ops.h"`
30
31			`/* Get the value of h-pc. */`
32
33			`USI`
34			`m32rbf_h_pc_get (SIM_CPU *current_cpu)`
35			`{`
36			`return CPU (h_pc);`
37			`}`
38
39			`/* Set a value for h-pc. */`
40
41			`void`
42			`m32rbf_h_pc_set (SIM_CPU *current_cpu, USI newval)`
43			`{`
44			`CPU (h_pc) = newval;`
45			`}`
46
47			`/* Get the value of h-gr. */`
48
49			`SI`
50			`m32rbf_h_gr_get (SIM_CPU *current_cpu, UINT regno)`
51			`{`
52			`return CPU (h_gr[regno]);`
53			`}`
54
55			`/* Set a value for h-gr. */`
56
57			`void`
58			`m32rbf_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)`
59			`{`
60			`CPU (h_gr[regno]) = newval;`
61			`}`
62
63			`/* Get the value of h-cr. */`
64
65			`USI`
66			`m32rbf_h_cr_get (SIM_CPU *current_cpu, UINT regno)`
67			`{`
68			`return GET_H_CR (regno);`
69			`}`
70
71			`/* Set a value for h-cr. */`
72
73			`void`
74			`m32rbf_h_cr_set (SIM_CPU *current_cpu, UINT regno, USI newval)`
75			`{`
76			`SET_H_CR (regno, newval);`
77			`}`
78
79			`/* Get the value of h-accum. */`
80
81			`DI`
82			`m32rbf_h_accum_get (SIM_CPU *current_cpu)`
83			`{`
84			`return GET_H_ACCUM ();`
85			`}`
86
87			`/* Set a value for h-accum. */`
88
89			`void`
90			`m32rbf_h_accum_set (SIM_CPU *current_cpu, DI newval)`
91			`{`
92			`SET_H_ACCUM (newval);`
93			`}`
94
95			`/* Get the value of h-cond. */`
96
97			`BI`
98			`m32rbf_h_cond_get (SIM_CPU *current_cpu)`
99			`{`
100			`return CPU (h_cond);`
101			`}`
102
103			`/* Set a value for h-cond. */`
104
105			`void`
106			`m32rbf_h_cond_set (SIM_CPU *current_cpu, BI newval)`
107			`{`
108			`CPU (h_cond) = newval;`
109			`}`
110
111			`/* Get the value of h-psw. */`
112
113			`UQI`
114			`m32rbf_h_psw_get (SIM_CPU *current_cpu)`
115			`{`
116			`return GET_H_PSW ();`
117			`}`
118
119			`/* Set a value for h-psw. */`
120
121			`void`
122			`m32rbf_h_psw_set (SIM_CPU *current_cpu, UQI newval)`
123			`{`
124			`SET_H_PSW (newval);`
125			`}`
126
127			`/* Get the value of h-bpsw. */`
128
129			`UQI`
130			`m32rbf_h_bpsw_get (SIM_CPU *current_cpu)`
131			`{`
132			`return CPU (h_bpsw);`
133			`}`
134
135			`/* Set a value for h-bpsw. */`
136
137			`void`
138			`m32rbf_h_bpsw_set (SIM_CPU *current_cpu, UQI newval)`
139			`{`
140			`CPU (h_bpsw) = newval;`
141			`}`
142
143			`/* Get the value of h-bbpsw. */`
144
145			`UQI`
146			`m32rbf_h_bbpsw_get (SIM_CPU *current_cpu)`
147			`{`
148			`return CPU (h_bbpsw);`
149			`}`
150
151			`/* Set a value for h-bbpsw. */`
152
153			`void`
154			`m32rbf_h_bbpsw_set (SIM_CPU *current_cpu, UQI newval)`
155			`{`
156			`CPU (h_bbpsw) = newval;`
157			`}`
158
159			`/* Get the value of h-lock. */`
160
161			`BI`
162			`m32rbf_h_lock_get (SIM_CPU *current_cpu)`
163			`{`
164			`return CPU (h_lock);`
165			`}`
166
167			`/* Set a value for h-lock. */`
168
169			`void`
170			`m32rbf_h_lock_set (SIM_CPU *current_cpu, BI newval)`
171			`{`
172			`CPU (h_lock) = newval;`
173			`}`
174
175			`/* Record trace results for INSN. */`
176
177			`void`
178			`m32rbf_record_trace_results (SIM_CPU current_cpu, CGEN_INSN insn,`
179			`int indices, TRACE_RECORD tr)`
180			`{`
181			`}`

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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [sim/] [m32r/] [cpu.c] - Blame information for rev 375