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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [sim/] [mips/] [tconfig.in] - Blame information for rev 252

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Line No. Rev Author Line
1 227 jeremybenn
/* mips target configuration file.  */
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/* See sim-hload.c.  We properly handle LMA.  */
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#ifdef TARGET_TX3904
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#define SIM_HANDLES_LMA 1
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/* FIXME: This is unnecessarily necessary: */
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#include "ansidecl.h"
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#include "gdb/callback.h"
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#include "gdb/remote-sim.h"
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#include "sim-module.h"
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MODULE_INSTALL_FN dv_sockser_install;
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#define MODULE_LIST dv_sockser_install,
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#else
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#define SIM_HANDLES_LMA 0
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#endif
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/* Define this if the simulator supports profiling.
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   See the mips simulator for an example.
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   This enables the `-p foo' and `-s bar' options.
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   The target is required to provide sim_set_profile{,_size}.  */
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#define SIM_HAVE_PROFILE
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/* Define this if the simulator uses an instruction cache.
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   See the h8/300 simulator for an example.
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   This enables the `-c size' option to set the size of the cache.
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   The target is required to provide sim_set_simcache_size.  */
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/* #define SIM_HAVE_SIMCACHE */
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/* Define this if the target cpu is bi-endian
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   and the simulator supports it.  */
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#define SIM_HAVE_BIENDIAN
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/* MIPS uses an unusual format for floating point quiet NaNs.  */
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#define SIM_QUIET_NAN_NEGATED

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