OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [sim/] [sh64/] [cpu.c] - Blame information for rev 355

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 227 jeremybenn
/* Misc. support for CPU family sh64.
2
 
3
THIS FILE IS MACHINE GENERATED WITH CGEN.
4
 
5
Copyright 1996-2010 Free Software Foundation, Inc.
6
 
7
This file is part of the GNU simulators.
8
 
9
   This file is free software; you can redistribute it and/or modify
10
   it under the terms of the GNU General Public License as published by
11
   the Free Software Foundation; either version 3, or (at your option)
12
   any later version.
13
 
14
   It is distributed in the hope that it will be useful, but WITHOUT
15
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
17
   License for more details.
18
 
19
   You should have received a copy of the GNU General Public License along
20
   with this program; if not, write to the Free Software Foundation, Inc.,
21
   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
22
 
23
*/
24
 
25
#define WANT_CPU sh64
26
#define WANT_CPU_SH64
27
 
28
#include "sim-main.h"
29
#include "cgen-ops.h"
30
 
31
/* Get the value of h-pc.  */
32
 
33
UDI
34
sh64_h_pc_get (SIM_CPU *current_cpu)
35
{
36
  return GET_H_PC ();
37
}
38
 
39
/* Set a value for h-pc.  */
40
 
41
void
42
sh64_h_pc_set (SIM_CPU *current_cpu, UDI newval)
43
{
44
  SET_H_PC (newval);
45
}
46
 
47
/* Get the value of h-gr.  */
48
 
49
DI
50
sh64_h_gr_get (SIM_CPU *current_cpu, UINT regno)
51
{
52
  return GET_H_GR (regno);
53
}
54
 
55
/* Set a value for h-gr.  */
56
 
57
void
58
sh64_h_gr_set (SIM_CPU *current_cpu, UINT regno, DI newval)
59
{
60
  SET_H_GR (regno, newval);
61
}
62
 
63
/* Get the value of h-grc.  */
64
 
65
SI
66
sh64_h_grc_get (SIM_CPU *current_cpu, UINT regno)
67
{
68
  return GET_H_GRC (regno);
69
}
70
 
71
/* Set a value for h-grc.  */
72
 
73
void
74
sh64_h_grc_set (SIM_CPU *current_cpu, UINT regno, SI newval)
75
{
76
  SET_H_GRC (regno, newval);
77
}
78
 
79
/* Get the value of h-cr.  */
80
 
81
DI
82
sh64_h_cr_get (SIM_CPU *current_cpu, UINT regno)
83
{
84
  return GET_H_CR (regno);
85
}
86
 
87
/* Set a value for h-cr.  */
88
 
89
void
90
sh64_h_cr_set (SIM_CPU *current_cpu, UINT regno, DI newval)
91
{
92
  SET_H_CR (regno, newval);
93
}
94
 
95
/* Get the value of h-sr.  */
96
 
97
SI
98
sh64_h_sr_get (SIM_CPU *current_cpu)
99
{
100
  return CPU (h_sr);
101
}
102
 
103
/* Set a value for h-sr.  */
104
 
105
void
106
sh64_h_sr_set (SIM_CPU *current_cpu, SI newval)
107
{
108
  CPU (h_sr) = newval;
109
}
110
 
111
/* Get the value of h-fpscr.  */
112
 
113
SI
114
sh64_h_fpscr_get (SIM_CPU *current_cpu)
115
{
116
  return CPU (h_fpscr);
117
}
118
 
119
/* Set a value for h-fpscr.  */
120
 
121
void
122
sh64_h_fpscr_set (SIM_CPU *current_cpu, SI newval)
123
{
124
  CPU (h_fpscr) = newval;
125
}
126
 
127
/* Get the value of h-frbit.  */
128
 
129
BI
130
sh64_h_frbit_get (SIM_CPU *current_cpu)
131
{
132
  return GET_H_FRBIT ();
133
}
134
 
135
/* Set a value for h-frbit.  */
136
 
137
void
138
sh64_h_frbit_set (SIM_CPU *current_cpu, BI newval)
139
{
140
  SET_H_FRBIT (newval);
141
}
142
 
143
/* Get the value of h-szbit.  */
144
 
145
BI
146
sh64_h_szbit_get (SIM_CPU *current_cpu)
147
{
148
  return GET_H_SZBIT ();
149
}
150
 
151
/* Set a value for h-szbit.  */
152
 
153
void
154
sh64_h_szbit_set (SIM_CPU *current_cpu, BI newval)
155
{
156
  SET_H_SZBIT (newval);
157
}
158
 
159
/* Get the value of h-prbit.  */
160
 
161
BI
162
sh64_h_prbit_get (SIM_CPU *current_cpu)
163
{
164
  return GET_H_PRBIT ();
165
}
166
 
167
/* Set a value for h-prbit.  */
168
 
169
void
170
sh64_h_prbit_set (SIM_CPU *current_cpu, BI newval)
171
{
172
  SET_H_PRBIT (newval);
173
}
174
 
175
/* Get the value of h-sbit.  */
176
 
177
BI
178
sh64_h_sbit_get (SIM_CPU *current_cpu)
179
{
180
  return GET_H_SBIT ();
181
}
182
 
183
/* Set a value for h-sbit.  */
184
 
185
void
186
sh64_h_sbit_set (SIM_CPU *current_cpu, BI newval)
187
{
188
  SET_H_SBIT (newval);
189
}
190
 
191
/* Get the value of h-mbit.  */
192
 
193
BI
194
sh64_h_mbit_get (SIM_CPU *current_cpu)
195
{
196
  return GET_H_MBIT ();
197
}
198
 
199
/* Set a value for h-mbit.  */
200
 
201
void
202
sh64_h_mbit_set (SIM_CPU *current_cpu, BI newval)
203
{
204
  SET_H_MBIT (newval);
205
}
206
 
207
/* Get the value of h-qbit.  */
208
 
209
BI
210
sh64_h_qbit_get (SIM_CPU *current_cpu)
211
{
212
  return GET_H_QBIT ();
213
}
214
 
215
/* Set a value for h-qbit.  */
216
 
217
void
218
sh64_h_qbit_set (SIM_CPU *current_cpu, BI newval)
219
{
220
  SET_H_QBIT (newval);
221
}
222
 
223
/* Get the value of h-fr.  */
224
 
225
SF
226
sh64_h_fr_get (SIM_CPU *current_cpu, UINT regno)
227
{
228
  return CPU (h_fr[regno]);
229
}
230
 
231
/* Set a value for h-fr.  */
232
 
233
void
234
sh64_h_fr_set (SIM_CPU *current_cpu, UINT regno, SF newval)
235
{
236
  CPU (h_fr[regno]) = newval;
237
}
238
 
239
/* Get the value of h-fp.  */
240
 
241
SF
242
sh64_h_fp_get (SIM_CPU *current_cpu, UINT regno)
243
{
244
  return GET_H_FP (regno);
245
}
246
 
247
/* Set a value for h-fp.  */
248
 
249
void
250
sh64_h_fp_set (SIM_CPU *current_cpu, UINT regno, SF newval)
251
{
252
  SET_H_FP (regno, newval);
253
}
254
 
255
/* Get the value of h-fv.  */
256
 
257
SF
258
sh64_h_fv_get (SIM_CPU *current_cpu, UINT regno)
259
{
260
  return GET_H_FV (regno);
261
}
262
 
263
/* Set a value for h-fv.  */
264
 
265
void
266
sh64_h_fv_set (SIM_CPU *current_cpu, UINT regno, SF newval)
267
{
268
  SET_H_FV (regno, newval);
269
}
270
 
271
/* Get the value of h-fmtx.  */
272
 
273
SF
274
sh64_h_fmtx_get (SIM_CPU *current_cpu, UINT regno)
275
{
276
  return GET_H_FMTX (regno);
277
}
278
 
279
/* Set a value for h-fmtx.  */
280
 
281
void
282
sh64_h_fmtx_set (SIM_CPU *current_cpu, UINT regno, SF newval)
283
{
284
  SET_H_FMTX (regno, newval);
285
}
286
 
287
/* Get the value of h-dr.  */
288
 
289
DF
290
sh64_h_dr_get (SIM_CPU *current_cpu, UINT regno)
291
{
292
  return GET_H_DR (regno);
293
}
294
 
295
/* Set a value for h-dr.  */
296
 
297
void
298
sh64_h_dr_set (SIM_CPU *current_cpu, UINT regno, DF newval)
299
{
300
  SET_H_DR (regno, newval);
301
}
302
 
303
/* Get the value of h-fsd.  */
304
 
305
DF
306
sh64_h_fsd_get (SIM_CPU *current_cpu, UINT regno)
307
{
308
  return GET_H_FSD (regno);
309
}
310
 
311
/* Set a value for h-fsd.  */
312
 
313
void
314
sh64_h_fsd_set (SIM_CPU *current_cpu, UINT regno, DF newval)
315
{
316
  SET_H_FSD (regno, newval);
317
}
318
 
319
/* Get the value of h-fmov.  */
320
 
321
DF
322
sh64_h_fmov_get (SIM_CPU *current_cpu, UINT regno)
323
{
324
  return GET_H_FMOV (regno);
325
}
326
 
327
/* Set a value for h-fmov.  */
328
 
329
void
330
sh64_h_fmov_set (SIM_CPU *current_cpu, UINT regno, DF newval)
331
{
332
  SET_H_FMOV (regno, newval);
333
}
334
 
335
/* Get the value of h-tr.  */
336
 
337
DI
338
sh64_h_tr_get (SIM_CPU *current_cpu, UINT regno)
339
{
340
  return CPU (h_tr[regno]);
341
}
342
 
343
/* Set a value for h-tr.  */
344
 
345
void
346
sh64_h_tr_set (SIM_CPU *current_cpu, UINT regno, DI newval)
347
{
348
  CPU (h_tr[regno]) = newval;
349
}
350
 
351
/* Get the value of h-endian.  */
352
 
353
BI
354
sh64_h_endian_get (SIM_CPU *current_cpu)
355
{
356
  return GET_H_ENDIAN ();
357
}
358
 
359
/* Set a value for h-endian.  */
360
 
361
void
362
sh64_h_endian_set (SIM_CPU *current_cpu, BI newval)
363
{
364
  SET_H_ENDIAN (newval);
365
}
366
 
367
/* Get the value of h-ism.  */
368
 
369
BI
370
sh64_h_ism_get (SIM_CPU *current_cpu)
371
{
372
  return GET_H_ISM ();
373
}
374
 
375
/* Set a value for h-ism.  */
376
 
377
void
378
sh64_h_ism_set (SIM_CPU *current_cpu, BI newval)
379
{
380
  SET_H_ISM (newval);
381
}
382
 
383
/* Get the value of h-frc.  */
384
 
385
SF
386
sh64_h_frc_get (SIM_CPU *current_cpu, UINT regno)
387
{
388
  return GET_H_FRC (regno);
389
}
390
 
391
/* Set a value for h-frc.  */
392
 
393
void
394
sh64_h_frc_set (SIM_CPU *current_cpu, UINT regno, SF newval)
395
{
396
  SET_H_FRC (regno, newval);
397
}
398
 
399
/* Get the value of h-drc.  */
400
 
401
DF
402
sh64_h_drc_get (SIM_CPU *current_cpu, UINT regno)
403
{
404
  return GET_H_DRC (regno);
405
}
406
 
407
/* Set a value for h-drc.  */
408
 
409
void
410
sh64_h_drc_set (SIM_CPU *current_cpu, UINT regno, DF newval)
411
{
412
  SET_H_DRC (regno, newval);
413
}
414
 
415
/* Get the value of h-xf.  */
416
 
417
SF
418
sh64_h_xf_get (SIM_CPU *current_cpu, UINT regno)
419
{
420
  return GET_H_XF (regno);
421
}
422
 
423
/* Set a value for h-xf.  */
424
 
425
void
426
sh64_h_xf_set (SIM_CPU *current_cpu, UINT regno, SF newval)
427
{
428
  SET_H_XF (regno, newval);
429
}
430
 
431
/* Get the value of h-xd.  */
432
 
433
DF
434
sh64_h_xd_get (SIM_CPU *current_cpu, UINT regno)
435
{
436
  return GET_H_XD (regno);
437
}
438
 
439
/* Set a value for h-xd.  */
440
 
441
void
442
sh64_h_xd_set (SIM_CPU *current_cpu, UINT regno, DF newval)
443
{
444
  SET_H_XD (regno, newval);
445
}
446
 
447
/* Get the value of h-fvc.  */
448
 
449
SF
450
sh64_h_fvc_get (SIM_CPU *current_cpu, UINT regno)
451
{
452
  return GET_H_FVC (regno);
453
}
454
 
455
/* Set a value for h-fvc.  */
456
 
457
void
458
sh64_h_fvc_set (SIM_CPU *current_cpu, UINT regno, SF newval)
459
{
460
  SET_H_FVC (regno, newval);
461
}
462
 
463
/* Get the value of h-gbr.  */
464
 
465
SI
466
sh64_h_gbr_get (SIM_CPU *current_cpu)
467
{
468
  return GET_H_GBR ();
469
}
470
 
471
/* Set a value for h-gbr.  */
472
 
473
void
474
sh64_h_gbr_set (SIM_CPU *current_cpu, SI newval)
475
{
476
  SET_H_GBR (newval);
477
}
478
 
479
/* Get the value of h-vbr.  */
480
 
481
SI
482
sh64_h_vbr_get (SIM_CPU *current_cpu)
483
{
484
  return GET_H_VBR ();
485
}
486
 
487
/* Set a value for h-vbr.  */
488
 
489
void
490
sh64_h_vbr_set (SIM_CPU *current_cpu, SI newval)
491
{
492
  SET_H_VBR (newval);
493
}
494
 
495
/* Get the value of h-pr.  */
496
 
497
SI
498
sh64_h_pr_get (SIM_CPU *current_cpu)
499
{
500
  return GET_H_PR ();
501
}
502
 
503
/* Set a value for h-pr.  */
504
 
505
void
506
sh64_h_pr_set (SIM_CPU *current_cpu, SI newval)
507
{
508
  SET_H_PR (newval);
509
}
510
 
511
/* Get the value of h-macl.  */
512
 
513
SI
514
sh64_h_macl_get (SIM_CPU *current_cpu)
515
{
516
  return GET_H_MACL ();
517
}
518
 
519
/* Set a value for h-macl.  */
520
 
521
void
522
sh64_h_macl_set (SIM_CPU *current_cpu, SI newval)
523
{
524
  SET_H_MACL (newval);
525
}
526
 
527
/* Get the value of h-mach.  */
528
 
529
SI
530
sh64_h_mach_get (SIM_CPU *current_cpu)
531
{
532
  return GET_H_MACH ();
533
}
534
 
535
/* Set a value for h-mach.  */
536
 
537
void
538
sh64_h_mach_set (SIM_CPU *current_cpu, SI newval)
539
{
540
  SET_H_MACH (newval);
541
}
542
 
543
/* Get the value of h-tbit.  */
544
 
545
BI
546
sh64_h_tbit_get (SIM_CPU *current_cpu)
547
{
548
  return GET_H_TBIT ();
549
}
550
 
551
/* Set a value for h-tbit.  */
552
 
553
void
554
sh64_h_tbit_set (SIM_CPU *current_cpu, BI newval)
555
{
556
  SET_H_TBIT (newval);
557
}
558
 
559
/* Record trace results for INSN.  */
560
 
561
void
562
sh64_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
563
                            int *indices, TRACE_RECORD *tr)
564
{
565
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.