OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [arm/] [ldm.cgs] - Blame information for rev 227

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 227 jeremybenn
# arm testcase for FIXME
2
# mach: unfinished
3
 
4
        .include "testutils.inc"
5
 
6
        start
7
 
8
        .global ldmda_wb
9
ldmda_wb:
10
 
11
        pass
12
# arm testcase for FIXME
13
# mach: unfinished
14
 
15
        .include "testutils.inc"
16
 
17
        start
18
 
19
        .global ldmda
20
ldmda:
21
 
22
        pass
23
# arm testcase for FIXME
24
# mach: unfinished
25
 
26
        .include "testutils.inc"
27
 
28
        start
29
 
30
        .global ldmdb_wb
31
ldmdb_wb:
32
 
33
        pass
34
# arm testcase for ldm$cond ..
35
# mach: unfinished
36
 
37
        .include "testutils.inc"
38
 
39
        start
40
 
41
        .global ldmdb
42
ldmdb:
43
        ldm0 ..
44
 
45
        pass
46
# arm testcase for FIXME
47
# mach: unfinished
48
 
49
        .include "testutils.inc"
50
 
51
        start
52
 
53
        .global ldmia_wb
54
ldmia_wb:
55
 
56
        pass
57
# arm testcase for FIXME
58
# mach: unfinished
59
 
60
        .include "testutils.inc"
61
 
62
        start
63
 
64
        .global ldmia
65
ldmia:
66
 
67
        pass
68
# arm testcase for FIXME
69
# mach: unfinished
70
 
71
        .include "testutils.inc"
72
 
73
        start
74
 
75
        .global ldmib_wb
76
ldmib_wb:
77
 
78
        pass
79
# arm testcase for FIXME
80
# mach: unfinished
81
 
82
        .include "testutils.inc"
83
 
84
        start
85
 
86
        .global ldmib
87
ldmib:
88
 
89
        pass

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.