OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [frv/] [fbulelr.cgs] - Blame information for rev 227

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 227 jeremybenn
# frv testcase for fbulelr $FCCi,$hint
2
# mach: all
3
 
4
        .include "testutils.inc"
5
 
6
        start
7
 
8
        .global fbulelr
9
fbulelr:
10
        set_spr_addr    bad,lr
11
        set_fcc         0x0 0
12
        fbulelr         fcc0,0
13
 
14
        set_spr_addr    ok2,lr
15
        set_fcc         0x1 1
16
        fbulelr         fcc1,1
17
        fail
18
ok2:
19
        set_spr_addr    bad,lr
20
        set_fcc         0x2 2
21
        fbulelr         fcc2,2
22
 
23
        set_spr_addr    ok4,lr
24
        set_fcc         0x3 3
25
        fbulelr         fcc3,3
26
        fail
27
ok4:
28
        set_spr_addr    ok5,lr
29
        set_fcc         0x4 0
30
        fbulelr         fcc0,0
31
        fail
32
ok5:
33
        set_spr_addr    ok6,lr
34
        set_fcc         0x5 1
35
        fbulelr         fcc1,1
36
        fail
37
ok6:
38
        set_spr_addr    ok7,lr
39
        set_fcc         0x6 2
40
        fbulelr         fcc2,2
41
        fail
42
ok7:
43
        set_spr_addr    ok8,lr
44
        set_fcc         0x7 3
45
        fbulelr         fcc3,3
46
        fail
47
ok8:
48
        set_spr_addr    ok9,lr
49
        set_fcc         0x8 0
50
        fbulelr         fcc0,0
51
        fail
52
ok9:
53
        set_spr_addr    oka,lr
54
        set_fcc         0x9 1
55
        fbulelr         fcc1,1
56
        fail
57
oka:
58
        set_spr_addr    okb,lr
59
        set_fcc         0xa 2
60
        fbulelr         fcc2,2
61
        fail
62
okb:
63
        set_spr_addr    okc,lr
64
        set_fcc         0xb 3
65
        fbulelr         fcc3,3
66
        fail
67
okc:
68
        set_spr_addr    okd,lr
69
        set_fcc         0xc 0
70
        fbulelr         fcc0,0
71
        fail
72
okd:
73
        set_spr_addr    oke,lr
74
        set_fcc         0xd 1
75
        fbulelr         fcc1,1
76
        fail
77
oke:
78
        set_spr_addr    okf,lr
79
        set_fcc         0xe 2
80
        fbulelr         fcc2,2
81
        fail
82
okf:
83
        set_spr_addr    okg,lr
84
        set_fcc         0xf 3
85
        fbulelr         fcc3,3
86
        fail
87
okg:
88
        pass
89
bad:
90
        fail

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.