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# frv testcase for nfdadds $FRi,$FRj,$FRk
# mach: fr500 fr550 frv
 
        .include "testutils.inc"
 
        float_constants
        start
        load_float_constants
        load_float_constants1
 
        .global nfdadds
nfdadds:
        nfdadds         fr16,fr0,fr2
        test_fr_fr      fr2,fr0
        test_fr_fr      fr3,fr0
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr16,fr4,fr2
        test_fr_fr      fr2,fr4
        test_fr_fr      fr3,fr4
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr16,fr8,fr2
        test_fr_fr      fr2,fr8
        test_fr_fr      fr3,fr8
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr16,fr12,fr2
        test_fr_fr      fr2,fr12
        test_fr_fr      fr3,fr12
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr16,fr16,fr2
        test_fr_fr      fr2,fr16
        test_fr_fr      fr2,fr20
        test_fr_fr      fr3,fr16
        test_fr_fr      fr3,fr20
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr16,fr20,fr2
        test_fr_fr      fr2,fr16
        test_fr_fr      fr2,fr20
        test_fr_fr      fr3,fr16
        test_fr_fr      fr3,fr20
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr16,fr24,fr2
        test_fr_fr      fr2,fr24
        test_fr_fr      fr3,fr24
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr16,fr28,fr2
        test_fr_fr      fr2,fr28
        test_fr_fr      fr3,fr28
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr16,fr32,fr2
        test_fr_fr      fr2,fr32
        test_fr_fr      fr3,fr32
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr16,fr36,fr2
        test_fr_fr      fr2,fr36
        test_fr_fr      fr3,fr36
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr16,fr40,fr2
        test_fr_fr      fr2,fr40
        test_fr_fr      fr3,fr40
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr16,fr44,fr2
        test_fr_fr      fr2,fr44
        test_fr_fr      fr3,fr44
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr16,fr48,fr2
        test_fr_fr      fr2,fr48
        test_fr_fr      fr3,fr48
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr16,fr52,fr2
        test_fr_fr      fr2,fr52
        test_fr_fr      fr3,fr52
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
 
        nfdadds         fr20,fr0,fr2
        test_fr_fr      fr2,fr0
        test_fr_fr      fr3,fr0
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr20,fr4,fr2
        test_fr_fr      fr2,fr4
        test_fr_fr      fr3,fr4
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr20,fr8,fr2
        test_fr_fr      fr2,fr8
        test_fr_fr      fr3,fr8
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr20,fr12,fr2
        test_fr_fr      fr2,fr12
        test_fr_fr      fr3,fr12
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr20,fr16,fr2
        test_fr_fr      fr2,fr16
        test_fr_fr      fr2,fr20
        test_fr_fr      fr3,fr16
        test_fr_fr      fr3,fr20
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr20,fr20,fr2
        test_fr_fr      fr2,fr16
        test_fr_fr      fr2,fr20
        test_fr_fr      fr3,fr16
        test_fr_fr      fr3,fr20
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr20,fr24,fr2
        test_fr_fr      fr2,fr24
        test_fr_fr      fr3,fr24
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr20,fr28,fr2
        test_fr_fr      fr2,fr28
        test_fr_fr      fr3,fr28
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr20,fr32,fr2
        test_fr_fr      fr2,fr32
        test_fr_fr      fr3,fr32
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr20,fr36,fr2
        test_fr_fr      fr2,fr36
        test_fr_fr      fr3,fr36
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr20,fr40,fr2
        test_fr_fr      fr2,fr40
        test_fr_fr      fr3,fr40
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr20,fr44,fr2
        test_fr_fr      fr2,fr44
        test_fr_fr      fr3,fr44
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr20,fr48,fr2
        test_fr_fr      fr2,fr48
        test_fr_fr      fr3,fr48
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr20,fr52,fr2
        test_fr_fr      fr2,fr52
        test_fr_fr      fr3,fr52
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
 
        nfdadds         fr8,fr28,fr2
        test_fr_fr      fr2,fr16
        test_fr_fr      fr2,fr20
        test_fr_fr      fr3,fr16
        test_fr_fr      fr3,fr20
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr12,fr24,fr2
        test_fr_fr      fr2,fr16
        test_fr_fr      fr2,fr20
        test_fr_fr      fr3,fr16
        test_fr_fr      fr3,fr20
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr24,fr12,fr2
        test_fr_fr      fr2,fr16
        test_fr_fr      fr2,fr20
        test_fr_fr      fr3,fr16
        test_fr_fr      fr3,fr20
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
        nfdadds         fr28,fr8,fr2
        test_fr_fr      fr2,fr16
        test_fr_fr      fr2,fr20
        test_fr_fr      fr3,fr16
        test_fr_fr      fr3,fr20
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
 
        nfdadds         fr36,fr40,fr2
        test_fr_fr      fr2,fr44
        test_fr_fr      fr3,fr44
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
 
        ; try to cause exceptions
        nfdadds         fr48,fr28,fr2
;       test_fr_fr      fr2,fr44
;       test_fr_fr      fr3,fr44
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
 
        nfdadds         fr52,fr28,fr2
;       test_fr_fr      fr2,fr44
;       test_fr_fr      fr3,fr44
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
 
        nfdadds         fr56,fr28,fr2
;       test_fr_fr      fr2,fr44
;       test_fr_fr      fr3,fr44
        test_spr_immed  0,fner1
        test_spr_immed  0,fner0
 
        nfdadds         fr60,fr28,fr2
;       test_fr_fr      fr2,fr44
;       test_fr_fr      fr3,fr44
        test_spr_immed  0xc,fner1
        test_spr_immed  0,fner0
 
        pass
 
 

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Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [frv/] [nfdadds.cgs] - Blame information for rev 227

Line No.	Rev	Author	Line
1	227	jeremybenn	`# frv testcase for nfdadds $FRi,$FRj,$FRk`
2			`# mach: fr500 fr550 frv`
3
4			`.include "testutils.inc"`
5
6			`float_constants`
7			`start`
8			`load_float_constants`
9			`load_float_constants1`
10
11			`.global nfdadds`
12			`nfdadds:`
13			`nfdadds fr16,fr0,fr2`
14			`test_fr_fr fr2,fr0`
15			`test_fr_fr fr3,fr0`
16			`test_spr_immed 0,fner1`
17			`test_spr_immed 0,fner0`
18			`nfdadds fr16,fr4,fr2`
19			`test_fr_fr fr2,fr4`
20			`test_fr_fr fr3,fr4`
21			`test_spr_immed 0,fner1`
22			`test_spr_immed 0,fner0`
23			`nfdadds fr16,fr8,fr2`
24			`test_fr_fr fr2,fr8`
25			`test_fr_fr fr3,fr8`
26			`test_spr_immed 0,fner1`
27			`test_spr_immed 0,fner0`
28			`nfdadds fr16,fr12,fr2`
29			`test_fr_fr fr2,fr12`
30			`test_fr_fr fr3,fr12`
31			`test_spr_immed 0,fner1`
32			`test_spr_immed 0,fner0`
33			`nfdadds fr16,fr16,fr2`
34			`test_fr_fr fr2,fr16`
35			`test_fr_fr fr2,fr20`
36			`test_fr_fr fr3,fr16`
37			`test_fr_fr fr3,fr20`
38			`test_spr_immed 0,fner1`
39			`test_spr_immed 0,fner0`
40			`nfdadds fr16,fr20,fr2`
41			`test_fr_fr fr2,fr16`
42			`test_fr_fr fr2,fr20`
43			`test_fr_fr fr3,fr16`
44			`test_fr_fr fr3,fr20`
45			`test_spr_immed 0,fner1`
46			`test_spr_immed 0,fner0`
47			`nfdadds fr16,fr24,fr2`
48			`test_fr_fr fr2,fr24`
49			`test_fr_fr fr3,fr24`
50			`test_spr_immed 0,fner1`
51			`test_spr_immed 0,fner0`
52			`nfdadds fr16,fr28,fr2`
53			`test_fr_fr fr2,fr28`
54			`test_fr_fr fr3,fr28`
55			`test_spr_immed 0,fner1`
56			`test_spr_immed 0,fner0`
57			`nfdadds fr16,fr32,fr2`
58			`test_fr_fr fr2,fr32`
59			`test_fr_fr fr3,fr32`
60			`test_spr_immed 0,fner1`
61			`test_spr_immed 0,fner0`
62			`nfdadds fr16,fr36,fr2`
63			`test_fr_fr fr2,fr36`
64			`test_fr_fr fr3,fr36`
65			`test_spr_immed 0,fner1`
66			`test_spr_immed 0,fner0`
67			`nfdadds fr16,fr40,fr2`
68			`test_fr_fr fr2,fr40`
69			`test_fr_fr fr3,fr40`
70			`test_spr_immed 0,fner1`
71			`test_spr_immed 0,fner0`
72			`nfdadds fr16,fr44,fr2`
73			`test_fr_fr fr2,fr44`
74			`test_fr_fr fr3,fr44`
75			`test_spr_immed 0,fner1`
76			`test_spr_immed 0,fner0`
77			`nfdadds fr16,fr48,fr2`
78			`test_fr_fr fr2,fr48`
79			`test_fr_fr fr3,fr48`
80			`test_spr_immed 0,fner1`
81			`test_spr_immed 0,fner0`
82			`nfdadds fr16,fr52,fr2`
83			`test_fr_fr fr2,fr52`
84			`test_fr_fr fr3,fr52`
85			`test_spr_immed 0,fner1`
86			`test_spr_immed 0,fner0`
87
88			`nfdadds fr20,fr0,fr2`
89			`test_fr_fr fr2,fr0`
90			`test_fr_fr fr3,fr0`
91			`test_spr_immed 0,fner1`
92			`test_spr_immed 0,fner0`
93			`nfdadds fr20,fr4,fr2`
94			`test_fr_fr fr2,fr4`
95			`test_fr_fr fr3,fr4`
96			`test_spr_immed 0,fner1`
97			`test_spr_immed 0,fner0`
98			`nfdadds fr20,fr8,fr2`
99			`test_fr_fr fr2,fr8`
100			`test_fr_fr fr3,fr8`
101			`test_spr_immed 0,fner1`
102			`test_spr_immed 0,fner0`
103			`nfdadds fr20,fr12,fr2`
104			`test_fr_fr fr2,fr12`
105			`test_fr_fr fr3,fr12`
106			`test_spr_immed 0,fner1`
107			`test_spr_immed 0,fner0`
108			`nfdadds fr20,fr16,fr2`
109			`test_fr_fr fr2,fr16`
110			`test_fr_fr fr2,fr20`
111			`test_fr_fr fr3,fr16`
112			`test_fr_fr fr3,fr20`
113			`test_spr_immed 0,fner1`
114			`test_spr_immed 0,fner0`
115			`nfdadds fr20,fr20,fr2`
116			`test_fr_fr fr2,fr16`
117			`test_fr_fr fr2,fr20`
118			`test_fr_fr fr3,fr16`
119			`test_fr_fr fr3,fr20`
120			`test_spr_immed 0,fner1`
121			`test_spr_immed 0,fner0`
122			`nfdadds fr20,fr24,fr2`
123			`test_fr_fr fr2,fr24`
124			`test_fr_fr fr3,fr24`
125			`test_spr_immed 0,fner1`
126			`test_spr_immed 0,fner0`
127			`nfdadds fr20,fr28,fr2`
128			`test_fr_fr fr2,fr28`
129			`test_fr_fr fr3,fr28`
130			`test_spr_immed 0,fner1`
131			`test_spr_immed 0,fner0`
132			`nfdadds fr20,fr32,fr2`
133			`test_fr_fr fr2,fr32`
134			`test_fr_fr fr3,fr32`
135			`test_spr_immed 0,fner1`
136			`test_spr_immed 0,fner0`
137			`nfdadds fr20,fr36,fr2`
138			`test_fr_fr fr2,fr36`
139			`test_fr_fr fr3,fr36`
140			`test_spr_immed 0,fner1`
141			`test_spr_immed 0,fner0`
142			`nfdadds fr20,fr40,fr2`
143			`test_fr_fr fr2,fr40`
144			`test_fr_fr fr3,fr40`
145			`test_spr_immed 0,fner1`
146			`test_spr_immed 0,fner0`
147			`nfdadds fr20,fr44,fr2`
148			`test_fr_fr fr2,fr44`
149			`test_fr_fr fr3,fr44`
150			`test_spr_immed 0,fner1`
151			`test_spr_immed 0,fner0`
152			`nfdadds fr20,fr48,fr2`
153			`test_fr_fr fr2,fr48`
154			`test_fr_fr fr3,fr48`
155			`test_spr_immed 0,fner1`
156			`test_spr_immed 0,fner0`
157			`nfdadds fr20,fr52,fr2`
158			`test_fr_fr fr2,fr52`
159			`test_fr_fr fr3,fr52`
160			`test_spr_immed 0,fner1`
161			`test_spr_immed 0,fner0`
162
163			`nfdadds fr8,fr28,fr2`
164			`test_fr_fr fr2,fr16`
165			`test_fr_fr fr2,fr20`
166			`test_fr_fr fr3,fr16`
167			`test_fr_fr fr3,fr20`
168			`test_spr_immed 0,fner1`
169			`test_spr_immed 0,fner0`
170			`nfdadds fr12,fr24,fr2`
171			`test_fr_fr fr2,fr16`
172			`test_fr_fr fr2,fr20`
173			`test_fr_fr fr3,fr16`
174			`test_fr_fr fr3,fr20`
175			`test_spr_immed 0,fner1`
176			`test_spr_immed 0,fner0`
177			`nfdadds fr24,fr12,fr2`
178			`test_fr_fr fr2,fr16`
179			`test_fr_fr fr2,fr20`
180			`test_fr_fr fr3,fr16`
181			`test_fr_fr fr3,fr20`
182			`test_spr_immed 0,fner1`
183			`test_spr_immed 0,fner0`
184			`nfdadds fr28,fr8,fr2`
185			`test_fr_fr fr2,fr16`
186			`test_fr_fr fr2,fr20`
187			`test_fr_fr fr3,fr16`
188			`test_fr_fr fr3,fr20`
189			`test_spr_immed 0,fner1`
190			`test_spr_immed 0,fner0`
191
192			`nfdadds fr36,fr40,fr2`
193			`test_fr_fr fr2,fr44`
194			`test_fr_fr fr3,fr44`
195			`test_spr_immed 0,fner1`
196			`test_spr_immed 0,fner0`
197
198			`; try to cause exceptions`
199			`nfdadds fr48,fr28,fr2`
200			`; test_fr_fr fr2,fr44`
201			`; test_fr_fr fr3,fr44`
202			`test_spr_immed 0,fner1`
203			`test_spr_immed 0,fner0`
204
205			`nfdadds fr52,fr28,fr2`
206			`; test_fr_fr fr2,fr44`
207			`; test_fr_fr fr3,fr44`
208			`test_spr_immed 0,fner1`
209			`test_spr_immed 0,fner0`
210
211			`nfdadds fr56,fr28,fr2`
212			`; test_fr_fr fr2,fr44`
213			`; test_fr_fr fr3,fr44`
214			`test_spr_immed 0,fner1`
215			`test_spr_immed 0,fner0`
216
217			`nfdadds fr60,fr28,fr2`
218			`; test_fr_fr fr2,fr44`
219			`; test_fr_fr fr3,fr44`
220			`test_spr_immed 0xc,fner1`
221			`test_spr_immed 0,fner0`
222
223			`pass`
224
225