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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [m32r/] [hw-trap.ms] - Blame information for rev 227

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1 227 jeremybenn
# mach(): m32r m32rx
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# output(): pass\n
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        .include "testutils.inc"
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        start
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; construct bra trap2_handler in trap 2 slot
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        ld24 r0,#bra_insn
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        ld r0,@r0
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        ld24 r1,#trap2_handler
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        addi r1,#-0x48 ; pc relative address from trap 2 slot to handler
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        srai r1,#2
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        or r0,r1
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        ld24 r2,#0x48 ; address of trap 2 slot
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        st r0,@r2
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; perform trap
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        ldi r4,#0
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        trap #2
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        test_h_gr r4,42
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        pass
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; trap 2 handler
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trap2_handler:
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        ldi r4,#42
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        rte
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bra_insn:
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        bra.l 0

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