OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [m32r/] [macwlo.cgs] - Blame information for rev 355

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 227 jeremybenn
# m32r testcase for macwlo $src1,$src2
2
# mach(): m32r m32rx
3
 
4
        .include "testutils.inc"
5
 
6
        start
7
 
8
        .global macwlo
9
macwlo:
10
        mvi_h_accum0 0, 1
11
        mvi_h_gr r4, 0x10123
12
        mvi_h_gr r5, 0x40002
13
 
14
        macwlo r4, r5
15
 
16
        test_h_accum0 0, 0x20247
17
 
18
        pass

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.