OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [sh/] [flds.s] - Blame information for rev 227

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 227 jeremybenn 
# sh testcase for flds
2 
# mach: sh
3 
# as(sh):       -defsym sim_cpu=0
4 
 
5 
        .include "testutils.inc"
6 
 
7 
        start
8 
flds_zero:
9 
        set_grs_a5a5
10 
        set_fprs_a5a5
11 
        fldi0   fr0
12 
        flds    fr0, fpul
13 
        fsts    fpul, fr1
14 
        fcmp/eq fr0, fr1
15 
        bt      flds_one
16 
        fail
17 
flds_one:
18 
        fldi1   fr0
19 
        flds    fr0, fpul
20 
        fsts    fpul, fr1
21 
        fcmp/eq fr0, fr1
22 
        bt      .L0
23 
        fail
24 
.L0:
25 
        test_grs_a5a5
26 
        assert_fpreg_i  1, fr0
27 
        assert_fpreg_i  1, fr1
28 
        test_fpr_a5a5   fr2
29 
        test_fpr_a5a5   fr3
30 
        test_fpr_a5a5   fr4
31 
        test_fpr_a5a5   fr5
32 
        test_fpr_a5a5   fr6
33 
        test_fpr_a5a5   fr7
34 
        test_fpr_a5a5   fr8
35 
        test_fpr_a5a5   fr9
36 
        test_fpr_a5a5   fr10
37 
        test_fpr_a5a5   fr11
38 
        test_fpr_a5a5   fr12
39 
        test_fpr_a5a5   fr13
40 
        test_fpr_a5a5   fr14
41 
        test_fpr_a5a5   fr15
42 
        pass
43 
        exit 0

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.