OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [gdb/] [ChangeLog.or32] - Blame information for rev 447

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 339 jeremybenn
2010-09-05  Jeremy Bennett  
2
 
3
        * version.in: Updated for release 7.2-or32-1.0rc1.
4
 
5 330 jeremybenn
2010-08-25  Jeremy Bennett  
6
 
7
        * or32-tdep.c (or32_push_dummy_call): Corrected handling of double
8
        args provided in two regs.
9
        (or32_frame_cache): Set frame_id based on SP as it will be, even
10
        it not yet computed.
11
 
12
2010-08-19  Jeremy Bennett  
13
 
14
        * or32-tdep.c (or32_register_name): Changed to rnn rather than
15
        gprnn to mach the assembler.
16
        (or32_is_arg_reg, or32_is_callee_saved_reg): Added.
17
        (or32_skip_prologue): Don't use skip_prologue_using_sal. Check for
18
        argument as well as callee saved registers in prologue.
19
        (or32_frame_cache):Check for argument as well as callee saved
20
        registers in prologue.
21
 
22
2010-08-13  Jeremy Bennett  
23
 
24
        * or32-tdep.c (or32_frame_base_address): Frame base is FP, not SP.
25
 
26
2010-07-30  Jeremy Bennett  
27
 
28
        * or32-tdep.c (or32_fetch_instruction): Rewritten to use
29
        architecture, not frame. Returns ULONGEST.
30
        (or32_store_instruction): Deleted.
31
        (or32_register_type): Use builtin_type () function instead of
32
        constants.
33
        (or32_single_step_through_delay): Add gdbarch arg to
34
        fetch_instruction () calls.
35
        (or32_skip_prologue): skip_prologue_using_sal () now takes gdbarch as
36
        argument. Add gdbarch arg to fetch_instruction () calls.
37
        (or32_frame_unwind_cache): Add gdbarch arg to fetch_instruction ()
38
        calls.
39
        (or32_push_dummy_call): Add byte_order arg to
40
        extract_unsigned_integer () and  store_unsigned_integer () calls.
41
        (or32_return_value): Add byte_order to store_unsigned_integer ()
42
        calls.
43
        (or32_dummy_id): Renamed from or32_unwind_dummy_id () and
44
        rewritten to use THIS frame, rather than the NEXT frame.
45
        (or32_gdbarch_init): Frame base set up via or32_frame_base_sniffer
46
        function. Appended after DWARF2 sniffer.
47
        (or32_frame_base_sniffer): Renamed from or32_frame_sniffer ().
48
        Structure now uses or32_frame_unwind Provided with THIS frame, not
49
        NEXT frame.
50
        (or32_frame_base_address): Changed to use THIS frame, not NEXT
51
        frame.
52
        (or32_frame_this_id): Changed to use THIS frame, not NEXT frame.
53
        (or32_frame_prev_register): Changed to use THIS frame, not NEXT
54
        frame and return its result in a structure not via its arguments.
55
        : Field .prev_pc deleted, field .prev_arch added.
56
        (or32_frame_sniffer): Deleted.
57
        (or32_frame_cache): Replaces or32_frame_unwind_cache, based on
58
        THIS frame not the NEXT frame.
59
        (or32_frame_unwind_cache): Deleted.
60
 
61
2010-07-28  Jeremy Bennett  
62
 
63
        * configure.ac: Add configure option for or1ksim location.
64
        * configure: Regenerated.
65
        * or32-tdep.c (or32_fetch_instruction, or32_store_instruction)
66
        (or32_analyse_inst, or32_analyse_l_addi, or32_analyse_l_sw)
67
        (or32_return_value, or32_breakpoint_from_pc)
68
        (or32_single_step_through_dela, or32_pseudo_register_read)
69
        (or32_pseudo_register_write, or32_register_name)
70
        (or32_register_type, or32_registers_info)
71
        (or32_register_reggroup_p, or32_skip_prologue, or32_frame_align)
72
        (or32_unwind_pc, or32_unwind_sp, or32_push_dummy_call)
73
        (or32_unwind_dummy_id, or32_frame_unwind_cache)
74
        (or32_frame_this_id, or32_frame_prev_register)
75
        (or32_frame_base_address, or32_frame_sniffer, or32_gdbarch_init)
76
        (or32_dump_tdep, or32_spr_group_name, or32_spr_register_name)
77
        (or32_groupnum_from_name, or32_regnum_from_name, or32_tokenize)
78
        (or32_parse_spr_params, or32_read_spr, or32_write_spr)
79
        (or32_info_spr_command, or32_spr_command): Renamed from
80
        or1k_fetch_instruction, or1k_store_instruction, or1k_analyse_inst,
81
        or1k_analyse_l_addi, or1k_analyse_l_sw, or1k_return_value,
82
        or1k_breakpoint_from_pc, or1k_single_step_through_dela,
83
        or1k_pseudo_register_read, or1k_pseudo_register_write,
84
        or1k_register_name, or1k_register_type, or1k_registers_info,
85
        or1k_register_reggroup_p, or1k_skip_prologue, or1k_frame_align,
86
        or1k_unwind_pc, or1k_unwind_sp, or1k_push_dummy_call,
87
        or1k_unwind_dummy_id, or1k_frame_unwind_cache, or1k_frame_this_id,
88
        or1k_frame_prev_register, or1k_frame_base_address,
89
        or1k_frame_sniffer, or1k_gdbarch_init, or1k_dump_tdep,
90
        or1k_spr_group_name, or1k_spr_register_name,
91
        or1k_groupnum_from_name, or1k_regnum_from_name, or1k_tokenize,
92
        or1k_parse_spr_params, or1k_read_spr, or1k_write_spr,
93
        or1k_info_spr_command, or1k_spr_command respectively.
94
 
95
2010-07-27  Jeremy Bennett  
96
 
97
        * or1k-tdep.c (or1k_single_step_through_delay): Correct check for
98
        first instruction of exception handler.
99
 
100
2010-07-20  Jeremy Bennett  
101
 
102
        * configure.ac: Added test for zlib from binutils/bfd
103
        * configure: Regenerated.
104
 
105
2010-06-30  Jeremy Bennett  
106
 
107
        * or1k-tdep.c (or1k_fetch_instruction): Logic flow made clearer.
108
        (or1k_analyse_inst, or1k_analyse_L_addi)
109
        (or1k_analyse_l_sw): Added.
110
        (or1k_frame_size, or1k_frame_fp_loc, or1k_frame_size_check)
111
        (or1k_link_address, or1k_get_saved_reg): Removed.
112
        (or1k_skip_prologue, or1k_frame_unwind_cache): Rewritten to use
113
        or1k_analyse_inst functions.
114
        * or1k_tdep.h : #define
115
        added.
116
 
117
2010-06-10  Jeremy Bennett  
118
 
119
        * eval.c (evaluate_subexp_standard): Initialize subscript_array,
120
        to avoid picky compiler complaints.
121
        * or1k-jtag.c (jp1_ll_read_jp1): Initialize data, to avoid picky
122
        compiler complaints.
123
 
124
2008-11-08  Jeremy Bennett  
125
 
126
        * or1k-tdep.c (or1k_read_spr, or1k_write_spr): Moved here from
127
        remote-or1k.c and made local to this file. Rewritten to use
128
        commands via the target remote command (to_rcmd) function.
129
        * or1k-tdep.c (or1k_spr_command). Invalidates register cache when
130
        SPR is written.
131
        * or1k-tdep.h: or1k_read_spr and Or1k_write_spr are removed as
132
        global functions.
133
        * or1k-tdep.c (or1k_read_spr, or1k_write_spr). Functions removed
134
        and made local to or1k-tdep.c. All or1k-tdep.c references to these
135
        functions changed to use or1k_jtag_read_spr and
136
        or1k_jtag_write_spr (for which these were only wrappers).
137
        * or1k-tdep.c (or1k_rcmd): Function added to process SPR access
138
        requests.
139
 
140
2008-10-23  Jeremy Bennett  
141
 
142
        * or1k-tdep.h, or1k-tdep.c: Extend the number of registers to
143
        include the PPC as well as the NPC
144
 
145
2008-08-13  Jeremy Bennett  
146
 
147
        * or1k-tdep.c, or1k-tdep.h, remote-or1k.c: Numerous bug fixes
148
        * or1k-jtag.c (or1k_jtag_read_mem, or1k_jtag_write_mem): Problems
149
        with small data without alignment fixed.
150
        * doc/or1k.texinfo: Small changes to bring in to line with bug
151
        fixes.
152
        * doc/gdb.texinfo: Sections relating to OpenRISC 1000 rewritten
153
        * opcodes/or32-dis.c: Signed offsets reinstated. Symbolic branch
154
        targets added.
155
        * opcodes/or32-opc.c: l.nop immediate arg made unsigned
156
        * gdb/breakpoint.c (bpstat_stop_status): The test to disallow a
157
        read watchpoint if the value had changed was unreliable and has
158
        been deleted. Trust the HW on this one.
159
 
160
2008-07-30  Jeremy Bennett  
161
 
162
        * NEWS: Details of OpenRISC 1000 port
163
        * or1k-tdep.c: New file, based on the OpenCores 5.3 port
164
        * or1k-tdep.h: New file, based on the OpenCores 5.3 port
165
        * or1k-jtag.c: New file, based on the OpenCores 5.3 port
166
        * or1k-jtag.h: New file, based on the OpenCores 5.3 port
167
        * remote-or1k.c: New file, based on the OpenCores 5.3 port
168
        * configure.tgt: Updated description of OpenRISC 1000 files
169
        * bfd/config.bfd: or32-*-*linux* added as match for
170
        targ_defvec=bfd_elf32_or32_big_vec
171
        * doc/or1k.texinfo: New file: Documentation of the OpenRISC 1000
172
        * doc/Makefile.in: Added OpenRISC 1000 document
173
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.