OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [gdb/] [gdbserver/] [win32-arm-low.c] - Blame information for rev 330

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 330 jeremybenn
/* Copyright (C) 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
2
 
3
   This file is part of GDB.
4
 
5
   This program is free software; you can redistribute it and/or modify
6
   it under the terms of the GNU General Public License as published by
7
   the Free Software Foundation; either version 3 of the License, or
8
   (at your option) any later version.
9
 
10
   This program is distributed in the hope that it will be useful,
11
   but WITHOUT ANY WARRANTY; without even the implied warranty of
12
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13
   GNU General Public License for more details.
14
 
15
   You should have received a copy of the GNU General Public License
16
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
17
 
18
#include "server.h"
19
#include "win32-low.h"
20
 
21
#ifndef CONTEXT_FLOATING_POINT
22
#define CONTEXT_FLOATING_POINT 0
23
#endif
24
 
25
/* Defined in auto-generated file reg-arm.c.  */
26
void init_registers_arm (void);
27
 
28
 
29
static void
30
arm_get_thread_context (win32_thread_info *th, DEBUG_EVENT* current_event)
31
{
32
  th->context.ContextFlags = \
33
    CONTEXT_FULL | \
34
    CONTEXT_FLOATING_POINT;
35
 
36
  GetThreadContext (th->h, &th->context);
37
}
38
 
39
static void
40
arm_set_thread_context (win32_thread_info *th, DEBUG_EVENT* current_event)
41
{
42
  SetThreadContext (th->h, &th->context);
43
}
44
 
45
#define context_offset(x) ((int)&(((CONTEXT *)NULL)->x))
46
static const int mappings[] = {
47
  context_offset (R0),
48
  context_offset (R1),
49
  context_offset (R2),
50
  context_offset (R3),
51
  context_offset (R4),
52
  context_offset (R5),
53
  context_offset (R6),
54
  context_offset (R7),
55
  context_offset (R8),
56
  context_offset (R9),
57
  context_offset (R10),
58
  context_offset (R11),
59
  context_offset (R12),
60
  context_offset (Sp),
61
  context_offset (Lr),
62
  context_offset (Pc),
63
  -1, /* f0 */
64
  -1, /* f1 */
65
  -1, /* f2 */
66
  -1, /* f3 */
67
  -1, /* f4 */
68
  -1, /* f5 */
69
  -1, /* f6 */
70
  -1, /* f7 */
71
  -1, /* fps */
72
  context_offset (Psr),
73
};
74
#undef context_offset
75
 
76
/* Return a pointer into a CONTEXT field indexed by gdb register number.
77
   Return a pointer to an dummy register holding zero if there is no
78
   corresponding CONTEXT field for the given register number.  */
79
static char *
80
regptr (CONTEXT* c, int r)
81
{
82
  if (mappings[r] < 0)
83
  {
84
    static ULONG zero;
85
    /* Always force value to zero, in case the user tried to write
86
       to this register before.  */
87
    zero = 0;
88
    return (char *) &zero;
89
  }
90
  else
91
    return (char *) c + mappings[r];
92
}
93
 
94
/* Fetch register from gdbserver regcache data.  */
95
static void
96
arm_fetch_inferior_register (struct regcache *regcache,
97
                             win32_thread_info *th, int r)
98
{
99
  char *context_offset = regptr (&th->context, r);
100
  supply_register (regcache, r, context_offset);
101
}
102
 
103
/* Store a new register value into the thread context of TH.  */
104
static void
105
arm_store_inferior_register (struct regcache *regcache,
106
                             win32_thread_info *th, int r)
107
{
108
  collect_register (regcache, r, regptr (&th->context, r));
109
}
110
 
111
/* Correct in either endianness.  We do not support Thumb yet.  */
112
static const unsigned long arm_wince_breakpoint = 0xe6000010;
113
#define arm_wince_breakpoint_len 4
114
 
115
struct win32_target_ops the_low_target = {
116
  init_registers_arm,
117
  sizeof (mappings) / sizeof (mappings[0]),
118
  NULL, /* initial_stuff */
119
  arm_get_thread_context,
120
  arm_set_thread_context,
121
  NULL, /* thread_added */
122
  arm_fetch_inferior_register,
123
  arm_store_inferior_register,
124
  NULL, /* single_step */
125
  (const unsigned char *) &arm_wince_breakpoint,
126
  arm_wince_breakpoint_len,
127
  /* Watchpoint related functions.  See target.h for comments.  */
128
  NULL, /* insert_point */
129
  NULL, /* remove_point */
130
  NULL, /* stopped_by_watchpoint */
131
  NULL  /* stopped_data_address */
132
};

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.