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jeremybenn |
/* Intel 387 floating point stuff.
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Copyright (C) 1988, 1989, 1991, 1992, 1993, 1994, 1998, 1999, 2000, 2001,
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2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010
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Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "doublest.h"
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#include "floatformat.h"
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#include "frame.h"
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#include "gdbcore.h"
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#include "inferior.h"
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#include "language.h"
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#include "regcache.h"
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#include "value.h"
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#include "gdb_assert.h"
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#include "gdb_string.h"
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#include "i386-tdep.h"
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#include "i387-tdep.h"
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#include "i386-xstate.h"
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/* Print the floating point number specified by RAW. */
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static void
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print_i387_value (struct gdbarch *gdbarch,
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const gdb_byte *raw, struct ui_file *file)
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{
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DOUBLEST value;
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/* Using extract_typed_floating here might affect the representation
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of certain numbers such as NaNs, even if GDB is running natively.
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This is fine since our caller already detects such special
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numbers and we print the hexadecimal representation anyway. */
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value = extract_typed_floating (raw, i387_ext_type (gdbarch));
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/* We try to print 19 digits. The last digit may or may not contain
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garbage, but we'd better print one too many. We need enough room
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to print the value, 1 position for the sign, 1 for the decimal
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point, 19 for the digits and 6 for the exponent adds up to 27. */
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#ifdef PRINTF_HAS_LONG_DOUBLE
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fprintf_filtered (file, " %-+27.19Lg", (long double) value);
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#else
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fprintf_filtered (file, " %-+27.19g", (double) value);
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#endif
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}
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/* Print the classification for the register contents RAW. */
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static void
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print_i387_ext (struct gdbarch *gdbarch,
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const gdb_byte *raw, struct ui_file *file)
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{
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int sign;
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int integer;
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unsigned int exponent;
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unsigned long fraction[2];
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sign = raw[9] & 0x80;
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integer = raw[7] & 0x80;
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exponent = (((raw[9] & 0x7f) << 8) | raw[8]);
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fraction[0] = ((raw[3] << 24) | (raw[2] << 16) | (raw[1] << 8) | raw[0]);
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fraction[1] = (((raw[7] & 0x7f) << 24) | (raw[6] << 16)
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| (raw[5] << 8) | raw[4]);
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if (exponent == 0x7fff && integer)
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{
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if (fraction[0] == 0x00000000 && fraction[1] == 0x00000000)
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/* Infinity. */
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fprintf_filtered (file, " %cInf", (sign ? '-' : '+'));
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else if (sign && fraction[0] == 0x00000000 && fraction[1] == 0x40000000)
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/* Real Indefinite (QNaN). */
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fputs_unfiltered (" Real Indefinite (QNaN)", file);
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else if (fraction[1] & 0x40000000)
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/* QNaN. */
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fputs_filtered (" QNaN", file);
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else
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/* SNaN. */
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fputs_filtered (" SNaN", file);
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}
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else if (exponent < 0x7fff && exponent > 0x0000 && integer)
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/* Normal. */
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print_i387_value (gdbarch, raw, file);
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else if (exponent == 0x0000)
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{
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/* Denormal or zero. */
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print_i387_value (gdbarch, raw, file);
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if (integer)
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/* Pseudo-denormal. */
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fputs_filtered (" Pseudo-denormal", file);
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else if (fraction[0] || fraction[1])
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/* Denormal. */
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fputs_filtered (" Denormal", file);
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}
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else
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/* Unsupported. */
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fputs_filtered (" Unsupported", file);
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}
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/* Print the status word STATUS. */
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static void
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print_i387_status_word (unsigned int status, struct ui_file *file)
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{
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fprintf_filtered (file, "Status Word: %s",
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hex_string_custom (status, 4));
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fputs_filtered (" ", file);
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fprintf_filtered (file, " %s", (status & 0x0001) ? "IE" : " ");
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fprintf_filtered (file, " %s", (status & 0x0002) ? "DE" : " ");
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fprintf_filtered (file, " %s", (status & 0x0004) ? "ZE" : " ");
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fprintf_filtered (file, " %s", (status & 0x0008) ? "OE" : " ");
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fprintf_filtered (file, " %s", (status & 0x0010) ? "UE" : " ");
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fprintf_filtered (file, " %s", (status & 0x0020) ? "PE" : " ");
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fputs_filtered (" ", file);
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fprintf_filtered (file, " %s", (status & 0x0080) ? "ES" : " ");
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fputs_filtered (" ", file);
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fprintf_filtered (file, " %s", (status & 0x0040) ? "SF" : " ");
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fputs_filtered (" ", file);
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fprintf_filtered (file, " %s", (status & 0x0100) ? "C0" : " ");
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fprintf_filtered (file, " %s", (status & 0x0200) ? "C1" : " ");
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fprintf_filtered (file, " %s", (status & 0x0400) ? "C2" : " ");
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fprintf_filtered (file, " %s", (status & 0x4000) ? "C3" : " ");
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fputs_filtered ("\n", file);
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fprintf_filtered (file,
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" TOP: %d\n", ((status >> 11) & 7));
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}
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/* Print the control word CONTROL. */
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static void
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print_i387_control_word (unsigned int control, struct ui_file *file)
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{
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fprintf_filtered (file, "Control Word: %s",
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hex_string_custom (control, 4));
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fputs_filtered (" ", file);
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fprintf_filtered (file, " %s", (control & 0x0001) ? "IM" : " ");
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fprintf_filtered (file, " %s", (control & 0x0002) ? "DM" : " ");
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fprintf_filtered (file, " %s", (control & 0x0004) ? "ZM" : " ");
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fprintf_filtered (file, " %s", (control & 0x0008) ? "OM" : " ");
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fprintf_filtered (file, " %s", (control & 0x0010) ? "UM" : " ");
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fprintf_filtered (file, " %s", (control & 0x0020) ? "PM" : " ");
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fputs_filtered ("\n", file);
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fputs_filtered (" PC: ", file);
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switch ((control >> 8) & 3)
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{
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case 0:
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fputs_filtered ("Single Precision (24-bits)\n", file);
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break;
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case 1:
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fputs_filtered ("Reserved\n", file);
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break;
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case 2:
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fputs_filtered ("Double Precision (53-bits)\n", file);
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break;
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case 3:
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fputs_filtered ("Extended Precision (64-bits)\n", file);
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break;
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}
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fputs_filtered (" RC: ", file);
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switch ((control >> 10) & 3)
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{
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case 0:
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fputs_filtered ("Round to nearest\n", file);
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break;
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case 1:
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fputs_filtered ("Round down\n", file);
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break;
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case 2:
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fputs_filtered ("Round up\n", file);
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break;
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case 3:
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fputs_filtered ("Round toward zero\n", file);
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break;
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}
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}
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/* Print out the i387 floating point state. Note that we ignore FRAME
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in the code below. That's OK since floating-point registers are
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never saved on the stack. */
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void
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i387_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
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struct frame_info *frame, const char *args)
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{
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struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
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ULONGEST fctrl;
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ULONGEST fstat;
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ULONGEST ftag;
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ULONGEST fiseg;
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ULONGEST fioff;
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ULONGEST foseg;
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ULONGEST fooff;
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ULONGEST fop;
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int fpreg;
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int top;
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gdb_assert (gdbarch == get_frame_arch (frame));
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fctrl = get_frame_register_unsigned (frame, I387_FCTRL_REGNUM (tdep));
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fstat = get_frame_register_unsigned (frame, I387_FSTAT_REGNUM (tdep));
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ftag = get_frame_register_unsigned (frame, I387_FTAG_REGNUM (tdep));
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fiseg = get_frame_register_unsigned (frame, I387_FISEG_REGNUM (tdep));
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fioff = get_frame_register_unsigned (frame, I387_FIOFF_REGNUM (tdep));
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foseg = get_frame_register_unsigned (frame, I387_FOSEG_REGNUM (tdep));
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fooff = get_frame_register_unsigned (frame, I387_FOOFF_REGNUM (tdep));
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fop = get_frame_register_unsigned (frame, I387_FOP_REGNUM (tdep));
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| 230 |
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top = ((fstat >> 11) & 7);
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for (fpreg = 7; fpreg >= 0; fpreg--)
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{
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| 234 |
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gdb_byte raw[I386_MAX_REGISTER_SIZE];
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int tag = (ftag >> (fpreg * 2)) & 3;
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int i;
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| 237 |
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fprintf_filtered (file, "%sR%d: ", fpreg == top ? "=>" : " ", fpreg);
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| 239 |
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| 240 |
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switch (tag)
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| 241 |
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{
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| 242 |
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case 0:
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| 243 |
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fputs_filtered ("Valid ", file);
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| 244 |
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break;
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| 245 |
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case 1:
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| 246 |
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fputs_filtered ("Zero ", file);
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| 247 |
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break;
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| 248 |
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case 2:
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| 249 |
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fputs_filtered ("Special ", file);
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| 250 |
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break;
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| 251 |
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case 3:
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| 252 |
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fputs_filtered ("Empty ", file);
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| 253 |
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break;
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| 254 |
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}
|
| 255 |
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| 256 |
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get_frame_register (frame, (fpreg + 8 - top) % 8 + I387_ST0_REGNUM (tdep),
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| 257 |
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raw);
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| 258 |
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| 259 |
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fputs_filtered ("0x", file);
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| 260 |
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for (i = 9; i >= 0; i--)
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| 261 |
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fprintf_filtered (file, "%02x", raw[i]);
|
| 262 |
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| 263 |
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if (tag != 3)
|
| 264 |
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print_i387_ext (gdbarch, raw, file);
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| 265 |
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| 266 |
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fputs_filtered ("\n", file);
|
| 267 |
|
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}
|
| 268 |
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|
| 269 |
|
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fputs_filtered ("\n", file);
|
| 270 |
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| 271 |
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print_i387_status_word (fstat, file);
|
| 272 |
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print_i387_control_word (fctrl, file);
|
| 273 |
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fprintf_filtered (file, "Tag Word: %s\n",
|
| 274 |
|
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hex_string_custom (ftag, 4));
|
| 275 |
|
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fprintf_filtered (file, "Instruction Pointer: %s:",
|
| 276 |
|
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hex_string_custom (fiseg, 2));
|
| 277 |
|
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fprintf_filtered (file, "%s\n", hex_string_custom (fioff, 8));
|
| 278 |
|
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fprintf_filtered (file, "Operand Pointer: %s:",
|
| 279 |
|
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hex_string_custom (foseg, 2));
|
| 280 |
|
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fprintf_filtered (file, "%s\n", hex_string_custom (fooff, 8));
|
| 281 |
|
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fprintf_filtered (file, "Opcode: %s\n",
|
| 282 |
|
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hex_string_custom (fop ? (fop | 0xd800) : 0, 4));
|
| 283 |
|
|
}
|
| 284 |
|
|
|
| 285 |
|
|
|
| 286 |
|
|
/* Return nonzero if a value of type TYPE stored in register REGNUM
|
| 287 |
|
|
needs any special handling. */
|
| 288 |
|
|
|
| 289 |
|
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int
|
| 290 |
|
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i387_convert_register_p (struct gdbarch *gdbarch, int regnum, struct type *type)
|
| 291 |
|
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{
|
| 292 |
|
|
if (i386_fp_regnum_p (gdbarch, regnum))
|
| 293 |
|
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{
|
| 294 |
|
|
/* Floating point registers must be converted unless we are
|
| 295 |
|
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accessing them in their hardware type. */
|
| 296 |
|
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if (type == i387_ext_type (gdbarch))
|
| 297 |
|
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return 0;
|
| 298 |
|
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else
|
| 299 |
|
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return 1;
|
| 300 |
|
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}
|
| 301 |
|
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|
| 302 |
|
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return 0;
|
| 303 |
|
|
}
|
| 304 |
|
|
|
| 305 |
|
|
/* Read a value of type TYPE from register REGNUM in frame FRAME, and
|
| 306 |
|
|
return its contents in TO. */
|
| 307 |
|
|
|
| 308 |
|
|
void
|
| 309 |
|
|
i387_register_to_value (struct frame_info *frame, int regnum,
|
| 310 |
|
|
struct type *type, gdb_byte *to)
|
| 311 |
|
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{
|
| 312 |
|
|
struct gdbarch *gdbarch = get_frame_arch (frame);
|
| 313 |
|
|
gdb_byte from[I386_MAX_REGISTER_SIZE];
|
| 314 |
|
|
|
| 315 |
|
|
gdb_assert (i386_fp_regnum_p (gdbarch, regnum));
|
| 316 |
|
|
|
| 317 |
|
|
/* We only support floating-point values. */
|
| 318 |
|
|
if (TYPE_CODE (type) != TYPE_CODE_FLT)
|
| 319 |
|
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{
|
| 320 |
|
|
warning (_("Cannot convert floating-point register value "
|
| 321 |
|
|
"to non-floating-point type."));
|
| 322 |
|
|
return;
|
| 323 |
|
|
}
|
| 324 |
|
|
|
| 325 |
|
|
/* Convert to TYPE. */
|
| 326 |
|
|
get_frame_register (frame, regnum, from);
|
| 327 |
|
|
convert_typed_floating (from, i387_ext_type (gdbarch), to, type);
|
| 328 |
|
|
}
|
| 329 |
|
|
|
| 330 |
|
|
/* Write the contents FROM of a value of type TYPE into register
|
| 331 |
|
|
REGNUM in frame FRAME. */
|
| 332 |
|
|
|
| 333 |
|
|
void
|
| 334 |
|
|
i387_value_to_register (struct frame_info *frame, int regnum,
|
| 335 |
|
|
struct type *type, const gdb_byte *from)
|
| 336 |
|
|
{
|
| 337 |
|
|
struct gdbarch *gdbarch = get_frame_arch (frame);
|
| 338 |
|
|
gdb_byte to[I386_MAX_REGISTER_SIZE];
|
| 339 |
|
|
|
| 340 |
|
|
gdb_assert (i386_fp_regnum_p (gdbarch, regnum));
|
| 341 |
|
|
|
| 342 |
|
|
/* We only support floating-point values. */
|
| 343 |
|
|
if (TYPE_CODE (type) != TYPE_CODE_FLT)
|
| 344 |
|
|
{
|
| 345 |
|
|
warning (_("Cannot convert non-floating-point type "
|
| 346 |
|
|
"to floating-point register value."));
|
| 347 |
|
|
return;
|
| 348 |
|
|
}
|
| 349 |
|
|
|
| 350 |
|
|
/* Convert from TYPE. */
|
| 351 |
|
|
convert_typed_floating (from, type, to, i387_ext_type (gdbarch));
|
| 352 |
|
|
put_frame_register (frame, regnum, to);
|
| 353 |
|
|
}
|
| 354 |
|
|
|
| 355 |
|
|
|
| 356 |
|
|
/* Handle FSAVE and FXSAVE formats. */
|
| 357 |
|
|
|
| 358 |
|
|
/* At fsave_offset[REGNUM] you'll find the offset to the location in
|
| 359 |
|
|
the data structure used by the "fsave" instruction where GDB
|
| 360 |
|
|
register REGNUM is stored. */
|
| 361 |
|
|
|
| 362 |
|
|
static int fsave_offset[] =
|
| 363 |
|
|
{
|
| 364 |
|
|
28 + 0 * 10, /* %st(0) ... */
|
| 365 |
|
|
28 + 1 * 10,
|
| 366 |
|
|
28 + 2 * 10,
|
| 367 |
|
|
28 + 3 * 10,
|
| 368 |
|
|
28 + 4 * 10,
|
| 369 |
|
|
28 + 5 * 10,
|
| 370 |
|
|
28 + 6 * 10,
|
| 371 |
|
|
28 + 7 * 10, /* ... %st(7). */
|
| 372 |
|
|
0, /* `fctrl' (16 bits). */
|
| 373 |
|
|
4, /* `fstat' (16 bits). */
|
| 374 |
|
|
8, /* `ftag' (16 bits). */
|
| 375 |
|
|
16, /* `fiseg' (16 bits). */
|
| 376 |
|
|
12, /* `fioff'. */
|
| 377 |
|
|
24, /* `foseg' (16 bits). */
|
| 378 |
|
|
20, /* `fooff'. */
|
| 379 |
|
|
18 /* `fop' (bottom 11 bits). */
|
| 380 |
|
|
};
|
| 381 |
|
|
|
| 382 |
|
|
#define FSAVE_ADDR(tdep, fsave, regnum) \
|
| 383 |
|
|
(fsave + fsave_offset[regnum - I387_ST0_REGNUM (tdep)])
|
| 384 |
|
|
|
| 385 |
|
|
|
| 386 |
|
|
/* Fill register REGNUM in REGCACHE with the appropriate value from
|
| 387 |
|
|
*FSAVE. This function masks off any of the reserved bits in
|
| 388 |
|
|
*FSAVE. */
|
| 389 |
|
|
|
| 390 |
|
|
void
|
| 391 |
|
|
i387_supply_fsave (struct regcache *regcache, int regnum, const void *fsave)
|
| 392 |
|
|
{
|
| 393 |
|
|
struct gdbarch *gdbarch = get_regcache_arch (regcache);
|
| 394 |
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
| 395 |
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
| 396 |
|
|
const gdb_byte *regs = fsave;
|
| 397 |
|
|
int i;
|
| 398 |
|
|
|
| 399 |
|
|
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
|
| 400 |
|
|
|
| 401 |
|
|
for (i = I387_ST0_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
|
| 402 |
|
|
if (regnum == -1 || regnum == i)
|
| 403 |
|
|
{
|
| 404 |
|
|
if (fsave == NULL)
|
| 405 |
|
|
{
|
| 406 |
|
|
regcache_raw_supply (regcache, i, NULL);
|
| 407 |
|
|
continue;
|
| 408 |
|
|
}
|
| 409 |
|
|
|
| 410 |
|
|
/* Most of the FPU control registers occupy only 16 bits in the
|
| 411 |
|
|
fsave area. Give those a special treatment. */
|
| 412 |
|
|
if (i >= I387_FCTRL_REGNUM (tdep)
|
| 413 |
|
|
&& i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
|
| 414 |
|
|
{
|
| 415 |
|
|
gdb_byte val[4];
|
| 416 |
|
|
|
| 417 |
|
|
memcpy (val, FSAVE_ADDR (tdep, regs, i), 2);
|
| 418 |
|
|
val[2] = val[3] = 0;
|
| 419 |
|
|
if (i == I387_FOP_REGNUM (tdep))
|
| 420 |
|
|
val[1] &= ((1 << 3) - 1);
|
| 421 |
|
|
regcache_raw_supply (regcache, i, val);
|
| 422 |
|
|
}
|
| 423 |
|
|
else
|
| 424 |
|
|
regcache_raw_supply (regcache, i, FSAVE_ADDR (tdep, regs, i));
|
| 425 |
|
|
}
|
| 426 |
|
|
|
| 427 |
|
|
/* Provide dummy values for the SSE registers. */
|
| 428 |
|
|
for (i = I387_XMM0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
|
| 429 |
|
|
if (regnum == -1 || regnum == i)
|
| 430 |
|
|
regcache_raw_supply (regcache, i, NULL);
|
| 431 |
|
|
if (regnum == -1 || regnum == I387_MXCSR_REGNUM (tdep))
|
| 432 |
|
|
{
|
| 433 |
|
|
gdb_byte buf[4];
|
| 434 |
|
|
|
| 435 |
|
|
store_unsigned_integer (buf, 4, byte_order, 0x1f80);
|
| 436 |
|
|
regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), buf);
|
| 437 |
|
|
}
|
| 438 |
|
|
}
|
| 439 |
|
|
|
| 440 |
|
|
/* Fill register REGNUM (if it is a floating-point register) in *FSAVE
|
| 441 |
|
|
with the value from REGCACHE. If REGNUM is -1, do this for all
|
| 442 |
|
|
registers. This function doesn't touch any of the reserved bits in
|
| 443 |
|
|
*FSAVE. */
|
| 444 |
|
|
|
| 445 |
|
|
void
|
| 446 |
|
|
i387_collect_fsave (const struct regcache *regcache, int regnum, void *fsave)
|
| 447 |
|
|
{
|
| 448 |
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
|
| 449 |
|
|
gdb_byte *regs = fsave;
|
| 450 |
|
|
int i;
|
| 451 |
|
|
|
| 452 |
|
|
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
|
| 453 |
|
|
|
| 454 |
|
|
for (i = I387_ST0_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
|
| 455 |
|
|
if (regnum == -1 || regnum == i)
|
| 456 |
|
|
{
|
| 457 |
|
|
/* Most of the FPU control registers occupy only 16 bits in
|
| 458 |
|
|
the fsave area. Give those a special treatment. */
|
| 459 |
|
|
if (i >= I387_FCTRL_REGNUM (tdep)
|
| 460 |
|
|
&& i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
|
| 461 |
|
|
{
|
| 462 |
|
|
gdb_byte buf[4];
|
| 463 |
|
|
|
| 464 |
|
|
regcache_raw_collect (regcache, i, buf);
|
| 465 |
|
|
|
| 466 |
|
|
if (i == I387_FOP_REGNUM (tdep))
|
| 467 |
|
|
{
|
| 468 |
|
|
/* The opcode occupies only 11 bits. Make sure we
|
| 469 |
|
|
don't touch the other bits. */
|
| 470 |
|
|
buf[1] &= ((1 << 3) - 1);
|
| 471 |
|
|
buf[1] |= ((FSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
|
| 472 |
|
|
}
|
| 473 |
|
|
memcpy (FSAVE_ADDR (tdep, regs, i), buf, 2);
|
| 474 |
|
|
}
|
| 475 |
|
|
else
|
| 476 |
|
|
regcache_raw_collect (regcache, i, FSAVE_ADDR (tdep, regs, i));
|
| 477 |
|
|
}
|
| 478 |
|
|
}
|
| 479 |
|
|
|
| 480 |
|
|
|
| 481 |
|
|
/* At fxsave_offset[REGNUM] you'll find the offset to the location in
|
| 482 |
|
|
the data structure used by the "fxsave" instruction where GDB
|
| 483 |
|
|
register REGNUM is stored. */
|
| 484 |
|
|
|
| 485 |
|
|
static int fxsave_offset[] =
|
| 486 |
|
|
{
|
| 487 |
|
|
32, /* %st(0) through ... */
|
| 488 |
|
|
48,
|
| 489 |
|
|
64,
|
| 490 |
|
|
80,
|
| 491 |
|
|
96,
|
| 492 |
|
|
112,
|
| 493 |
|
|
128,
|
| 494 |
|
|
144, /* ... %st(7) (80 bits each). */
|
| 495 |
|
|
0, /* `fctrl' (16 bits). */
|
| 496 |
|
|
2, /* `fstat' (16 bits). */
|
| 497 |
|
|
4, /* `ftag' (16 bits). */
|
| 498 |
|
|
12, /* `fiseg' (16 bits). */
|
| 499 |
|
|
8, /* `fioff'. */
|
| 500 |
|
|
20, /* `foseg' (16 bits). */
|
| 501 |
|
|
16, /* `fooff'. */
|
| 502 |
|
|
6, /* `fop' (bottom 11 bits). */
|
| 503 |
|
|
160 + 0 * 16, /* %xmm0 through ... */
|
| 504 |
|
|
160 + 1 * 16,
|
| 505 |
|
|
160 + 2 * 16,
|
| 506 |
|
|
160 + 3 * 16,
|
| 507 |
|
|
160 + 4 * 16,
|
| 508 |
|
|
160 + 5 * 16,
|
| 509 |
|
|
160 + 6 * 16,
|
| 510 |
|
|
160 + 7 * 16,
|
| 511 |
|
|
160 + 8 * 16,
|
| 512 |
|
|
160 + 9 * 16,
|
| 513 |
|
|
160 + 10 * 16,
|
| 514 |
|
|
160 + 11 * 16,
|
| 515 |
|
|
160 + 12 * 16,
|
| 516 |
|
|
160 + 13 * 16,
|
| 517 |
|
|
160 + 14 * 16,
|
| 518 |
|
|
160 + 15 * 16, /* ... %xmm15 (128 bits each). */
|
| 519 |
|
|
};
|
| 520 |
|
|
|
| 521 |
|
|
#define FXSAVE_ADDR(tdep, fxsave, regnum) \
|
| 522 |
|
|
(fxsave + fxsave_offset[regnum - I387_ST0_REGNUM (tdep)])
|
| 523 |
|
|
|
| 524 |
|
|
/* We made an unfortunate choice in putting %mxcsr after the SSE
|
| 525 |
|
|
registers %xmm0-%xmm7 instead of before, since it makes supporting
|
| 526 |
|
|
the registers %xmm8-%xmm15 on AMD64 a bit involved. Therefore we
|
| 527 |
|
|
don't include the offset for %mxcsr here above. */
|
| 528 |
|
|
|
| 529 |
|
|
#define FXSAVE_MXCSR_ADDR(fxsave) (fxsave + 24)
|
| 530 |
|
|
|
| 531 |
|
|
static int i387_tag (const gdb_byte *raw);
|
| 532 |
|
|
|
| 533 |
|
|
|
| 534 |
|
|
/* Fill register REGNUM in REGCACHE with the appropriate
|
| 535 |
|
|
floating-point or SSE register value from *FXSAVE. This function
|
| 536 |
|
|
masks off any of the reserved bits in *FXSAVE. */
|
| 537 |
|
|
|
| 538 |
|
|
void
|
| 539 |
|
|
i387_supply_fxsave (struct regcache *regcache, int regnum, const void *fxsave)
|
| 540 |
|
|
{
|
| 541 |
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
|
| 542 |
|
|
const gdb_byte *regs = fxsave;
|
| 543 |
|
|
int i;
|
| 544 |
|
|
|
| 545 |
|
|
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
|
| 546 |
|
|
gdb_assert (tdep->num_xmm_regs > 0);
|
| 547 |
|
|
|
| 548 |
|
|
for (i = I387_ST0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
|
| 549 |
|
|
if (regnum == -1 || regnum == i)
|
| 550 |
|
|
{
|
| 551 |
|
|
if (regs == NULL)
|
| 552 |
|
|
{
|
| 553 |
|
|
regcache_raw_supply (regcache, i, NULL);
|
| 554 |
|
|
continue;
|
| 555 |
|
|
}
|
| 556 |
|
|
|
| 557 |
|
|
/* Most of the FPU control registers occupy only 16 bits in
|
| 558 |
|
|
the fxsave area. Give those a special treatment. */
|
| 559 |
|
|
if (i >= I387_FCTRL_REGNUM (tdep) && i < I387_XMM0_REGNUM (tdep)
|
| 560 |
|
|
&& i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
|
| 561 |
|
|
{
|
| 562 |
|
|
gdb_byte val[4];
|
| 563 |
|
|
|
| 564 |
|
|
memcpy (val, FXSAVE_ADDR (tdep, regs, i), 2);
|
| 565 |
|
|
val[2] = val[3] = 0;
|
| 566 |
|
|
if (i == I387_FOP_REGNUM (tdep))
|
| 567 |
|
|
val[1] &= ((1 << 3) - 1);
|
| 568 |
|
|
else if (i== I387_FTAG_REGNUM (tdep))
|
| 569 |
|
|
{
|
| 570 |
|
|
/* The fxsave area contains a simplified version of
|
| 571 |
|
|
the tag word. We have to look at the actual 80-bit
|
| 572 |
|
|
FP data to recreate the traditional i387 tag word. */
|
| 573 |
|
|
|
| 574 |
|
|
unsigned long ftag = 0;
|
| 575 |
|
|
int fpreg;
|
| 576 |
|
|
int top;
|
| 577 |
|
|
|
| 578 |
|
|
top = ((FXSAVE_ADDR (tdep, regs,
|
| 579 |
|
|
I387_FSTAT_REGNUM (tdep)))[1] >> 3);
|
| 580 |
|
|
top &= 0x7;
|
| 581 |
|
|
|
| 582 |
|
|
for (fpreg = 7; fpreg >= 0; fpreg--)
|
| 583 |
|
|
{
|
| 584 |
|
|
int tag;
|
| 585 |
|
|
|
| 586 |
|
|
if (val[0] & (1 << fpreg))
|
| 587 |
|
|
{
|
| 588 |
|
|
int regnum = (fpreg + 8 - top) % 8
|
| 589 |
|
|
+ I387_ST0_REGNUM (tdep);
|
| 590 |
|
|
tag = i387_tag (FXSAVE_ADDR (tdep, regs, regnum));
|
| 591 |
|
|
}
|
| 592 |
|
|
else
|
| 593 |
|
|
tag = 3; /* Empty */
|
| 594 |
|
|
|
| 595 |
|
|
ftag |= tag << (2 * fpreg);
|
| 596 |
|
|
}
|
| 597 |
|
|
val[0] = ftag & 0xff;
|
| 598 |
|
|
val[1] = (ftag >> 8) & 0xff;
|
| 599 |
|
|
}
|
| 600 |
|
|
regcache_raw_supply (regcache, i, val);
|
| 601 |
|
|
}
|
| 602 |
|
|
else
|
| 603 |
|
|
regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i));
|
| 604 |
|
|
}
|
| 605 |
|
|
|
| 606 |
|
|
if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
|
| 607 |
|
|
{
|
| 608 |
|
|
if (regs == NULL)
|
| 609 |
|
|
regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), NULL);
|
| 610 |
|
|
else
|
| 611 |
|
|
regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep),
|
| 612 |
|
|
FXSAVE_MXCSR_ADDR (regs));
|
| 613 |
|
|
}
|
| 614 |
|
|
}
|
| 615 |
|
|
|
| 616 |
|
|
/* Fill register REGNUM (if it is a floating-point or SSE register) in
|
| 617 |
|
|
*FXSAVE with the value from REGCACHE. If REGNUM is -1, do this for
|
| 618 |
|
|
all registers. This function doesn't touch any of the reserved
|
| 619 |
|
|
bits in *FXSAVE. */
|
| 620 |
|
|
|
| 621 |
|
|
void
|
| 622 |
|
|
i387_collect_fxsave (const struct regcache *regcache, int regnum, void *fxsave)
|
| 623 |
|
|
{
|
| 624 |
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
|
| 625 |
|
|
gdb_byte *regs = fxsave;
|
| 626 |
|
|
int i;
|
| 627 |
|
|
|
| 628 |
|
|
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
|
| 629 |
|
|
gdb_assert (tdep->num_xmm_regs > 0);
|
| 630 |
|
|
|
| 631 |
|
|
for (i = I387_ST0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
|
| 632 |
|
|
if (regnum == -1 || regnum == i)
|
| 633 |
|
|
{
|
| 634 |
|
|
/* Most of the FPU control registers occupy only 16 bits in
|
| 635 |
|
|
the fxsave area. Give those a special treatment. */
|
| 636 |
|
|
if (i >= I387_FCTRL_REGNUM (tdep) && i < I387_XMM0_REGNUM (tdep)
|
| 637 |
|
|
&& i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
|
| 638 |
|
|
{
|
| 639 |
|
|
gdb_byte buf[4];
|
| 640 |
|
|
|
| 641 |
|
|
regcache_raw_collect (regcache, i, buf);
|
| 642 |
|
|
|
| 643 |
|
|
if (i == I387_FOP_REGNUM (tdep))
|
| 644 |
|
|
{
|
| 645 |
|
|
/* The opcode occupies only 11 bits. Make sure we
|
| 646 |
|
|
don't touch the other bits. */
|
| 647 |
|
|
buf[1] &= ((1 << 3) - 1);
|
| 648 |
|
|
buf[1] |= ((FXSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
|
| 649 |
|
|
}
|
| 650 |
|
|
else if (i == I387_FTAG_REGNUM (tdep))
|
| 651 |
|
|
{
|
| 652 |
|
|
/* Converting back is much easier. */
|
| 653 |
|
|
|
| 654 |
|
|
unsigned short ftag;
|
| 655 |
|
|
int fpreg;
|
| 656 |
|
|
|
| 657 |
|
|
ftag = (buf[1] << 8) | buf[0];
|
| 658 |
|
|
buf[0] = 0;
|
| 659 |
|
|
buf[1] = 0;
|
| 660 |
|
|
|
| 661 |
|
|
for (fpreg = 7; fpreg >= 0; fpreg--)
|
| 662 |
|
|
{
|
| 663 |
|
|
int tag = (ftag >> (fpreg * 2)) & 3;
|
| 664 |
|
|
|
| 665 |
|
|
if (tag != 3)
|
| 666 |
|
|
buf[0] |= (1 << fpreg);
|
| 667 |
|
|
}
|
| 668 |
|
|
}
|
| 669 |
|
|
memcpy (FXSAVE_ADDR (tdep, regs, i), buf, 2);
|
| 670 |
|
|
}
|
| 671 |
|
|
else
|
| 672 |
|
|
regcache_raw_collect (regcache, i, FXSAVE_ADDR (tdep, regs, i));
|
| 673 |
|
|
}
|
| 674 |
|
|
|
| 675 |
|
|
if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
|
| 676 |
|
|
regcache_raw_collect (regcache, I387_MXCSR_REGNUM (tdep),
|
| 677 |
|
|
FXSAVE_MXCSR_ADDR (regs));
|
| 678 |
|
|
}
|
| 679 |
|
|
|
| 680 |
|
|
/* `xstate_bv' is at byte offset 512. */
|
| 681 |
|
|
#define XSAVE_XSTATE_BV_ADDR(xsave) (xsave + 512)
|
| 682 |
|
|
|
| 683 |
|
|
/* At xsave_avxh_offset[REGNUM] you'll find the offset to the location in
|
| 684 |
|
|
the upper 128bit of AVX register data structure used by the "xsave"
|
| 685 |
|
|
instruction where GDB register REGNUM is stored. */
|
| 686 |
|
|
|
| 687 |
|
|
static int xsave_avxh_offset[] =
|
| 688 |
|
|
{
|
| 689 |
|
|
576 + 0 * 16, /* Upper 128bit of %ymm0 through ... */
|
| 690 |
|
|
576 + 1 * 16,
|
| 691 |
|
|
576 + 2 * 16,
|
| 692 |
|
|
576 + 3 * 16,
|
| 693 |
|
|
576 + 4 * 16,
|
| 694 |
|
|
576 + 5 * 16,
|
| 695 |
|
|
576 + 6 * 16,
|
| 696 |
|
|
576 + 7 * 16,
|
| 697 |
|
|
576 + 8 * 16,
|
| 698 |
|
|
576 + 9 * 16,
|
| 699 |
|
|
576 + 10 * 16,
|
| 700 |
|
|
576 + 11 * 16,
|
| 701 |
|
|
576 + 12 * 16,
|
| 702 |
|
|
576 + 13 * 16,
|
| 703 |
|
|
576 + 14 * 16,
|
| 704 |
|
|
576 + 15 * 16 /* Upper 128bit of ... %ymm15 (128 bits each). */
|
| 705 |
|
|
};
|
| 706 |
|
|
|
| 707 |
|
|
#define XSAVE_AVXH_ADDR(tdep, xsave, regnum) \
|
| 708 |
|
|
(xsave + xsave_avxh_offset[regnum - I387_YMM0H_REGNUM (tdep)])
|
| 709 |
|
|
|
| 710 |
|
|
/* Similar to i387_supply_fxsave, but use XSAVE extended state. */
|
| 711 |
|
|
|
| 712 |
|
|
void
|
| 713 |
|
|
i387_supply_xsave (struct regcache *regcache, int regnum,
|
| 714 |
|
|
const void *xsave)
|
| 715 |
|
|
{
|
| 716 |
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
|
| 717 |
|
|
const gdb_byte *regs = xsave;
|
| 718 |
|
|
int i;
|
| 719 |
|
|
unsigned int clear_bv;
|
| 720 |
|
|
const gdb_byte *p;
|
| 721 |
|
|
enum
|
| 722 |
|
|
{
|
| 723 |
|
|
none = 0x0,
|
| 724 |
|
|
x87 = 0x1,
|
| 725 |
|
|
sse = 0x2,
|
| 726 |
|
|
avxh = 0x4,
|
| 727 |
|
|
all = x87 | sse | avxh
|
| 728 |
|
|
} regclass;
|
| 729 |
|
|
|
| 730 |
|
|
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
|
| 731 |
|
|
gdb_assert (tdep->num_xmm_regs > 0);
|
| 732 |
|
|
|
| 733 |
|
|
if (regnum == -1)
|
| 734 |
|
|
regclass = all;
|
| 735 |
|
|
else if (regnum >= I387_YMM0H_REGNUM (tdep)
|
| 736 |
|
|
&& regnum < I387_YMMENDH_REGNUM (tdep))
|
| 737 |
|
|
regclass = avxh;
|
| 738 |
|
|
else if (regnum >= I387_XMM0_REGNUM(tdep)
|
| 739 |
|
|
&& regnum < I387_MXCSR_REGNUM (tdep))
|
| 740 |
|
|
regclass = sse;
|
| 741 |
|
|
else if (regnum >= I387_ST0_REGNUM (tdep)
|
| 742 |
|
|
&& regnum < I387_FCTRL_REGNUM (tdep))
|
| 743 |
|
|
regclass = x87;
|
| 744 |
|
|
else
|
| 745 |
|
|
regclass = none;
|
| 746 |
|
|
|
| 747 |
|
|
if (regs != NULL && regclass != none)
|
| 748 |
|
|
{
|
| 749 |
|
|
/* Get `xstat_bv'. */
|
| 750 |
|
|
const gdb_byte *xstate_bv_p = XSAVE_XSTATE_BV_ADDR (regs);
|
| 751 |
|
|
|
| 752 |
|
|
/* The supported bits in `xstat_bv' are 1 byte. Clear part in
|
| 753 |
|
|
vector registers if its bit in xstat_bv is zero. */
|
| 754 |
|
|
clear_bv = (~(*xstate_bv_p)) & tdep->xcr0;
|
| 755 |
|
|
}
|
| 756 |
|
|
else
|
| 757 |
|
|
clear_bv = I386_XSTATE_AVX_MASK;
|
| 758 |
|
|
|
| 759 |
|
|
switch (regclass)
|
| 760 |
|
|
{
|
| 761 |
|
|
case none:
|
| 762 |
|
|
break;
|
| 763 |
|
|
|
| 764 |
|
|
case avxh:
|
| 765 |
|
|
if ((clear_bv & I386_XSTATE_AVX))
|
| 766 |
|
|
p = NULL;
|
| 767 |
|
|
else
|
| 768 |
|
|
p = XSAVE_AVXH_ADDR (tdep, regs, regnum);
|
| 769 |
|
|
regcache_raw_supply (regcache, regnum, p);
|
| 770 |
|
|
return;
|
| 771 |
|
|
|
| 772 |
|
|
case sse:
|
| 773 |
|
|
if ((clear_bv & I386_XSTATE_SSE))
|
| 774 |
|
|
p = NULL;
|
| 775 |
|
|
else
|
| 776 |
|
|
p = FXSAVE_ADDR (tdep, regs, regnum);
|
| 777 |
|
|
regcache_raw_supply (regcache, regnum, p);
|
| 778 |
|
|
return;
|
| 779 |
|
|
|
| 780 |
|
|
case x87:
|
| 781 |
|
|
if ((clear_bv & I386_XSTATE_X87))
|
| 782 |
|
|
p = NULL;
|
| 783 |
|
|
else
|
| 784 |
|
|
p = FXSAVE_ADDR (tdep, regs, regnum);
|
| 785 |
|
|
regcache_raw_supply (regcache, regnum, p);
|
| 786 |
|
|
return;
|
| 787 |
|
|
|
| 788 |
|
|
case all:
|
| 789 |
|
|
/* Hanle the upper YMM registers. */
|
| 790 |
|
|
if ((tdep->xcr0 & I386_XSTATE_AVX))
|
| 791 |
|
|
{
|
| 792 |
|
|
if ((clear_bv & I386_XSTATE_AVX))
|
| 793 |
|
|
p = NULL;
|
| 794 |
|
|
else
|
| 795 |
|
|
p = regs;
|
| 796 |
|
|
|
| 797 |
|
|
for (i = I387_YMM0H_REGNUM (tdep);
|
| 798 |
|
|
i < I387_YMMENDH_REGNUM (tdep); i++)
|
| 799 |
|
|
{
|
| 800 |
|
|
if (p != NULL)
|
| 801 |
|
|
p = XSAVE_AVXH_ADDR (tdep, regs, i);
|
| 802 |
|
|
regcache_raw_supply (regcache, i, p);
|
| 803 |
|
|
}
|
| 804 |
|
|
}
|
| 805 |
|
|
|
| 806 |
|
|
/* Handle the XMM registers. */
|
| 807 |
|
|
if ((tdep->xcr0 & I386_XSTATE_SSE))
|
| 808 |
|
|
{
|
| 809 |
|
|
if ((clear_bv & I386_XSTATE_SSE))
|
| 810 |
|
|
p = NULL;
|
| 811 |
|
|
else
|
| 812 |
|
|
p = regs;
|
| 813 |
|
|
|
| 814 |
|
|
for (i = I387_XMM0_REGNUM (tdep);
|
| 815 |
|
|
i < I387_MXCSR_REGNUM (tdep); i++)
|
| 816 |
|
|
{
|
| 817 |
|
|
if (p != NULL)
|
| 818 |
|
|
p = FXSAVE_ADDR (tdep, regs, i);
|
| 819 |
|
|
regcache_raw_supply (regcache, i, p);
|
| 820 |
|
|
}
|
| 821 |
|
|
}
|
| 822 |
|
|
|
| 823 |
|
|
/* Handle the x87 registers. */
|
| 824 |
|
|
if ((tdep->xcr0 & I386_XSTATE_X87))
|
| 825 |
|
|
{
|
| 826 |
|
|
if ((clear_bv & I386_XSTATE_X87))
|
| 827 |
|
|
p = NULL;
|
| 828 |
|
|
else
|
| 829 |
|
|
p = regs;
|
| 830 |
|
|
|
| 831 |
|
|
for (i = I387_ST0_REGNUM (tdep);
|
| 832 |
|
|
i < I387_FCTRL_REGNUM (tdep); i++)
|
| 833 |
|
|
{
|
| 834 |
|
|
if (p != NULL)
|
| 835 |
|
|
p = FXSAVE_ADDR (tdep, regs, i);
|
| 836 |
|
|
regcache_raw_supply (regcache, i, p);
|
| 837 |
|
|
}
|
| 838 |
|
|
}
|
| 839 |
|
|
break;
|
| 840 |
|
|
}
|
| 841 |
|
|
|
| 842 |
|
|
/* Only handle x87 control registers. */
|
| 843 |
|
|
for (i = I387_FCTRL_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
|
| 844 |
|
|
if (regnum == -1 || regnum == i)
|
| 845 |
|
|
{
|
| 846 |
|
|
if (regs == NULL)
|
| 847 |
|
|
{
|
| 848 |
|
|
regcache_raw_supply (regcache, i, NULL);
|
| 849 |
|
|
continue;
|
| 850 |
|
|
}
|
| 851 |
|
|
|
| 852 |
|
|
/* Most of the FPU control registers occupy only 16 bits in
|
| 853 |
|
|
the xsave extended state. Give those a special treatment. */
|
| 854 |
|
|
if (i != I387_FIOFF_REGNUM (tdep)
|
| 855 |
|
|
&& i != I387_FOOFF_REGNUM (tdep))
|
| 856 |
|
|
{
|
| 857 |
|
|
gdb_byte val[4];
|
| 858 |
|
|
|
| 859 |
|
|
memcpy (val, FXSAVE_ADDR (tdep, regs, i), 2);
|
| 860 |
|
|
val[2] = val[3] = 0;
|
| 861 |
|
|
if (i == I387_FOP_REGNUM (tdep))
|
| 862 |
|
|
val[1] &= ((1 << 3) - 1);
|
| 863 |
|
|
else if (i== I387_FTAG_REGNUM (tdep))
|
| 864 |
|
|
{
|
| 865 |
|
|
/* The fxsave area contains a simplified version of
|
| 866 |
|
|
the tag word. We have to look at the actual 80-bit
|
| 867 |
|
|
FP data to recreate the traditional i387 tag word. */
|
| 868 |
|
|
|
| 869 |
|
|
unsigned long ftag = 0;
|
| 870 |
|
|
int fpreg;
|
| 871 |
|
|
int top;
|
| 872 |
|
|
|
| 873 |
|
|
top = ((FXSAVE_ADDR (tdep, regs,
|
| 874 |
|
|
I387_FSTAT_REGNUM (tdep)))[1] >> 3);
|
| 875 |
|
|
top &= 0x7;
|
| 876 |
|
|
|
| 877 |
|
|
for (fpreg = 7; fpreg >= 0; fpreg--)
|
| 878 |
|
|
{
|
| 879 |
|
|
int tag;
|
| 880 |
|
|
|
| 881 |
|
|
if (val[0] & (1 << fpreg))
|
| 882 |
|
|
{
|
| 883 |
|
|
int regnum = (fpreg + 8 - top) % 8
|
| 884 |
|
|
+ I387_ST0_REGNUM (tdep);
|
| 885 |
|
|
tag = i387_tag (FXSAVE_ADDR (tdep, regs, regnum));
|
| 886 |
|
|
}
|
| 887 |
|
|
else
|
| 888 |
|
|
tag = 3; /* Empty */
|
| 889 |
|
|
|
| 890 |
|
|
ftag |= tag << (2 * fpreg);
|
| 891 |
|
|
}
|
| 892 |
|
|
val[0] = ftag & 0xff;
|
| 893 |
|
|
val[1] = (ftag >> 8) & 0xff;
|
| 894 |
|
|
}
|
| 895 |
|
|
regcache_raw_supply (regcache, i, val);
|
| 896 |
|
|
}
|
| 897 |
|
|
else
|
| 898 |
|
|
regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i));
|
| 899 |
|
|
}
|
| 900 |
|
|
|
| 901 |
|
|
if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
|
| 902 |
|
|
{
|
| 903 |
|
|
p = regs == NULL ? NULL : FXSAVE_MXCSR_ADDR (regs);
|
| 904 |
|
|
regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), p);
|
| 905 |
|
|
}
|
| 906 |
|
|
}
|
| 907 |
|
|
|
| 908 |
|
|
/* Similar to i387_collect_fxsave, but use XSAVE extended state. */
|
| 909 |
|
|
|
| 910 |
|
|
void
|
| 911 |
|
|
i387_collect_xsave (const struct regcache *regcache, int regnum,
|
| 912 |
|
|
void *xsave, int gcore)
|
| 913 |
|
|
{
|
| 914 |
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
|
| 915 |
|
|
gdb_byte *regs = xsave;
|
| 916 |
|
|
int i;
|
| 917 |
|
|
enum
|
| 918 |
|
|
{
|
| 919 |
|
|
none = 0x0,
|
| 920 |
|
|
check = 0x1,
|
| 921 |
|
|
x87 = 0x2 | check,
|
| 922 |
|
|
sse = 0x4 | check,
|
| 923 |
|
|
avxh = 0x8 | check,
|
| 924 |
|
|
all = x87 | sse | avxh
|
| 925 |
|
|
} regclass;
|
| 926 |
|
|
|
| 927 |
|
|
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
|
| 928 |
|
|
gdb_assert (tdep->num_xmm_regs > 0);
|
| 929 |
|
|
|
| 930 |
|
|
if (regnum == -1)
|
| 931 |
|
|
regclass = all;
|
| 932 |
|
|
else if (regnum >= I387_YMM0H_REGNUM (tdep)
|
| 933 |
|
|
&& regnum < I387_YMMENDH_REGNUM (tdep))
|
| 934 |
|
|
regclass = avxh;
|
| 935 |
|
|
else if (regnum >= I387_XMM0_REGNUM(tdep)
|
| 936 |
|
|
&& regnum < I387_MXCSR_REGNUM (tdep))
|
| 937 |
|
|
regclass = sse;
|
| 938 |
|
|
else if (regnum >= I387_ST0_REGNUM (tdep)
|
| 939 |
|
|
&& regnum < I387_FCTRL_REGNUM (tdep))
|
| 940 |
|
|
regclass = x87;
|
| 941 |
|
|
else
|
| 942 |
|
|
regclass = none;
|
| 943 |
|
|
|
| 944 |
|
|
if (gcore)
|
| 945 |
|
|
{
|
| 946 |
|
|
/* Clear XSAVE extended state. */
|
| 947 |
|
|
memset (regs, 0, I386_XSTATE_SIZE (tdep->xcr0));
|
| 948 |
|
|
|
| 949 |
|
|
/* Update XCR0 and `xstate_bv' with XCR0 for gcore. */
|
| 950 |
|
|
if (tdep->xsave_xcr0_offset != -1)
|
| 951 |
|
|
memcpy (regs + tdep->xsave_xcr0_offset, &tdep->xcr0, 8);
|
| 952 |
|
|
memcpy (XSAVE_XSTATE_BV_ADDR (regs), &tdep->xcr0, 8);
|
| 953 |
|
|
}
|
| 954 |
|
|
|
| 955 |
|
|
if ((regclass & check))
|
| 956 |
|
|
{
|
| 957 |
|
|
gdb_byte raw[I386_MAX_REGISTER_SIZE];
|
| 958 |
|
|
gdb_byte *xstate_bv_p = XSAVE_XSTATE_BV_ADDR (regs);
|
| 959 |
|
|
unsigned int xstate_bv = 0;
|
| 960 |
|
|
/* The supported bits in `xstat_bv' are 1 byte. */
|
| 961 |
|
|
unsigned int clear_bv = (~(*xstate_bv_p)) & tdep->xcr0;
|
| 962 |
|
|
gdb_byte *p;
|
| 963 |
|
|
|
| 964 |
|
|
/* Clear register set if its bit in xstat_bv is zero. */
|
| 965 |
|
|
if (clear_bv)
|
| 966 |
|
|
{
|
| 967 |
|
|
if ((clear_bv & I386_XSTATE_AVX))
|
| 968 |
|
|
for (i = I387_YMM0H_REGNUM (tdep);
|
| 969 |
|
|
i < I387_YMMENDH_REGNUM (tdep); i++)
|
| 970 |
|
|
memset (XSAVE_AVXH_ADDR (tdep, regs, i), 0, 16);
|
| 971 |
|
|
|
| 972 |
|
|
if ((clear_bv & I386_XSTATE_SSE))
|
| 973 |
|
|
for (i = I387_XMM0_REGNUM (tdep);
|
| 974 |
|
|
i < I387_MXCSR_REGNUM (tdep); i++)
|
| 975 |
|
|
memset (FXSAVE_ADDR (tdep, regs, i), 0, 16);
|
| 976 |
|
|
|
| 977 |
|
|
if ((clear_bv & I386_XSTATE_X87))
|
| 978 |
|
|
for (i = I387_ST0_REGNUM (tdep);
|
| 979 |
|
|
i < I387_FCTRL_REGNUM (tdep); i++)
|
| 980 |
|
|
memset (FXSAVE_ADDR (tdep, regs, i), 0, 10);
|
| 981 |
|
|
}
|
| 982 |
|
|
|
| 983 |
|
|
if (regclass == all)
|
| 984 |
|
|
{
|
| 985 |
|
|
/* Check if any upper YMM registers are changed. */
|
| 986 |
|
|
if ((tdep->xcr0 & I386_XSTATE_AVX))
|
| 987 |
|
|
for (i = I387_YMM0H_REGNUM (tdep);
|
| 988 |
|
|
i < I387_YMMENDH_REGNUM (tdep); i++)
|
| 989 |
|
|
{
|
| 990 |
|
|
regcache_raw_collect (regcache, i, raw);
|
| 991 |
|
|
p = XSAVE_AVXH_ADDR (tdep, regs, i);
|
| 992 |
|
|
if (memcmp (raw, p, 16))
|
| 993 |
|
|
{
|
| 994 |
|
|
xstate_bv |= I386_XSTATE_AVX;
|
| 995 |
|
|
memcpy (p, raw, 16);
|
| 996 |
|
|
}
|
| 997 |
|
|
}
|
| 998 |
|
|
|
| 999 |
|
|
/* Check if any SSE registers are changed. */
|
| 1000 |
|
|
if ((tdep->xcr0 & I386_XSTATE_SSE))
|
| 1001 |
|
|
for (i = I387_XMM0_REGNUM (tdep);
|
| 1002 |
|
|
i < I387_MXCSR_REGNUM (tdep); i++)
|
| 1003 |
|
|
{
|
| 1004 |
|
|
regcache_raw_collect (regcache, i, raw);
|
| 1005 |
|
|
p = FXSAVE_ADDR (tdep, regs, i);
|
| 1006 |
|
|
if (memcmp (raw, p, 16))
|
| 1007 |
|
|
{
|
| 1008 |
|
|
xstate_bv |= I386_XSTATE_SSE;
|
| 1009 |
|
|
memcpy (p, raw, 16);
|
| 1010 |
|
|
}
|
| 1011 |
|
|
}
|
| 1012 |
|
|
|
| 1013 |
|
|
/* Check if any X87 registers are changed. */
|
| 1014 |
|
|
if ((tdep->xcr0 & I386_XSTATE_X87))
|
| 1015 |
|
|
for (i = I387_ST0_REGNUM (tdep);
|
| 1016 |
|
|
i < I387_FCTRL_REGNUM (tdep); i++)
|
| 1017 |
|
|
{
|
| 1018 |
|
|
regcache_raw_collect (regcache, i, raw);
|
| 1019 |
|
|
p = FXSAVE_ADDR (tdep, regs, i);
|
| 1020 |
|
|
if (memcmp (raw, p, 10))
|
| 1021 |
|
|
{
|
| 1022 |
|
|
xstate_bv |= I386_XSTATE_X87;
|
| 1023 |
|
|
memcpy (p, raw, 10);
|
| 1024 |
|
|
}
|
| 1025 |
|
|
}
|
| 1026 |
|
|
}
|
| 1027 |
|
|
else
|
| 1028 |
|
|
{
|
| 1029 |
|
|
/* Check if REGNUM is changed. */
|
| 1030 |
|
|
regcache_raw_collect (regcache, regnum, raw);
|
| 1031 |
|
|
|
| 1032 |
|
|
switch (regclass)
|
| 1033 |
|
|
{
|
| 1034 |
|
|
default:
|
| 1035 |
|
|
internal_error (__FILE__, __LINE__,
|
| 1036 |
|
|
_("invalid i387 regclass"));
|
| 1037 |
|
|
|
| 1038 |
|
|
case avxh:
|
| 1039 |
|
|
/* This is an upper YMM register. */
|
| 1040 |
|
|
p = XSAVE_AVXH_ADDR (tdep, regs, regnum);
|
| 1041 |
|
|
if (memcmp (raw, p, 16))
|
| 1042 |
|
|
{
|
| 1043 |
|
|
xstate_bv |= I386_XSTATE_AVX;
|
| 1044 |
|
|
memcpy (p, raw, 16);
|
| 1045 |
|
|
}
|
| 1046 |
|
|
break;
|
| 1047 |
|
|
|
| 1048 |
|
|
case sse:
|
| 1049 |
|
|
/* This is an SSE register. */
|
| 1050 |
|
|
p = FXSAVE_ADDR (tdep, regs, regnum);
|
| 1051 |
|
|
if (memcmp (raw, p, 16))
|
| 1052 |
|
|
{
|
| 1053 |
|
|
xstate_bv |= I386_XSTATE_SSE;
|
| 1054 |
|
|
memcpy (p, raw, 16);
|
| 1055 |
|
|
}
|
| 1056 |
|
|
break;
|
| 1057 |
|
|
|
| 1058 |
|
|
case x87:
|
| 1059 |
|
|
/* This is an x87 register. */
|
| 1060 |
|
|
p = FXSAVE_ADDR (tdep, regs, regnum);
|
| 1061 |
|
|
if (memcmp (raw, p, 10))
|
| 1062 |
|
|
{
|
| 1063 |
|
|
xstate_bv |= I386_XSTATE_X87;
|
| 1064 |
|
|
memcpy (p, raw, 10);
|
| 1065 |
|
|
}
|
| 1066 |
|
|
break;
|
| 1067 |
|
|
}
|
| 1068 |
|
|
}
|
| 1069 |
|
|
|
| 1070 |
|
|
/* Update the corresponding bits in `xstate_bv' if any SSE/AVX
|
| 1071 |
|
|
registers are changed. */
|
| 1072 |
|
|
if (xstate_bv)
|
| 1073 |
|
|
{
|
| 1074 |
|
|
/* The supported bits in `xstat_bv' are 1 byte. */
|
| 1075 |
|
|
*xstate_bv_p |= (gdb_byte) xstate_bv;
|
| 1076 |
|
|
|
| 1077 |
|
|
switch (regclass)
|
| 1078 |
|
|
{
|
| 1079 |
|
|
default:
|
| 1080 |
|
|
internal_error (__FILE__, __LINE__,
|
| 1081 |
|
|
_("invalid i387 regclass"));
|
| 1082 |
|
|
|
| 1083 |
|
|
case all:
|
| 1084 |
|
|
break;
|
| 1085 |
|
|
|
| 1086 |
|
|
case x87:
|
| 1087 |
|
|
case sse:
|
| 1088 |
|
|
case avxh:
|
| 1089 |
|
|
/* Register REGNUM has been updated. Return. */
|
| 1090 |
|
|
return;
|
| 1091 |
|
|
}
|
| 1092 |
|
|
}
|
| 1093 |
|
|
else
|
| 1094 |
|
|
{
|
| 1095 |
|
|
/* Return if REGNUM isn't changed. */
|
| 1096 |
|
|
if (regclass != all)
|
| 1097 |
|
|
return;
|
| 1098 |
|
|
}
|
| 1099 |
|
|
}
|
| 1100 |
|
|
|
| 1101 |
|
|
/* Only handle x87 control registers. */
|
| 1102 |
|
|
for (i = I387_FCTRL_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
|
| 1103 |
|
|
if (regnum == -1 || regnum == i)
|
| 1104 |
|
|
{
|
| 1105 |
|
|
/* Most of the FPU control registers occupy only 16 bits in
|
| 1106 |
|
|
the xsave extended state. Give those a special treatment. */
|
| 1107 |
|
|
if (i != I387_FIOFF_REGNUM (tdep)
|
| 1108 |
|
|
&& i != I387_FOOFF_REGNUM (tdep))
|
| 1109 |
|
|
{
|
| 1110 |
|
|
gdb_byte buf[4];
|
| 1111 |
|
|
|
| 1112 |
|
|
regcache_raw_collect (regcache, i, buf);
|
| 1113 |
|
|
|
| 1114 |
|
|
if (i == I387_FOP_REGNUM (tdep))
|
| 1115 |
|
|
{
|
| 1116 |
|
|
/* The opcode occupies only 11 bits. Make sure we
|
| 1117 |
|
|
don't touch the other bits. */
|
| 1118 |
|
|
buf[1] &= ((1 << 3) - 1);
|
| 1119 |
|
|
buf[1] |= ((FXSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
|
| 1120 |
|
|
}
|
| 1121 |
|
|
else if (i == I387_FTAG_REGNUM (tdep))
|
| 1122 |
|
|
{
|
| 1123 |
|
|
/* Converting back is much easier. */
|
| 1124 |
|
|
|
| 1125 |
|
|
unsigned short ftag;
|
| 1126 |
|
|
int fpreg;
|
| 1127 |
|
|
|
| 1128 |
|
|
ftag = (buf[1] << 8) | buf[0];
|
| 1129 |
|
|
buf[0] = 0;
|
| 1130 |
|
|
buf[1] = 0;
|
| 1131 |
|
|
|
| 1132 |
|
|
for (fpreg = 7; fpreg >= 0; fpreg--)
|
| 1133 |
|
|
{
|
| 1134 |
|
|
int tag = (ftag >> (fpreg * 2)) & 3;
|
| 1135 |
|
|
|
| 1136 |
|
|
if (tag != 3)
|
| 1137 |
|
|
buf[0] |= (1 << fpreg);
|
| 1138 |
|
|
}
|
| 1139 |
|
|
}
|
| 1140 |
|
|
memcpy (FXSAVE_ADDR (tdep, regs, i), buf, 2);
|
| 1141 |
|
|
}
|
| 1142 |
|
|
else
|
| 1143 |
|
|
regcache_raw_collect (regcache, i, FXSAVE_ADDR (tdep, regs, i));
|
| 1144 |
|
|
}
|
| 1145 |
|
|
|
| 1146 |
|
|
if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
|
| 1147 |
|
|
regcache_raw_collect (regcache, I387_MXCSR_REGNUM (tdep),
|
| 1148 |
|
|
FXSAVE_MXCSR_ADDR (regs));
|
| 1149 |
|
|
}
|
| 1150 |
|
|
|
| 1151 |
|
|
/* Recreate the FTW (tag word) valid bits from the 80-bit FP data in
|
| 1152 |
|
|
*RAW. */
|
| 1153 |
|
|
|
| 1154 |
|
|
static int
|
| 1155 |
|
|
i387_tag (const gdb_byte *raw)
|
| 1156 |
|
|
{
|
| 1157 |
|
|
int integer;
|
| 1158 |
|
|
unsigned int exponent;
|
| 1159 |
|
|
unsigned long fraction[2];
|
| 1160 |
|
|
|
| 1161 |
|
|
integer = raw[7] & 0x80;
|
| 1162 |
|
|
exponent = (((raw[9] & 0x7f) << 8) | raw[8]);
|
| 1163 |
|
|
fraction[0] = ((raw[3] << 24) | (raw[2] << 16) | (raw[1] << 8) | raw[0]);
|
| 1164 |
|
|
fraction[1] = (((raw[7] & 0x7f) << 24) | (raw[6] << 16)
|
| 1165 |
|
|
| (raw[5] << 8) | raw[4]);
|
| 1166 |
|
|
|
| 1167 |
|
|
if (exponent == 0x7fff)
|
| 1168 |
|
|
{
|
| 1169 |
|
|
/* Special. */
|
| 1170 |
|
|
return (2);
|
| 1171 |
|
|
}
|
| 1172 |
|
|
else if (exponent == 0x0000)
|
| 1173 |
|
|
{
|
| 1174 |
|
|
if (fraction[0] == 0x0000 && fraction[1] == 0x0000 && !integer)
|
| 1175 |
|
|
{
|
| 1176 |
|
|
/* Zero. */
|
| 1177 |
|
|
return (1);
|
| 1178 |
|
|
}
|
| 1179 |
|
|
else
|
| 1180 |
|
|
{
|
| 1181 |
|
|
/* Special. */
|
| 1182 |
|
|
return (2);
|
| 1183 |
|
|
}
|
| 1184 |
|
|
}
|
| 1185 |
|
|
else
|
| 1186 |
|
|
{
|
| 1187 |
|
|
if (integer)
|
| 1188 |
|
|
{
|
| 1189 |
|
|
/* Valid. */
|
| 1190 |
|
|
return (0);
|
| 1191 |
|
|
}
|
| 1192 |
|
|
else
|
| 1193 |
|
|
{
|
| 1194 |
|
|
/* Special. */
|
| 1195 |
|
|
return (2);
|
| 1196 |
|
|
}
|
| 1197 |
|
|
}
|
| 1198 |
|
|
}
|
| 1199 |
|
|
|
| 1200 |
|
|
/* Prepare the FPU stack in REGCACHE for a function return. */
|
| 1201 |
|
|
|
| 1202 |
|
|
void
|
| 1203 |
|
|
i387_return_value (struct gdbarch *gdbarch, struct regcache *regcache)
|
| 1204 |
|
|
{
|
| 1205 |
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
| 1206 |
|
|
ULONGEST fstat;
|
| 1207 |
|
|
|
| 1208 |
|
|
/* Set the top of the floating-point register stack to 7. The
|
| 1209 |
|
|
actual value doesn't really matter, but 7 is what a normal
|
| 1210 |
|
|
function return would end up with if the program started out with
|
| 1211 |
|
|
a freshly initialized FPU. */
|
| 1212 |
|
|
regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM (tdep), &fstat);
|
| 1213 |
|
|
fstat |= (7 << 11);
|
| 1214 |
|
|
regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM (tdep), fstat);
|
| 1215 |
|
|
|
| 1216 |
|
|
/* Mark %st(1) through %st(7) as empty. Since we set the top of the
|
| 1217 |
|
|
floating-point register stack to 7, the appropriate value for the
|
| 1218 |
|
|
tag word is 0x3fff. */
|
| 1219 |
|
|
regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM (tdep), 0x3fff);
|
| 1220 |
|
|
|
| 1221 |
|
|
}
|