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jeremybenn |
/* Target-dependent code for PowerPC systems using the SVR4 ABI
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for GDB, the GNU debugger.
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Copyright (C) 2000, 2001, 2002, 2003, 2005, 2007, 2008, 2009, 2010
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Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "gdbcore.h"
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#include "inferior.h"
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#include "regcache.h"
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#include "value.h"
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#include "gdb_string.h"
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#include "gdb_assert.h"
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#include "ppc-tdep.h"
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#include "target.h"
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#include "objfiles.h"
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#include "infcall.h"
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/* Pass the arguments in either registers, or in the stack. Using the
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ppc sysv ABI, the first eight words of the argument list (that might
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be less than eight parameters if some parameters occupy more than one
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word) are passed in r3..r10 registers. float and double parameters are
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passed in fpr's, in addition to that. Rest of the parameters if any
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are passed in user stack.
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If the function is returning a structure, then the return address is passed
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in r3, then the first 7 words of the parametes can be passed in registers,
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starting from r4. */
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CORE_ADDR
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ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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struct regcache *regcache, CORE_ADDR bp_addr,
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int nargs, struct value **args, CORE_ADDR sp,
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int struct_return, CORE_ADDR struct_addr)
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{
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struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
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enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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ULONGEST saved_sp;
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int argspace = 0; /* 0 is an initial wrong guess. */
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int write_pass;
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gdb_assert (tdep->wordsize == 4);
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regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
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&saved_sp);
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/* Go through the argument list twice.
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Pass 1: Figure out how much new stack space is required for
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arguments and pushed values. Unlike the PowerOpen ABI, the SysV
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ABI doesn't reserve any extra space for parameters which are put
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in registers, but does always push structures and then pass their
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address.
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Pass 2: Replay the same computation but this time also write the
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values out to the target. */
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for (write_pass = 0; write_pass < 2; write_pass++)
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{
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int argno;
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/* Next available floating point register for float and double
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arguments. */
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int freg = 1;
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/* Next available general register for non-float, non-vector
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arguments. */
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int greg = 3;
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/* Next available vector register for vector arguments. */
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int vreg = 2;
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/* Arguments start above the "LR save word" and "Back chain". */
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int argoffset = 2 * tdep->wordsize;
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/* Structures start after the arguments. */
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int structoffset = argoffset + argspace;
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/* If the function is returning a `struct', then the first word
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(which will be passed in r3) is used for struct return
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address. In that case we should advance one word and start
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from r4 register to copy parameters. */
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if (struct_return)
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{
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if (write_pass)
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regcache_cooked_write_signed (regcache,
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tdep->ppc_gp0_regnum + greg,
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struct_addr);
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greg++;
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}
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for (argno = 0; argno < nargs; argno++)
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{
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struct value *arg = args[argno];
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struct type *type = check_typedef (value_type (arg));
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int len = TYPE_LENGTH (type);
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const bfd_byte *val = value_contents (arg);
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if (TYPE_CODE (type) == TYPE_CODE_FLT && len <= 8
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&& !tdep->soft_float)
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{
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/* Floating point value converted to "double" then
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passed in an FP register, when the registers run out,
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8 byte aligned stack is used. */
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if (freg <= 8)
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{
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if (write_pass)
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{
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/* Always store the floating point value using
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the register's floating-point format. */
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gdb_byte regval[MAX_REGISTER_SIZE];
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struct type *regtype
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= register_type (gdbarch, tdep->ppc_fp0_regnum + freg);
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convert_typed_floating (val, type, regval, regtype);
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regcache_cooked_write (regcache,
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tdep->ppc_fp0_regnum + freg,
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regval);
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}
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freg++;
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}
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else
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{
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/* The SysV ABI tells us to convert floats to
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doubles before writing them to an 8 byte aligned
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stack location. Unfortunately GCC does not do
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that, and stores floats into 4 byte aligned
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locations without converting them to doubles.
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Since there is no know compiler that actually
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follows the ABI here, we implement the GCC
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convention. */
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/* Align to 4 bytes or 8 bytes depending on the type of
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the argument (float or double). */
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argoffset = align_up (argoffset, len);
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if (write_pass)
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write_memory (sp + argoffset, val, len);
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argoffset += len;
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}
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}
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else if (TYPE_CODE (type) == TYPE_CODE_FLT
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&& len == 16
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&& !tdep->soft_float
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&& (gdbarch_long_double_format (gdbarch)
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== floatformats_ibm_long_double))
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{
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/* IBM long double passed in two FP registers if
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available, otherwise 8-byte aligned stack. */
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if (freg <= 7)
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{
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if (write_pass)
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{
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regcache_cooked_write (regcache,
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tdep->ppc_fp0_regnum + freg,
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val);
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regcache_cooked_write (regcache,
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tdep->ppc_fp0_regnum + freg + 1,
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val + 8);
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}
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freg += 2;
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}
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else
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{
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argoffset = align_up (argoffset, 8);
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if (write_pass)
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write_memory (sp + argoffset, val, len);
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argoffset += 16;
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}
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}
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else if (len == 8
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&& (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
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|| TYPE_CODE (type) == TYPE_CODE_FLT /* double */
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|| (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
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&& tdep->soft_float)))
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{
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/* "long long" or soft-float "double" or "_Decimal64"
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passed in an odd/even register pair with the low
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addressed word in the odd register and the high
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addressed word in the even register, or when the
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registers run out an 8 byte aligned stack
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location. */
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if (greg > 9)
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{
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/* Just in case GREG was 10. */
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greg = 11;
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argoffset = align_up (argoffset, 8);
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if (write_pass)
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write_memory (sp + argoffset, val, len);
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argoffset += 8;
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}
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else
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{
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/* Must start on an odd register - r3/r4 etc. */
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if ((greg & 1) == 0)
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greg++;
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if (write_pass)
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{
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regcache_cooked_write (regcache,
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tdep->ppc_gp0_regnum + greg + 0,
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val + 0);
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regcache_cooked_write (regcache,
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tdep->ppc_gp0_regnum + greg + 1,
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val + 4);
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}
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greg += 2;
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}
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}
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else if (len == 16
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&& ((TYPE_CODE (type) == TYPE_CODE_FLT
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&& (gdbarch_long_double_format (gdbarch)
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== floatformats_ibm_long_double))
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|| (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
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&& tdep->soft_float)))
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{
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/* Soft-float IBM long double or _Decimal128 passed in
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four consecutive registers, or on the stack. The
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registers are not necessarily odd/even pairs. */
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if (greg > 7)
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{
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greg = 11;
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argoffset = align_up (argoffset, 8);
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if (write_pass)
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write_memory (sp + argoffset, val, len);
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argoffset += 16;
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}
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else
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{
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if (write_pass)
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{
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regcache_cooked_write (regcache,
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tdep->ppc_gp0_regnum + greg + 0,
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val + 0);
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regcache_cooked_write (regcache,
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tdep->ppc_gp0_regnum + greg + 1,
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val + 4);
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regcache_cooked_write (regcache,
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tdep->ppc_gp0_regnum + greg + 2,
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val + 8);
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regcache_cooked_write (regcache,
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tdep->ppc_gp0_regnum + greg + 3,
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val + 12);
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}
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greg += 4;
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}
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}
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255 |
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else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len <= 8
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&& !tdep->soft_float)
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257 |
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{
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258 |
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/* 32-bit and 64-bit decimal floats go in f1 .. f8. They can
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end up in memory. */
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260 |
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if (freg <= 8)
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{
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if (write_pass)
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{
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gdb_byte regval[MAX_REGISTER_SIZE];
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const gdb_byte *p;
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/* 32-bit decimal floats are right aligned in the
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doubleword. */
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if (TYPE_LENGTH (type) == 4)
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{
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memcpy (regval + 4, val, 4);
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p = regval;
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}
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else
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p = val;
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278 |
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regcache_cooked_write (regcache,
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tdep->ppc_fp0_regnum + freg, p);
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}
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281 |
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282 |
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freg++;
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283 |
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}
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284 |
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else
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{
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286 |
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argoffset = align_up (argoffset, len);
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287 |
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288 |
|
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if (write_pass)
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/* Write value in the stack's parameter save area. */
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290 |
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write_memory (sp + argoffset, val, len);
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291 |
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292 |
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argoffset += len;
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293 |
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}
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294 |
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}
|
295 |
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else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len == 16
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296 |
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&& !tdep->soft_float)
|
297 |
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{
|
298 |
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/* 128-bit decimal floats go in f2 .. f7, always in even/odd
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299 |
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pairs. They can end up in memory, using two doublewords. */
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300 |
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301 |
|
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if (freg <= 6)
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302 |
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{
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303 |
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/* Make sure freg is even. */
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304 |
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freg += freg & 1;
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305 |
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|
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306 |
|
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if (write_pass)
|
307 |
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{
|
308 |
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regcache_cooked_write (regcache,
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309 |
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tdep->ppc_fp0_regnum + freg, val);
|
310 |
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regcache_cooked_write (regcache,
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311 |
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tdep->ppc_fp0_regnum + freg + 1, val + 8);
|
312 |
|
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}
|
313 |
|
|
}
|
314 |
|
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else
|
315 |
|
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{
|
316 |
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argoffset = align_up (argoffset, 8);
|
317 |
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|
|
318 |
|
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if (write_pass)
|
319 |
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write_memory (sp + argoffset, val, 16);
|
320 |
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|
321 |
|
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argoffset += 16;
|
322 |
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}
|
323 |
|
|
|
324 |
|
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/* If a 128-bit decimal float goes to the stack because only f7
|
325 |
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and f8 are free (thus there's no even/odd register pair
|
326 |
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available), these registers should be marked as occupied.
|
327 |
|
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Hence we increase freg even when writing to memory. */
|
328 |
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freg += 2;
|
329 |
|
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}
|
330 |
|
|
else if (len == 16
|
331 |
|
|
&& TYPE_CODE (type) == TYPE_CODE_ARRAY
|
332 |
|
|
&& TYPE_VECTOR (type)
|
333 |
|
|
&& tdep->vector_abi == POWERPC_VEC_ALTIVEC)
|
334 |
|
|
{
|
335 |
|
|
/* Vector parameter passed in an Altivec register, or
|
336 |
|
|
when that runs out, 16 byte aligned stack location. */
|
337 |
|
|
if (vreg <= 13)
|
338 |
|
|
{
|
339 |
|
|
if (write_pass)
|
340 |
|
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regcache_cooked_write (regcache,
|
341 |
|
|
tdep->ppc_vr0_regnum + vreg, val);
|
342 |
|
|
vreg++;
|
343 |
|
|
}
|
344 |
|
|
else
|
345 |
|
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{
|
346 |
|
|
argoffset = align_up (argoffset, 16);
|
347 |
|
|
if (write_pass)
|
348 |
|
|
write_memory (sp + argoffset, val, 16);
|
349 |
|
|
argoffset += 16;
|
350 |
|
|
}
|
351 |
|
|
}
|
352 |
|
|
else if (len == 8
|
353 |
|
|
&& TYPE_CODE (type) == TYPE_CODE_ARRAY
|
354 |
|
|
&& TYPE_VECTOR (type)
|
355 |
|
|
&& tdep->vector_abi == POWERPC_VEC_SPE)
|
356 |
|
|
{
|
357 |
|
|
/* Vector parameter passed in an e500 register, or when
|
358 |
|
|
that runs out, 8 byte aligned stack location. Note
|
359 |
|
|
that since e500 vector and general purpose registers
|
360 |
|
|
both map onto the same underlying register set, a
|
361 |
|
|
"greg" and not a "vreg" is consumed here. A cooked
|
362 |
|
|
write stores the value in the correct locations
|
363 |
|
|
within the raw register cache. */
|
364 |
|
|
if (greg <= 10)
|
365 |
|
|
{
|
366 |
|
|
if (write_pass)
|
367 |
|
|
regcache_cooked_write (regcache,
|
368 |
|
|
tdep->ppc_ev0_regnum + greg, val);
|
369 |
|
|
greg++;
|
370 |
|
|
}
|
371 |
|
|
else
|
372 |
|
|
{
|
373 |
|
|
argoffset = align_up (argoffset, 8);
|
374 |
|
|
if (write_pass)
|
375 |
|
|
write_memory (sp + argoffset, val, 8);
|
376 |
|
|
argoffset += 8;
|
377 |
|
|
}
|
378 |
|
|
}
|
379 |
|
|
else
|
380 |
|
|
{
|
381 |
|
|
/* Reduce the parameter down to something that fits in a
|
382 |
|
|
"word". */
|
383 |
|
|
gdb_byte word[MAX_REGISTER_SIZE];
|
384 |
|
|
memset (word, 0, MAX_REGISTER_SIZE);
|
385 |
|
|
if (len > tdep->wordsize
|
386 |
|
|
|| TYPE_CODE (type) == TYPE_CODE_STRUCT
|
387 |
|
|
|| TYPE_CODE (type) == TYPE_CODE_UNION)
|
388 |
|
|
{
|
389 |
|
|
/* Structs and large values are put in an
|
390 |
|
|
aligned stack slot ... */
|
391 |
|
|
if (TYPE_CODE (type) == TYPE_CODE_ARRAY
|
392 |
|
|
&& TYPE_VECTOR (type)
|
393 |
|
|
&& len >= 16)
|
394 |
|
|
structoffset = align_up (structoffset, 16);
|
395 |
|
|
else
|
396 |
|
|
structoffset = align_up (structoffset, 8);
|
397 |
|
|
|
398 |
|
|
if (write_pass)
|
399 |
|
|
write_memory (sp + structoffset, val, len);
|
400 |
|
|
/* ... and then a "word" pointing to that address is
|
401 |
|
|
passed as the parameter. */
|
402 |
|
|
store_unsigned_integer (word, tdep->wordsize, byte_order,
|
403 |
|
|
sp + structoffset);
|
404 |
|
|
structoffset += len;
|
405 |
|
|
}
|
406 |
|
|
else if (TYPE_CODE (type) == TYPE_CODE_INT)
|
407 |
|
|
/* Sign or zero extend the "int" into a "word". */
|
408 |
|
|
store_unsigned_integer (word, tdep->wordsize, byte_order,
|
409 |
|
|
unpack_long (type, val));
|
410 |
|
|
else
|
411 |
|
|
/* Always goes in the low address. */
|
412 |
|
|
memcpy (word, val, len);
|
413 |
|
|
/* Store that "word" in a register, or on the stack.
|
414 |
|
|
The words have "4" byte alignment. */
|
415 |
|
|
if (greg <= 10)
|
416 |
|
|
{
|
417 |
|
|
if (write_pass)
|
418 |
|
|
regcache_cooked_write (regcache,
|
419 |
|
|
tdep->ppc_gp0_regnum + greg, word);
|
420 |
|
|
greg++;
|
421 |
|
|
}
|
422 |
|
|
else
|
423 |
|
|
{
|
424 |
|
|
argoffset = align_up (argoffset, tdep->wordsize);
|
425 |
|
|
if (write_pass)
|
426 |
|
|
write_memory (sp + argoffset, word, tdep->wordsize);
|
427 |
|
|
argoffset += tdep->wordsize;
|
428 |
|
|
}
|
429 |
|
|
}
|
430 |
|
|
}
|
431 |
|
|
|
432 |
|
|
/* Compute the actual stack space requirements. */
|
433 |
|
|
if (!write_pass)
|
434 |
|
|
{
|
435 |
|
|
/* Remember the amount of space needed by the arguments. */
|
436 |
|
|
argspace = argoffset;
|
437 |
|
|
/* Allocate space for both the arguments and the structures. */
|
438 |
|
|
sp -= (argoffset + structoffset);
|
439 |
|
|
/* Ensure that the stack is still 16 byte aligned. */
|
440 |
|
|
sp = align_down (sp, 16);
|
441 |
|
|
}
|
442 |
|
|
|
443 |
|
|
/* The psABI says that "A caller of a function that takes a
|
444 |
|
|
variable argument list shall set condition register bit 6 to
|
445 |
|
|
1 if it passes one or more arguments in the floating-point
|
446 |
|
|
registers. It is strongly recommended that the caller set the
|
447 |
|
|
bit to 0 otherwise..." Doing this for normal functions too
|
448 |
|
|
shouldn't hurt. */
|
449 |
|
|
if (write_pass)
|
450 |
|
|
{
|
451 |
|
|
ULONGEST cr;
|
452 |
|
|
|
453 |
|
|
regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr);
|
454 |
|
|
if (freg > 1)
|
455 |
|
|
cr |= 0x02000000;
|
456 |
|
|
else
|
457 |
|
|
cr &= ~0x02000000;
|
458 |
|
|
regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr);
|
459 |
|
|
}
|
460 |
|
|
}
|
461 |
|
|
|
462 |
|
|
/* Update %sp. */
|
463 |
|
|
regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
|
464 |
|
|
|
465 |
|
|
/* Write the backchain (it occupies WORDSIZED bytes). */
|
466 |
|
|
write_memory_signed_integer (sp, tdep->wordsize, byte_order, saved_sp);
|
467 |
|
|
|
468 |
|
|
/* Point the inferior function call's return address at the dummy's
|
469 |
|
|
breakpoint. */
|
470 |
|
|
regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
|
471 |
|
|
|
472 |
|
|
return sp;
|
473 |
|
|
}
|
474 |
|
|
|
475 |
|
|
/* Handle the return-value conventions for Decimal Floating Point values
|
476 |
|
|
in both ppc32 and ppc64, which are the same. */
|
477 |
|
|
static int
|
478 |
|
|
get_decimal_float_return_value (struct gdbarch *gdbarch, struct type *valtype,
|
479 |
|
|
struct regcache *regcache, gdb_byte *readbuf,
|
480 |
|
|
const gdb_byte *writebuf)
|
481 |
|
|
{
|
482 |
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
483 |
|
|
|
484 |
|
|
gdb_assert (TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT);
|
485 |
|
|
|
486 |
|
|
/* 32-bit and 64-bit decimal floats in f1. */
|
487 |
|
|
if (TYPE_LENGTH (valtype) <= 8)
|
488 |
|
|
{
|
489 |
|
|
if (writebuf != NULL)
|
490 |
|
|
{
|
491 |
|
|
gdb_byte regval[MAX_REGISTER_SIZE];
|
492 |
|
|
const gdb_byte *p;
|
493 |
|
|
|
494 |
|
|
/* 32-bit decimal float is right aligned in the doubleword. */
|
495 |
|
|
if (TYPE_LENGTH (valtype) == 4)
|
496 |
|
|
{
|
497 |
|
|
memcpy (regval + 4, writebuf, 4);
|
498 |
|
|
p = regval;
|
499 |
|
|
}
|
500 |
|
|
else
|
501 |
|
|
p = writebuf;
|
502 |
|
|
|
503 |
|
|
regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, p);
|
504 |
|
|
}
|
505 |
|
|
if (readbuf != NULL)
|
506 |
|
|
{
|
507 |
|
|
regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, readbuf);
|
508 |
|
|
|
509 |
|
|
/* Left align 32-bit decimal float. */
|
510 |
|
|
if (TYPE_LENGTH (valtype) == 4)
|
511 |
|
|
memcpy (readbuf, readbuf + 4, 4);
|
512 |
|
|
}
|
513 |
|
|
}
|
514 |
|
|
/* 128-bit decimal floats in f2,f3. */
|
515 |
|
|
else if (TYPE_LENGTH (valtype) == 16)
|
516 |
|
|
{
|
517 |
|
|
if (writebuf != NULL || readbuf != NULL)
|
518 |
|
|
{
|
519 |
|
|
int i;
|
520 |
|
|
|
521 |
|
|
for (i = 0; i < 2; i++)
|
522 |
|
|
{
|
523 |
|
|
if (writebuf != NULL)
|
524 |
|
|
regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2 + i,
|
525 |
|
|
writebuf + i * 8);
|
526 |
|
|
if (readbuf != NULL)
|
527 |
|
|
regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 2 + i,
|
528 |
|
|
readbuf + i * 8);
|
529 |
|
|
}
|
530 |
|
|
}
|
531 |
|
|
}
|
532 |
|
|
else
|
533 |
|
|
/* Can't happen. */
|
534 |
|
|
internal_error (__FILE__, __LINE__, "Unknown decimal float size.");
|
535 |
|
|
|
536 |
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
537 |
|
|
}
|
538 |
|
|
|
539 |
|
|
/* Handle the return-value conventions specified by the SysV 32-bit
|
540 |
|
|
PowerPC ABI (including all the supplements):
|
541 |
|
|
|
542 |
|
|
no floating-point: floating-point values returned using 32-bit
|
543 |
|
|
general-purpose registers.
|
544 |
|
|
|
545 |
|
|
Altivec: 128-bit vectors returned using vector registers.
|
546 |
|
|
|
547 |
|
|
e500: 64-bit vectors returned using the full full 64 bit EV
|
548 |
|
|
register, floating-point values returned using 32-bit
|
549 |
|
|
general-purpose registers.
|
550 |
|
|
|
551 |
|
|
GCC (broken): Small struct values right (instead of left) aligned
|
552 |
|
|
when returned in general-purpose registers. */
|
553 |
|
|
|
554 |
|
|
static enum return_value_convention
|
555 |
|
|
do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *type,
|
556 |
|
|
struct regcache *regcache, gdb_byte *readbuf,
|
557 |
|
|
const gdb_byte *writebuf, int broken_gcc)
|
558 |
|
|
{
|
559 |
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
560 |
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
561 |
|
|
gdb_assert (tdep->wordsize == 4);
|
562 |
|
|
if (TYPE_CODE (type) == TYPE_CODE_FLT
|
563 |
|
|
&& TYPE_LENGTH (type) <= 8
|
564 |
|
|
&& !tdep->soft_float)
|
565 |
|
|
{
|
566 |
|
|
if (readbuf)
|
567 |
|
|
{
|
568 |
|
|
/* Floats and doubles stored in "f1". Convert the value to
|
569 |
|
|
the required type. */
|
570 |
|
|
gdb_byte regval[MAX_REGISTER_SIZE];
|
571 |
|
|
struct type *regtype = register_type (gdbarch,
|
572 |
|
|
tdep->ppc_fp0_regnum + 1);
|
573 |
|
|
regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
|
574 |
|
|
convert_typed_floating (regval, regtype, readbuf, type);
|
575 |
|
|
}
|
576 |
|
|
if (writebuf)
|
577 |
|
|
{
|
578 |
|
|
/* Floats and doubles stored in "f1". Convert the value to
|
579 |
|
|
the register's "double" type. */
|
580 |
|
|
gdb_byte regval[MAX_REGISTER_SIZE];
|
581 |
|
|
struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
|
582 |
|
|
convert_typed_floating (writebuf, type, regval, regtype);
|
583 |
|
|
regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
|
584 |
|
|
}
|
585 |
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
586 |
|
|
}
|
587 |
|
|
if (TYPE_CODE (type) == TYPE_CODE_FLT
|
588 |
|
|
&& TYPE_LENGTH (type) == 16
|
589 |
|
|
&& !tdep->soft_float
|
590 |
|
|
&& (gdbarch_long_double_format (gdbarch) == floatformats_ibm_long_double))
|
591 |
|
|
{
|
592 |
|
|
/* IBM long double stored in f1 and f2. */
|
593 |
|
|
if (readbuf)
|
594 |
|
|
{
|
595 |
|
|
regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, readbuf);
|
596 |
|
|
regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 2,
|
597 |
|
|
readbuf + 8);
|
598 |
|
|
}
|
599 |
|
|
if (writebuf)
|
600 |
|
|
{
|
601 |
|
|
regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, writebuf);
|
602 |
|
|
regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2,
|
603 |
|
|
writebuf + 8);
|
604 |
|
|
}
|
605 |
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
606 |
|
|
}
|
607 |
|
|
if (TYPE_LENGTH (type) == 16
|
608 |
|
|
&& ((TYPE_CODE (type) == TYPE_CODE_FLT
|
609 |
|
|
&& (gdbarch_long_double_format (gdbarch) == floatformats_ibm_long_double))
|
610 |
|
|
|| (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && tdep->soft_float)))
|
611 |
|
|
{
|
612 |
|
|
/* Soft-float IBM long double or _Decimal128 stored in r3, r4,
|
613 |
|
|
r5, r6. */
|
614 |
|
|
if (readbuf)
|
615 |
|
|
{
|
616 |
|
|
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
|
617 |
|
|
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
|
618 |
|
|
readbuf + 4);
|
619 |
|
|
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5,
|
620 |
|
|
readbuf + 8);
|
621 |
|
|
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6,
|
622 |
|
|
readbuf + 12);
|
623 |
|
|
}
|
624 |
|
|
if (writebuf)
|
625 |
|
|
{
|
626 |
|
|
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
|
627 |
|
|
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
|
628 |
|
|
writebuf + 4);
|
629 |
|
|
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5,
|
630 |
|
|
writebuf + 8);
|
631 |
|
|
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6,
|
632 |
|
|
writebuf + 12);
|
633 |
|
|
}
|
634 |
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
635 |
|
|
}
|
636 |
|
|
if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
|
637 |
|
|
|| (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8)
|
638 |
|
|
|| (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && TYPE_LENGTH (type) == 8
|
639 |
|
|
&& tdep->soft_float))
|
640 |
|
|
{
|
641 |
|
|
if (readbuf)
|
642 |
|
|
{
|
643 |
|
|
/* A long long, double or _Decimal64 stored in the 32 bit
|
644 |
|
|
r3/r4. */
|
645 |
|
|
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
|
646 |
|
|
readbuf + 0);
|
647 |
|
|
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
|
648 |
|
|
readbuf + 4);
|
649 |
|
|
}
|
650 |
|
|
if (writebuf)
|
651 |
|
|
{
|
652 |
|
|
/* A long long, double or _Decimal64 stored in the 32 bit
|
653 |
|
|
r3/r4. */
|
654 |
|
|
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
|
655 |
|
|
writebuf + 0);
|
656 |
|
|
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
|
657 |
|
|
writebuf + 4);
|
658 |
|
|
}
|
659 |
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
660 |
|
|
}
|
661 |
|
|
if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && !tdep->soft_float)
|
662 |
|
|
return get_decimal_float_return_value (gdbarch, type, regcache, readbuf,
|
663 |
|
|
writebuf);
|
664 |
|
|
else if ((TYPE_CODE (type) == TYPE_CODE_INT
|
665 |
|
|
|| TYPE_CODE (type) == TYPE_CODE_CHAR
|
666 |
|
|
|| TYPE_CODE (type) == TYPE_CODE_BOOL
|
667 |
|
|
|| TYPE_CODE (type) == TYPE_CODE_PTR
|
668 |
|
|
|| TYPE_CODE (type) == TYPE_CODE_REF
|
669 |
|
|
|| TYPE_CODE (type) == TYPE_CODE_ENUM)
|
670 |
|
|
&& TYPE_LENGTH (type) <= tdep->wordsize)
|
671 |
|
|
{
|
672 |
|
|
if (readbuf)
|
673 |
|
|
{
|
674 |
|
|
/* Some sort of integer stored in r3. Since TYPE isn't
|
675 |
|
|
bigger than the register, sign extension isn't a problem
|
676 |
|
|
- just do everything unsigned. */
|
677 |
|
|
ULONGEST regval;
|
678 |
|
|
regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
|
679 |
|
|
®val);
|
680 |
|
|
store_unsigned_integer (readbuf, TYPE_LENGTH (type), byte_order,
|
681 |
|
|
regval);
|
682 |
|
|
}
|
683 |
|
|
if (writebuf)
|
684 |
|
|
{
|
685 |
|
|
/* Some sort of integer stored in r3. Use unpack_long since
|
686 |
|
|
that should handle any required sign extension. */
|
687 |
|
|
regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
|
688 |
|
|
unpack_long (type, writebuf));
|
689 |
|
|
}
|
690 |
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
691 |
|
|
}
|
692 |
|
|
if (TYPE_LENGTH (type) == 16
|
693 |
|
|
&& TYPE_CODE (type) == TYPE_CODE_ARRAY
|
694 |
|
|
&& TYPE_VECTOR (type)
|
695 |
|
|
&& tdep->vector_abi == POWERPC_VEC_ALTIVEC)
|
696 |
|
|
{
|
697 |
|
|
if (readbuf)
|
698 |
|
|
{
|
699 |
|
|
/* Altivec places the return value in "v2". */
|
700 |
|
|
regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
|
701 |
|
|
}
|
702 |
|
|
if (writebuf)
|
703 |
|
|
{
|
704 |
|
|
/* Altivec places the return value in "v2". */
|
705 |
|
|
regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
|
706 |
|
|
}
|
707 |
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
708 |
|
|
}
|
709 |
|
|
if (TYPE_LENGTH (type) == 16
|
710 |
|
|
&& TYPE_CODE (type) == TYPE_CODE_ARRAY
|
711 |
|
|
&& TYPE_VECTOR (type)
|
712 |
|
|
&& tdep->vector_abi == POWERPC_VEC_GENERIC)
|
713 |
|
|
{
|
714 |
|
|
/* GCC -maltivec -mabi=no-altivec returns vectors in r3/r4/r5/r6.
|
715 |
|
|
GCC without AltiVec returns them in memory, but it warns about
|
716 |
|
|
ABI risks in that case; we don't try to support it. */
|
717 |
|
|
if (readbuf)
|
718 |
|
|
{
|
719 |
|
|
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
|
720 |
|
|
readbuf + 0);
|
721 |
|
|
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
|
722 |
|
|
readbuf + 4);
|
723 |
|
|
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5,
|
724 |
|
|
readbuf + 8);
|
725 |
|
|
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6,
|
726 |
|
|
readbuf + 12);
|
727 |
|
|
}
|
728 |
|
|
if (writebuf)
|
729 |
|
|
{
|
730 |
|
|
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
|
731 |
|
|
writebuf + 0);
|
732 |
|
|
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
|
733 |
|
|
writebuf + 4);
|
734 |
|
|
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5,
|
735 |
|
|
writebuf + 8);
|
736 |
|
|
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6,
|
737 |
|
|
writebuf + 12);
|
738 |
|
|
}
|
739 |
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
740 |
|
|
}
|
741 |
|
|
if (TYPE_LENGTH (type) == 8
|
742 |
|
|
&& TYPE_CODE (type) == TYPE_CODE_ARRAY
|
743 |
|
|
&& TYPE_VECTOR (type)
|
744 |
|
|
&& tdep->vector_abi == POWERPC_VEC_SPE)
|
745 |
|
|
{
|
746 |
|
|
/* The e500 ABI places return values for the 64-bit DSP types
|
747 |
|
|
(__ev64_opaque__) in r3. However, in GDB-speak, ev3
|
748 |
|
|
corresponds to the entire r3 value for e500, whereas GDB's r3
|
749 |
|
|
only corresponds to the least significant 32-bits. So place
|
750 |
|
|
the 64-bit DSP type's value in ev3. */
|
751 |
|
|
if (readbuf)
|
752 |
|
|
regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, readbuf);
|
753 |
|
|
if (writebuf)
|
754 |
|
|
regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, writebuf);
|
755 |
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
756 |
|
|
}
|
757 |
|
|
if (broken_gcc && TYPE_LENGTH (type) <= 8)
|
758 |
|
|
{
|
759 |
|
|
/* GCC screwed up for structures or unions whose size is less
|
760 |
|
|
than or equal to 8 bytes.. Instead of left-aligning, it
|
761 |
|
|
right-aligns the data into the buffer formed by r3, r4. */
|
762 |
|
|
gdb_byte regvals[MAX_REGISTER_SIZE * 2];
|
763 |
|
|
int len = TYPE_LENGTH (type);
|
764 |
|
|
int offset = (2 * tdep->wordsize - len) % tdep->wordsize;
|
765 |
|
|
|
766 |
|
|
if (readbuf)
|
767 |
|
|
{
|
768 |
|
|
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
|
769 |
|
|
regvals + 0 * tdep->wordsize);
|
770 |
|
|
if (len > tdep->wordsize)
|
771 |
|
|
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
|
772 |
|
|
regvals + 1 * tdep->wordsize);
|
773 |
|
|
memcpy (readbuf, regvals + offset, len);
|
774 |
|
|
}
|
775 |
|
|
if (writebuf)
|
776 |
|
|
{
|
777 |
|
|
memset (regvals, 0, sizeof regvals);
|
778 |
|
|
memcpy (regvals + offset, writebuf, len);
|
779 |
|
|
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
|
780 |
|
|
regvals + 0 * tdep->wordsize);
|
781 |
|
|
if (len > tdep->wordsize)
|
782 |
|
|
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
|
783 |
|
|
regvals + 1 * tdep->wordsize);
|
784 |
|
|
}
|
785 |
|
|
|
786 |
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
787 |
|
|
}
|
788 |
|
|
if (TYPE_LENGTH (type) <= 8)
|
789 |
|
|
{
|
790 |
|
|
if (readbuf)
|
791 |
|
|
{
|
792 |
|
|
/* This matches SVr4 PPC, it does not match GCC. */
|
793 |
|
|
/* The value is right-padded to 8 bytes and then loaded, as
|
794 |
|
|
two "words", into r3/r4. */
|
795 |
|
|
gdb_byte regvals[MAX_REGISTER_SIZE * 2];
|
796 |
|
|
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
|
797 |
|
|
regvals + 0 * tdep->wordsize);
|
798 |
|
|
if (TYPE_LENGTH (type) > tdep->wordsize)
|
799 |
|
|
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
|
800 |
|
|
regvals + 1 * tdep->wordsize);
|
801 |
|
|
memcpy (readbuf, regvals, TYPE_LENGTH (type));
|
802 |
|
|
}
|
803 |
|
|
if (writebuf)
|
804 |
|
|
{
|
805 |
|
|
/* This matches SVr4 PPC, it does not match GCC. */
|
806 |
|
|
/* The value is padded out to 8 bytes and then loaded, as
|
807 |
|
|
two "words" into r3/r4. */
|
808 |
|
|
gdb_byte regvals[MAX_REGISTER_SIZE * 2];
|
809 |
|
|
memset (regvals, 0, sizeof regvals);
|
810 |
|
|
memcpy (regvals, writebuf, TYPE_LENGTH (type));
|
811 |
|
|
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
|
812 |
|
|
regvals + 0 * tdep->wordsize);
|
813 |
|
|
if (TYPE_LENGTH (type) > tdep->wordsize)
|
814 |
|
|
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
|
815 |
|
|
regvals + 1 * tdep->wordsize);
|
816 |
|
|
}
|
817 |
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
818 |
|
|
}
|
819 |
|
|
return RETURN_VALUE_STRUCT_CONVENTION;
|
820 |
|
|
}
|
821 |
|
|
|
822 |
|
|
enum return_value_convention
|
823 |
|
|
ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *func_type,
|
824 |
|
|
struct type *valtype, struct regcache *regcache,
|
825 |
|
|
gdb_byte *readbuf, const gdb_byte *writebuf)
|
826 |
|
|
{
|
827 |
|
|
return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
|
828 |
|
|
writebuf, 0);
|
829 |
|
|
}
|
830 |
|
|
|
831 |
|
|
enum return_value_convention
|
832 |
|
|
ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
|
833 |
|
|
struct type *func_type,
|
834 |
|
|
struct type *valtype,
|
835 |
|
|
struct regcache *regcache,
|
836 |
|
|
gdb_byte *readbuf, const gdb_byte *writebuf)
|
837 |
|
|
{
|
838 |
|
|
return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
|
839 |
|
|
writebuf, 1);
|
840 |
|
|
}
|
841 |
|
|
|
842 |
|
|
/* The helper function for 64-bit SYSV push_dummy_call. Converts the
|
843 |
|
|
function's code address back into the function's descriptor
|
844 |
|
|
address.
|
845 |
|
|
|
846 |
|
|
Find a value for the TOC register. Every symbol should have both
|
847 |
|
|
".FN" and "FN" in the minimal symbol table. "FN" points at the
|
848 |
|
|
FN's descriptor, while ".FN" points at the entry point (which
|
849 |
|
|
matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the
|
850 |
|
|
FN's descriptor address (while at the same time being careful to
|
851 |
|
|
find "FN" in the same object file as ".FN"). */
|
852 |
|
|
|
853 |
|
|
static int
|
854 |
|
|
convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr)
|
855 |
|
|
{
|
856 |
|
|
struct obj_section *dot_fn_section;
|
857 |
|
|
struct minimal_symbol *dot_fn;
|
858 |
|
|
struct minimal_symbol *fn;
|
859 |
|
|
CORE_ADDR toc;
|
860 |
|
|
/* Find the minimal symbol that corresponds to CODE_ADDR (should
|
861 |
|
|
have a name of the form ".FN"). */
|
862 |
|
|
dot_fn = lookup_minimal_symbol_by_pc (code_addr);
|
863 |
|
|
if (dot_fn == NULL || SYMBOL_LINKAGE_NAME (dot_fn)[0] != '.')
|
864 |
|
|
return 0;
|
865 |
|
|
/* Get the section that contains CODE_ADDR. Need this for the
|
866 |
|
|
"objfile" that it contains. */
|
867 |
|
|
dot_fn_section = find_pc_section (code_addr);
|
868 |
|
|
if (dot_fn_section == NULL || dot_fn_section->objfile == NULL)
|
869 |
|
|
return 0;
|
870 |
|
|
/* Now find the corresponding "FN" (dropping ".") minimal symbol's
|
871 |
|
|
address. Only look for the minimal symbol in ".FN"'s object file
|
872 |
|
|
- avoids problems when two object files (i.e., shared libraries)
|
873 |
|
|
contain a minimal symbol with the same name. */
|
874 |
|
|
fn = lookup_minimal_symbol (SYMBOL_LINKAGE_NAME (dot_fn) + 1, NULL,
|
875 |
|
|
dot_fn_section->objfile);
|
876 |
|
|
if (fn == NULL)
|
877 |
|
|
return 0;
|
878 |
|
|
/* Found a descriptor. */
|
879 |
|
|
(*desc_addr) = SYMBOL_VALUE_ADDRESS (fn);
|
880 |
|
|
return 1;
|
881 |
|
|
}
|
882 |
|
|
|
883 |
|
|
/* Pass the arguments in either registers, or in the stack. Using the
|
884 |
|
|
ppc 64 bit SysV ABI.
|
885 |
|
|
|
886 |
|
|
This implements a dumbed down version of the ABI. It always writes
|
887 |
|
|
values to memory, GPR and FPR, even when not necessary. Doing this
|
888 |
|
|
greatly simplifies the logic. */
|
889 |
|
|
|
890 |
|
|
CORE_ADDR
|
891 |
|
|
ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
892 |
|
|
struct regcache *regcache, CORE_ADDR bp_addr,
|
893 |
|
|
int nargs, struct value **args, CORE_ADDR sp,
|
894 |
|
|
int struct_return, CORE_ADDR struct_addr)
|
895 |
|
|
{
|
896 |
|
|
CORE_ADDR func_addr = find_function_addr (function, NULL);
|
897 |
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
898 |
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
899 |
|
|
ULONGEST back_chain;
|
900 |
|
|
/* See for-loop comment below. */
|
901 |
|
|
int write_pass;
|
902 |
|
|
/* Size of the Altivec's vector parameter region, the final value is
|
903 |
|
|
computed in the for-loop below. */
|
904 |
|
|
LONGEST vparam_size = 0;
|
905 |
|
|
/* Size of the general parameter region, the final value is computed
|
906 |
|
|
in the for-loop below. */
|
907 |
|
|
LONGEST gparam_size = 0;
|
908 |
|
|
/* Kevin writes ... I don't mind seeing tdep->wordsize used in the
|
909 |
|
|
calls to align_up(), align_down(), etc. because this makes it
|
910 |
|
|
easier to reuse this code (in a copy/paste sense) in the future,
|
911 |
|
|
but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
|
912 |
|
|
at some point makes it easier to verify that this function is
|
913 |
|
|
correct without having to do a non-local analysis to figure out
|
914 |
|
|
the possible values of tdep->wordsize. */
|
915 |
|
|
gdb_assert (tdep->wordsize == 8);
|
916 |
|
|
|
917 |
|
|
/* This function exists to support a calling convention that
|
918 |
|
|
requires floating-point registers. It shouldn't be used on
|
919 |
|
|
processors that lack them. */
|
920 |
|
|
gdb_assert (ppc_floating_point_unit_p (gdbarch));
|
921 |
|
|
|
922 |
|
|
/* By this stage in the proceedings, SP has been decremented by "red
|
923 |
|
|
zone size" + "struct return size". Fetch the stack-pointer from
|
924 |
|
|
before this and use that as the BACK_CHAIN. */
|
925 |
|
|
regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
|
926 |
|
|
&back_chain);
|
927 |
|
|
|
928 |
|
|
/* Go through the argument list twice.
|
929 |
|
|
|
930 |
|
|
Pass 1: Compute the function call's stack space and register
|
931 |
|
|
requirements.
|
932 |
|
|
|
933 |
|
|
Pass 2: Replay the same computation but this time also write the
|
934 |
|
|
values out to the target. */
|
935 |
|
|
|
936 |
|
|
for (write_pass = 0; write_pass < 2; write_pass++)
|
937 |
|
|
{
|
938 |
|
|
int argno;
|
939 |
|
|
/* Next available floating point register for float and double
|
940 |
|
|
arguments. */
|
941 |
|
|
int freg = 1;
|
942 |
|
|
/* Next available general register for non-vector (but possibly
|
943 |
|
|
float) arguments. */
|
944 |
|
|
int greg = 3;
|
945 |
|
|
/* Next available vector register for vector arguments. */
|
946 |
|
|
int vreg = 2;
|
947 |
|
|
/* The address, at which the next general purpose parameter
|
948 |
|
|
(integer, struct, float, ...) should be saved. */
|
949 |
|
|
CORE_ADDR gparam;
|
950 |
|
|
/* Address, at which the next Altivec vector parameter should be
|
951 |
|
|
saved. */
|
952 |
|
|
CORE_ADDR vparam;
|
953 |
|
|
|
954 |
|
|
if (!write_pass)
|
955 |
|
|
{
|
956 |
|
|
/* During the first pass, GPARAM and VPARAM are more like
|
957 |
|
|
offsets (start address zero) than addresses. That way
|
958 |
|
|
they accumulate the total stack space each region
|
959 |
|
|
requires. */
|
960 |
|
|
gparam = 0;
|
961 |
|
|
vparam = 0;
|
962 |
|
|
}
|
963 |
|
|
else
|
964 |
|
|
{
|
965 |
|
|
/* Decrement the stack pointer making space for the Altivec
|
966 |
|
|
and general on-stack parameters. Set vparam and gparam
|
967 |
|
|
to their corresponding regions. */
|
968 |
|
|
vparam = align_down (sp - vparam_size, 16);
|
969 |
|
|
gparam = align_down (vparam - gparam_size, 16);
|
970 |
|
|
/* Add in space for the TOC, link editor double word,
|
971 |
|
|
compiler double word, LR save area, CR save area. */
|
972 |
|
|
sp = align_down (gparam - 48, 16);
|
973 |
|
|
}
|
974 |
|
|
|
975 |
|
|
/* If the function is returning a `struct', then there is an
|
976 |
|
|
extra hidden parameter (which will be passed in r3)
|
977 |
|
|
containing the address of that struct.. In that case we
|
978 |
|
|
should advance one word and start from r4 register to copy
|
979 |
|
|
parameters. This also consumes one on-stack parameter slot. */
|
980 |
|
|
if (struct_return)
|
981 |
|
|
{
|
982 |
|
|
if (write_pass)
|
983 |
|
|
regcache_cooked_write_signed (regcache,
|
984 |
|
|
tdep->ppc_gp0_regnum + greg,
|
985 |
|
|
struct_addr);
|
986 |
|
|
greg++;
|
987 |
|
|
gparam = align_up (gparam + tdep->wordsize, tdep->wordsize);
|
988 |
|
|
}
|
989 |
|
|
|
990 |
|
|
for (argno = 0; argno < nargs; argno++)
|
991 |
|
|
{
|
992 |
|
|
struct value *arg = args[argno];
|
993 |
|
|
struct type *type = check_typedef (value_type (arg));
|
994 |
|
|
const bfd_byte *val = value_contents (arg);
|
995 |
|
|
|
996 |
|
|
if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8)
|
997 |
|
|
{
|
998 |
|
|
/* Floats and Doubles go in f1 .. f13. They also
|
999 |
|
|
consume a left aligned GREG,, and can end up in
|
1000 |
|
|
memory. */
|
1001 |
|
|
if (write_pass)
|
1002 |
|
|
{
|
1003 |
|
|
gdb_byte regval[MAX_REGISTER_SIZE];
|
1004 |
|
|
const gdb_byte *p;
|
1005 |
|
|
|
1006 |
|
|
/* Version 1.7 of the 64-bit PowerPC ELF ABI says:
|
1007 |
|
|
|
1008 |
|
|
"Single precision floating point values are mapped to
|
1009 |
|
|
the first word in a single doubleword."
|
1010 |
|
|
|
1011 |
|
|
And version 1.9 says:
|
1012 |
|
|
|
1013 |
|
|
"Single precision floating point values are mapped to
|
1014 |
|
|
the second word in a single doubleword."
|
1015 |
|
|
|
1016 |
|
|
GDB then writes single precision floating point values
|
1017 |
|
|
at both words in a doubleword, to support both ABIs. */
|
1018 |
|
|
if (TYPE_LENGTH (type) == 4)
|
1019 |
|
|
{
|
1020 |
|
|
memcpy (regval, val, 4);
|
1021 |
|
|
memcpy (regval + 4, val, 4);
|
1022 |
|
|
p = regval;
|
1023 |
|
|
}
|
1024 |
|
|
else
|
1025 |
|
|
p = val;
|
1026 |
|
|
|
1027 |
|
|
/* Write value in the stack's parameter save area. */
|
1028 |
|
|
write_memory (gparam, p, 8);
|
1029 |
|
|
|
1030 |
|
|
if (freg <= 13)
|
1031 |
|
|
{
|
1032 |
|
|
struct type *regtype
|
1033 |
|
|
= register_type (gdbarch, tdep->ppc_fp0_regnum);
|
1034 |
|
|
|
1035 |
|
|
convert_typed_floating (val, type, regval, regtype);
|
1036 |
|
|
regcache_cooked_write (regcache,
|
1037 |
|
|
tdep->ppc_fp0_regnum + freg,
|
1038 |
|
|
regval);
|
1039 |
|
|
}
|
1040 |
|
|
if (greg <= 10)
|
1041 |
|
|
regcache_cooked_write (regcache,
|
1042 |
|
|
tdep->ppc_gp0_regnum + greg,
|
1043 |
|
|
regval);
|
1044 |
|
|
}
|
1045 |
|
|
|
1046 |
|
|
freg++;
|
1047 |
|
|
greg++;
|
1048 |
|
|
/* Always consume parameter stack space. */
|
1049 |
|
|
gparam = align_up (gparam + 8, tdep->wordsize);
|
1050 |
|
|
}
|
1051 |
|
|
else if (TYPE_CODE (type) == TYPE_CODE_FLT
|
1052 |
|
|
&& TYPE_LENGTH (type) == 16
|
1053 |
|
|
&& (gdbarch_long_double_format (gdbarch)
|
1054 |
|
|
== floatformats_ibm_long_double))
|
1055 |
|
|
{
|
1056 |
|
|
/* IBM long double stored in two doublewords of the
|
1057 |
|
|
parameter save area and corresponding registers. */
|
1058 |
|
|
if (write_pass)
|
1059 |
|
|
{
|
1060 |
|
|
if (!tdep->soft_float && freg <= 13)
|
1061 |
|
|
{
|
1062 |
|
|
regcache_cooked_write (regcache,
|
1063 |
|
|
tdep->ppc_fp0_regnum + freg,
|
1064 |
|
|
val);
|
1065 |
|
|
if (freg <= 12)
|
1066 |
|
|
regcache_cooked_write (regcache,
|
1067 |
|
|
tdep->ppc_fp0_regnum + freg + 1,
|
1068 |
|
|
val + 8);
|
1069 |
|
|
}
|
1070 |
|
|
if (greg <= 10)
|
1071 |
|
|
{
|
1072 |
|
|
regcache_cooked_write (regcache,
|
1073 |
|
|
tdep->ppc_gp0_regnum + greg,
|
1074 |
|
|
val);
|
1075 |
|
|
if (greg <= 9)
|
1076 |
|
|
regcache_cooked_write (regcache,
|
1077 |
|
|
tdep->ppc_gp0_regnum + greg + 1,
|
1078 |
|
|
val + 8);
|
1079 |
|
|
}
|
1080 |
|
|
write_memory (gparam, val, TYPE_LENGTH (type));
|
1081 |
|
|
}
|
1082 |
|
|
freg += 2;
|
1083 |
|
|
greg += 2;
|
1084 |
|
|
gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
|
1085 |
|
|
}
|
1086 |
|
|
else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
|
1087 |
|
|
&& TYPE_LENGTH (type) <= 8)
|
1088 |
|
|
{
|
1089 |
|
|
/* 32-bit and 64-bit decimal floats go in f1 .. f13. They can
|
1090 |
|
|
end up in memory. */
|
1091 |
|
|
if (write_pass)
|
1092 |
|
|
{
|
1093 |
|
|
gdb_byte regval[MAX_REGISTER_SIZE];
|
1094 |
|
|
const gdb_byte *p;
|
1095 |
|
|
|
1096 |
|
|
/* 32-bit decimal floats are right aligned in the
|
1097 |
|
|
doubleword. */
|
1098 |
|
|
if (TYPE_LENGTH (type) == 4)
|
1099 |
|
|
{
|
1100 |
|
|
memcpy (regval + 4, val, 4);
|
1101 |
|
|
p = regval;
|
1102 |
|
|
}
|
1103 |
|
|
else
|
1104 |
|
|
p = val;
|
1105 |
|
|
|
1106 |
|
|
/* Write value in the stack's parameter save area. */
|
1107 |
|
|
write_memory (gparam, p, 8);
|
1108 |
|
|
|
1109 |
|
|
if (freg <= 13)
|
1110 |
|
|
regcache_cooked_write (regcache,
|
1111 |
|
|
tdep->ppc_fp0_regnum + freg, p);
|
1112 |
|
|
}
|
1113 |
|
|
|
1114 |
|
|
freg++;
|
1115 |
|
|
greg++;
|
1116 |
|
|
/* Always consume parameter stack space. */
|
1117 |
|
|
gparam = align_up (gparam + 8, tdep->wordsize);
|
1118 |
|
|
}
|
1119 |
|
|
else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT &&
|
1120 |
|
|
TYPE_LENGTH (type) == 16)
|
1121 |
|
|
{
|
1122 |
|
|
/* 128-bit decimal floats go in f2 .. f12, always in even/odd
|
1123 |
|
|
pairs. They can end up in memory, using two doublewords. */
|
1124 |
|
|
if (write_pass)
|
1125 |
|
|
{
|
1126 |
|
|
if (freg <= 12)
|
1127 |
|
|
{
|
1128 |
|
|
/* Make sure freg is even. */
|
1129 |
|
|
freg += freg & 1;
|
1130 |
|
|
regcache_cooked_write (regcache,
|
1131 |
|
|
tdep->ppc_fp0_regnum + freg, val);
|
1132 |
|
|
regcache_cooked_write (regcache,
|
1133 |
|
|
tdep->ppc_fp0_regnum + freg + 1, val + 8);
|
1134 |
|
|
}
|
1135 |
|
|
|
1136 |
|
|
write_memory (gparam, val, TYPE_LENGTH (type));
|
1137 |
|
|
}
|
1138 |
|
|
|
1139 |
|
|
freg += 2;
|
1140 |
|
|
greg += 2;
|
1141 |
|
|
gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
|
1142 |
|
|
}
|
1143 |
|
|
else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type)
|
1144 |
|
|
&& TYPE_CODE (type) == TYPE_CODE_ARRAY
|
1145 |
|
|
&& tdep->ppc_vr0_regnum >= 0)
|
1146 |
|
|
{
|
1147 |
|
|
/* In the Altivec ABI, vectors go in the vector
|
1148 |
|
|
registers v2 .. v13, or when that runs out, a vector
|
1149 |
|
|
annex which goes above all the normal parameters.
|
1150 |
|
|
NOTE: cagney/2003-09-21: This is a guess based on the
|
1151 |
|
|
PowerOpen Altivec ABI. */
|
1152 |
|
|
if (vreg <= 13)
|
1153 |
|
|
{
|
1154 |
|
|
if (write_pass)
|
1155 |
|
|
regcache_cooked_write (regcache,
|
1156 |
|
|
tdep->ppc_vr0_regnum + vreg, val);
|
1157 |
|
|
vreg++;
|
1158 |
|
|
}
|
1159 |
|
|
else
|
1160 |
|
|
{
|
1161 |
|
|
if (write_pass)
|
1162 |
|
|
write_memory (vparam, val, TYPE_LENGTH (type));
|
1163 |
|
|
vparam = align_up (vparam + TYPE_LENGTH (type), 16);
|
1164 |
|
|
}
|
1165 |
|
|
}
|
1166 |
|
|
else if ((TYPE_CODE (type) == TYPE_CODE_INT
|
1167 |
|
|
|| TYPE_CODE (type) == TYPE_CODE_ENUM
|
1168 |
|
|
|| TYPE_CODE (type) == TYPE_CODE_BOOL
|
1169 |
|
|
|| TYPE_CODE (type) == TYPE_CODE_CHAR
|
1170 |
|
|
|| TYPE_CODE (type) == TYPE_CODE_PTR
|
1171 |
|
|
|| TYPE_CODE (type) == TYPE_CODE_REF)
|
1172 |
|
|
&& TYPE_LENGTH (type) <= 8)
|
1173 |
|
|
{
|
1174 |
|
|
/* Scalars and Pointers get sign[un]extended and go in
|
1175 |
|
|
gpr3 .. gpr10. They can also end up in memory. */
|
1176 |
|
|
if (write_pass)
|
1177 |
|
|
{
|
1178 |
|
|
/* Sign extend the value, then store it unsigned. */
|
1179 |
|
|
ULONGEST word = unpack_long (type, val);
|
1180 |
|
|
/* Convert any function code addresses into
|
1181 |
|
|
descriptors. */
|
1182 |
|
|
if (TYPE_CODE (type) == TYPE_CODE_PTR
|
1183 |
|
|
|| TYPE_CODE (type) == TYPE_CODE_REF)
|
1184 |
|
|
{
|
1185 |
|
|
struct type *target_type;
|
1186 |
|
|
target_type = check_typedef (TYPE_TARGET_TYPE (type));
|
1187 |
|
|
|
1188 |
|
|
if (TYPE_CODE (target_type) == TYPE_CODE_FUNC
|
1189 |
|
|
|| TYPE_CODE (target_type) == TYPE_CODE_METHOD)
|
1190 |
|
|
{
|
1191 |
|
|
CORE_ADDR desc = word;
|
1192 |
|
|
convert_code_addr_to_desc_addr (word, &desc);
|
1193 |
|
|
word = desc;
|
1194 |
|
|
}
|
1195 |
|
|
}
|
1196 |
|
|
if (greg <= 10)
|
1197 |
|
|
regcache_cooked_write_unsigned (regcache,
|
1198 |
|
|
tdep->ppc_gp0_regnum +
|
1199 |
|
|
greg, word);
|
1200 |
|
|
write_memory_unsigned_integer (gparam, tdep->wordsize,
|
1201 |
|
|
byte_order, word);
|
1202 |
|
|
}
|
1203 |
|
|
greg++;
|
1204 |
|
|
gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
|
1205 |
|
|
}
|
1206 |
|
|
else
|
1207 |
|
|
{
|
1208 |
|
|
int byte;
|
1209 |
|
|
for (byte = 0; byte < TYPE_LENGTH (type);
|
1210 |
|
|
byte += tdep->wordsize)
|
1211 |
|
|
{
|
1212 |
|
|
if (write_pass && greg <= 10)
|
1213 |
|
|
{
|
1214 |
|
|
gdb_byte regval[MAX_REGISTER_SIZE];
|
1215 |
|
|
int len = TYPE_LENGTH (type) - byte;
|
1216 |
|
|
if (len > tdep->wordsize)
|
1217 |
|
|
len = tdep->wordsize;
|
1218 |
|
|
memset (regval, 0, sizeof regval);
|
1219 |
|
|
/* The ABI (version 1.9) specifies that values
|
1220 |
|
|
smaller than one doubleword are right-aligned
|
1221 |
|
|
and those larger are left-aligned. GCC
|
1222 |
|
|
versions before 3.4 implemented this
|
1223 |
|
|
incorrectly; see
|
1224 |
|
|
<http://gcc.gnu.org/gcc-3.4/powerpc-abi.html>. */
|
1225 |
|
|
if (byte == 0)
|
1226 |
|
|
memcpy (regval + tdep->wordsize - len,
|
1227 |
|
|
val + byte, len);
|
1228 |
|
|
else
|
1229 |
|
|
memcpy (regval, val + byte, len);
|
1230 |
|
|
regcache_cooked_write (regcache, greg, regval);
|
1231 |
|
|
}
|
1232 |
|
|
greg++;
|
1233 |
|
|
}
|
1234 |
|
|
if (write_pass)
|
1235 |
|
|
{
|
1236 |
|
|
/* WARNING: cagney/2003-09-21: Strictly speaking, this
|
1237 |
|
|
isn't necessary, unfortunately, GCC appears to get
|
1238 |
|
|
"struct convention" parameter passing wrong putting
|
1239 |
|
|
odd sized structures in memory instead of in a
|
1240 |
|
|
register. Work around this by always writing the
|
1241 |
|
|
value to memory. Fortunately, doing this
|
1242 |
|
|
simplifies the code. */
|
1243 |
|
|
int len = TYPE_LENGTH (type);
|
1244 |
|
|
if (len < tdep->wordsize)
|
1245 |
|
|
write_memory (gparam + tdep->wordsize - len, val, len);
|
1246 |
|
|
else
|
1247 |
|
|
write_memory (gparam, val, len);
|
1248 |
|
|
}
|
1249 |
|
|
if (freg <= 13
|
1250 |
|
|
&& TYPE_CODE (type) == TYPE_CODE_STRUCT
|
1251 |
|
|
&& TYPE_NFIELDS (type) == 1
|
1252 |
|
|
&& TYPE_LENGTH (type) <= 16)
|
1253 |
|
|
{
|
1254 |
|
|
/* The ABI (version 1.9) specifies that structs
|
1255 |
|
|
containing a single floating-point value, at any
|
1256 |
|
|
level of nesting of single-member structs, are
|
1257 |
|
|
passed in floating-point registers. */
|
1258 |
|
|
while (TYPE_CODE (type) == TYPE_CODE_STRUCT
|
1259 |
|
|
&& TYPE_NFIELDS (type) == 1)
|
1260 |
|
|
type = check_typedef (TYPE_FIELD_TYPE (type, 0));
|
1261 |
|
|
if (TYPE_CODE (type) == TYPE_CODE_FLT)
|
1262 |
|
|
{
|
1263 |
|
|
if (TYPE_LENGTH (type) <= 8)
|
1264 |
|
|
{
|
1265 |
|
|
if (write_pass)
|
1266 |
|
|
{
|
1267 |
|
|
gdb_byte regval[MAX_REGISTER_SIZE];
|
1268 |
|
|
struct type *regtype
|
1269 |
|
|
= register_type (gdbarch,
|
1270 |
|
|
tdep->ppc_fp0_regnum);
|
1271 |
|
|
convert_typed_floating (val, type, regval,
|
1272 |
|
|
regtype);
|
1273 |
|
|
regcache_cooked_write (regcache,
|
1274 |
|
|
(tdep->ppc_fp0_regnum
|
1275 |
|
|
+ freg),
|
1276 |
|
|
regval);
|
1277 |
|
|
}
|
1278 |
|
|
freg++;
|
1279 |
|
|
}
|
1280 |
|
|
else if (TYPE_LENGTH (type) == 16
|
1281 |
|
|
&& (gdbarch_long_double_format (gdbarch)
|
1282 |
|
|
== floatformats_ibm_long_double))
|
1283 |
|
|
{
|
1284 |
|
|
if (write_pass)
|
1285 |
|
|
{
|
1286 |
|
|
regcache_cooked_write (regcache,
|
1287 |
|
|
(tdep->ppc_fp0_regnum
|
1288 |
|
|
+ freg),
|
1289 |
|
|
val);
|
1290 |
|
|
if (freg <= 12)
|
1291 |
|
|
regcache_cooked_write (regcache,
|
1292 |
|
|
(tdep->ppc_fp0_regnum
|
1293 |
|
|
+ freg + 1),
|
1294 |
|
|
val + 8);
|
1295 |
|
|
}
|
1296 |
|
|
freg += 2;
|
1297 |
|
|
}
|
1298 |
|
|
}
|
1299 |
|
|
}
|
1300 |
|
|
/* Always consume parameter stack space. */
|
1301 |
|
|
gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
|
1302 |
|
|
}
|
1303 |
|
|
}
|
1304 |
|
|
|
1305 |
|
|
if (!write_pass)
|
1306 |
|
|
{
|
1307 |
|
|
/* Save the true region sizes ready for the second pass. */
|
1308 |
|
|
vparam_size = vparam;
|
1309 |
|
|
/* Make certain that the general parameter save area is at
|
1310 |
|
|
least the minimum 8 registers (or doublewords) in size. */
|
1311 |
|
|
if (greg < 8)
|
1312 |
|
|
gparam_size = 8 * tdep->wordsize;
|
1313 |
|
|
else
|
1314 |
|
|
gparam_size = gparam;
|
1315 |
|
|
}
|
1316 |
|
|
}
|
1317 |
|
|
|
1318 |
|
|
/* Update %sp. */
|
1319 |
|
|
regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
|
1320 |
|
|
|
1321 |
|
|
/* Write the backchain (it occupies WORDSIZED bytes). */
|
1322 |
|
|
write_memory_signed_integer (sp, tdep->wordsize, byte_order, back_chain);
|
1323 |
|
|
|
1324 |
|
|
/* Point the inferior function call's return address at the dummy's
|
1325 |
|
|
breakpoint. */
|
1326 |
|
|
regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
|
1327 |
|
|
|
1328 |
|
|
/* Use the func_addr to find the descriptor, and use that to find
|
1329 |
|
|
the TOC. If we're calling via a function pointer, the pointer
|
1330 |
|
|
itself identifies the descriptor. */
|
1331 |
|
|
{
|
1332 |
|
|
struct type *ftype = check_typedef (value_type (function));
|
1333 |
|
|
CORE_ADDR desc_addr = value_as_address (function);
|
1334 |
|
|
|
1335 |
|
|
if (TYPE_CODE (ftype) == TYPE_CODE_PTR
|
1336 |
|
|
|| convert_code_addr_to_desc_addr (func_addr, &desc_addr))
|
1337 |
|
|
{
|
1338 |
|
|
/* The TOC is the second double word in the descriptor. */
|
1339 |
|
|
CORE_ADDR toc =
|
1340 |
|
|
read_memory_unsigned_integer (desc_addr + tdep->wordsize,
|
1341 |
|
|
tdep->wordsize, byte_order);
|
1342 |
|
|
regcache_cooked_write_unsigned (regcache,
|
1343 |
|
|
tdep->ppc_gp0_regnum + 2, toc);
|
1344 |
|
|
}
|
1345 |
|
|
}
|
1346 |
|
|
|
1347 |
|
|
return sp;
|
1348 |
|
|
}
|
1349 |
|
|
|
1350 |
|
|
|
1351 |
|
|
/* The 64 bit ABI return value convention.
|
1352 |
|
|
|
1353 |
|
|
Return non-zero if the return-value is stored in a register, return
|
1354 |
|
|
|
1355 |
|
|
struct return convention).
|
1356 |
|
|
|
1357 |
|
|
For a return-value stored in a register: when WRITEBUF is non-NULL,
|
1358 |
|
|
copy the buffer to the corresponding register return-value location
|
1359 |
|
|
location; when READBUF is non-NULL, fill the buffer from the
|
1360 |
|
|
corresponding register return-value location. */
|
1361 |
|
|
enum return_value_convention
|
1362 |
|
|
ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *func_type,
|
1363 |
|
|
struct type *valtype, struct regcache *regcache,
|
1364 |
|
|
gdb_byte *readbuf, const gdb_byte *writebuf)
|
1365 |
|
|
{
|
1366 |
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
1367 |
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
1368 |
|
|
|
1369 |
|
|
/* This function exists to support a calling convention that
|
1370 |
|
|
requires floating-point registers. It shouldn't be used on
|
1371 |
|
|
processors that lack them. */
|
1372 |
|
|
gdb_assert (ppc_floating_point_unit_p (gdbarch));
|
1373 |
|
|
|
1374 |
|
|
/* Floats and doubles in F1. */
|
1375 |
|
|
if (TYPE_CODE (valtype) == TYPE_CODE_FLT && TYPE_LENGTH (valtype) <= 8)
|
1376 |
|
|
{
|
1377 |
|
|
gdb_byte regval[MAX_REGISTER_SIZE];
|
1378 |
|
|
struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
|
1379 |
|
|
if (writebuf != NULL)
|
1380 |
|
|
{
|
1381 |
|
|
convert_typed_floating (writebuf, valtype, regval, regtype);
|
1382 |
|
|
regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
|
1383 |
|
|
}
|
1384 |
|
|
if (readbuf != NULL)
|
1385 |
|
|
{
|
1386 |
|
|
regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
|
1387 |
|
|
convert_typed_floating (regval, regtype, readbuf, valtype);
|
1388 |
|
|
}
|
1389 |
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
1390 |
|
|
}
|
1391 |
|
|
if (TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT)
|
1392 |
|
|
return get_decimal_float_return_value (gdbarch, valtype, regcache, readbuf,
|
1393 |
|
|
writebuf);
|
1394 |
|
|
/* Integers in r3. */
|
1395 |
|
|
if ((TYPE_CODE (valtype) == TYPE_CODE_INT
|
1396 |
|
|
|| TYPE_CODE (valtype) == TYPE_CODE_ENUM
|
1397 |
|
|
|| TYPE_CODE (valtype) == TYPE_CODE_CHAR
|
1398 |
|
|
|| TYPE_CODE (valtype) == TYPE_CODE_BOOL)
|
1399 |
|
|
&& TYPE_LENGTH (valtype) <= 8)
|
1400 |
|
|
{
|
1401 |
|
|
if (writebuf != NULL)
|
1402 |
|
|
{
|
1403 |
|
|
/* Be careful to sign extend the value. */
|
1404 |
|
|
regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
|
1405 |
|
|
unpack_long (valtype, writebuf));
|
1406 |
|
|
}
|
1407 |
|
|
if (readbuf != NULL)
|
1408 |
|
|
{
|
1409 |
|
|
/* Extract the integer from r3. Since this is truncating the
|
1410 |
|
|
value, there isn't a sign extension problem. */
|
1411 |
|
|
ULONGEST regval;
|
1412 |
|
|
regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
|
1413 |
|
|
®val);
|
1414 |
|
|
store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), byte_order,
|
1415 |
|
|
regval);
|
1416 |
|
|
}
|
1417 |
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
1418 |
|
|
}
|
1419 |
|
|
/* All pointers live in r3. */
|
1420 |
|
|
if (TYPE_CODE (valtype) == TYPE_CODE_PTR
|
1421 |
|
|
|| TYPE_CODE (valtype) == TYPE_CODE_REF)
|
1422 |
|
|
{
|
1423 |
|
|
/* All pointers live in r3. */
|
1424 |
|
|
if (writebuf != NULL)
|
1425 |
|
|
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
|
1426 |
|
|
if (readbuf != NULL)
|
1427 |
|
|
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
|
1428 |
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
1429 |
|
|
}
|
1430 |
|
|
/* Array type has more than one use. */
|
1431 |
|
|
if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
|
1432 |
|
|
{
|
1433 |
|
|
/* Small character arrays are returned, right justified, in r3. */
|
1434 |
|
|
if (TYPE_LENGTH (valtype) <= 8
|
1435 |
|
|
&& TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT
|
1436 |
|
|
&& TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1)
|
1437 |
|
|
{
|
1438 |
|
|
int offset = (register_size (gdbarch, tdep->ppc_gp0_regnum + 3)
|
1439 |
|
|
- TYPE_LENGTH (valtype));
|
1440 |
|
|
if (writebuf != NULL)
|
1441 |
|
|
regcache_cooked_write_part (regcache, tdep->ppc_gp0_regnum + 3,
|
1442 |
|
|
offset, TYPE_LENGTH (valtype), writebuf);
|
1443 |
|
|
if (readbuf != NULL)
|
1444 |
|
|
regcache_cooked_read_part (regcache, tdep->ppc_gp0_regnum + 3,
|
1445 |
|
|
offset, TYPE_LENGTH (valtype), readbuf);
|
1446 |
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
1447 |
|
|
}
|
1448 |
|
|
/* A VMX vector is returned in v2. */
|
1449 |
|
|
if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
|
1450 |
|
|
&& TYPE_VECTOR (valtype) && tdep->ppc_vr0_regnum >= 0)
|
1451 |
|
|
{
|
1452 |
|
|
if (readbuf)
|
1453 |
|
|
regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
|
1454 |
|
|
if (writebuf)
|
1455 |
|
|
regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
|
1456 |
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
1457 |
|
|
}
|
1458 |
|
|
}
|
1459 |
|
|
/* Big floating point values get stored in adjacent floating
|
1460 |
|
|
point registers, starting with F1. */
|
1461 |
|
|
if (TYPE_CODE (valtype) == TYPE_CODE_FLT
|
1462 |
|
|
&& (TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 32))
|
1463 |
|
|
{
|
1464 |
|
|
if (writebuf || readbuf != NULL)
|
1465 |
|
|
{
|
1466 |
|
|
int i;
|
1467 |
|
|
for (i = 0; i < TYPE_LENGTH (valtype) / 8; i++)
|
1468 |
|
|
{
|
1469 |
|
|
if (writebuf != NULL)
|
1470 |
|
|
regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
|
1471 |
|
|
(const bfd_byte *) writebuf + i * 8);
|
1472 |
|
|
if (readbuf != NULL)
|
1473 |
|
|
regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
|
1474 |
|
|
(bfd_byte *) readbuf + i * 8);
|
1475 |
|
|
}
|
1476 |
|
|
}
|
1477 |
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
1478 |
|
|
}
|
1479 |
|
|
/* Complex values get returned in f1:f2, need to convert. */
|
1480 |
|
|
if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX
|
1481 |
|
|
&& (TYPE_LENGTH (valtype) == 8 || TYPE_LENGTH (valtype) == 16))
|
1482 |
|
|
{
|
1483 |
|
|
if (regcache != NULL)
|
1484 |
|
|
{
|
1485 |
|
|
int i;
|
1486 |
|
|
for (i = 0; i < 2; i++)
|
1487 |
|
|
{
|
1488 |
|
|
gdb_byte regval[MAX_REGISTER_SIZE];
|
1489 |
|
|
struct type *regtype =
|
1490 |
|
|
register_type (gdbarch, tdep->ppc_fp0_regnum);
|
1491 |
|
|
if (writebuf != NULL)
|
1492 |
|
|
{
|
1493 |
|
|
convert_typed_floating ((const bfd_byte *) writebuf +
|
1494 |
|
|
i * (TYPE_LENGTH (valtype) / 2),
|
1495 |
|
|
valtype, regval, regtype);
|
1496 |
|
|
regcache_cooked_write (regcache,
|
1497 |
|
|
tdep->ppc_fp0_regnum + 1 + i,
|
1498 |
|
|
regval);
|
1499 |
|
|
}
|
1500 |
|
|
if (readbuf != NULL)
|
1501 |
|
|
{
|
1502 |
|
|
regcache_cooked_read (regcache,
|
1503 |
|
|
tdep->ppc_fp0_regnum + 1 + i,
|
1504 |
|
|
regval);
|
1505 |
|
|
convert_typed_floating (regval, regtype,
|
1506 |
|
|
(bfd_byte *) readbuf +
|
1507 |
|
|
i * (TYPE_LENGTH (valtype) / 2),
|
1508 |
|
|
valtype);
|
1509 |
|
|
}
|
1510 |
|
|
}
|
1511 |
|
|
}
|
1512 |
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
1513 |
|
|
}
|
1514 |
|
|
/* Big complex values get stored in f1:f4. */
|
1515 |
|
|
if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX && TYPE_LENGTH (valtype) == 32)
|
1516 |
|
|
{
|
1517 |
|
|
if (regcache != NULL)
|
1518 |
|
|
{
|
1519 |
|
|
int i;
|
1520 |
|
|
for (i = 0; i < 4; i++)
|
1521 |
|
|
{
|
1522 |
|
|
if (writebuf != NULL)
|
1523 |
|
|
regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
|
1524 |
|
|
(const bfd_byte *) writebuf + i * 8);
|
1525 |
|
|
if (readbuf != NULL)
|
1526 |
|
|
regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
|
1527 |
|
|
(bfd_byte *) readbuf + i * 8);
|
1528 |
|
|
}
|
1529 |
|
|
}
|
1530 |
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
1531 |
|
|
}
|
1532 |
|
|
return RETURN_VALUE_STRUCT_CONVENTION;
|
1533 |
|
|
}
|
1534 |
|
|
|