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jeremybenn |
/* M32R ELF support for BFD.
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Copyright 1996, 1997, 1998, 1999, 2000, 2003, 2004, 2008, 2010
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Free Software Foundation, Inc.
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software Foundation,
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Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
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#ifndef _ELF_M32R_H
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#define _ELF_M32R_H
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#include "elf/reloc-macros.h"
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/* Relocations. */
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START_RELOC_NUMBERS (elf_m32r_reloc_type)
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RELOC_NUMBER (R_M32R_NONE, 0)
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/* REL relocations */
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RELOC_NUMBER (R_M32R_16, 1) /* For backwards compatibility. */
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RELOC_NUMBER (R_M32R_32, 2) /* For backwards compatibility. */
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RELOC_NUMBER (R_M32R_24, 3) /* For backwards compatibility. */
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RELOC_NUMBER (R_M32R_10_PCREL, 4) /* For backwards compatibility. */
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RELOC_NUMBER (R_M32R_18_PCREL, 5) /* For backwards compatibility. */
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RELOC_NUMBER (R_M32R_26_PCREL, 6) /* For backwards compatibility. */
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RELOC_NUMBER (R_M32R_HI16_ULO, 7) /* For backwards compatibility. */
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RELOC_NUMBER (R_M32R_HI16_SLO, 8) /* For backwards compatibility. */
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RELOC_NUMBER (R_M32R_LO16, 9) /* For backwards compatibility. */
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RELOC_NUMBER (R_M32R_SDA16, 10) /* For backwards compatibility. */
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RELOC_NUMBER (R_M32R_GNU_VTINHERIT, 11)/* For backwards compatibility. */
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RELOC_NUMBER (R_M32R_GNU_VTENTRY, 12) /* For backwards compatibility. */
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/* RELA relocations */
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RELOC_NUMBER (R_M32R_16_RELA, 33)
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RELOC_NUMBER (R_M32R_32_RELA, 34)
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RELOC_NUMBER (R_M32R_24_RELA, 35)
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RELOC_NUMBER (R_M32R_10_PCREL_RELA, 36)
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RELOC_NUMBER (R_M32R_18_PCREL_RELA, 37)
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RELOC_NUMBER (R_M32R_26_PCREL_RELA, 38)
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RELOC_NUMBER (R_M32R_HI16_ULO_RELA, 39)
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RELOC_NUMBER (R_M32R_HI16_SLO_RELA, 40)
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RELOC_NUMBER (R_M32R_LO16_RELA, 41)
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RELOC_NUMBER (R_M32R_SDA16_RELA, 42)
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RELOC_NUMBER (R_M32R_RELA_GNU_VTINHERIT, 43)
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RELOC_NUMBER (R_M32R_RELA_GNU_VTENTRY, 44)
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RELOC_NUMBER (R_M32R_REL32, 45)
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RELOC_NUMBER (R_M32R_GOT24, 48)
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RELOC_NUMBER (R_M32R_26_PLTREL, 49)
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RELOC_NUMBER (R_M32R_COPY, 50)
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RELOC_NUMBER (R_M32R_GLOB_DAT, 51)
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RELOC_NUMBER (R_M32R_JMP_SLOT, 52)
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RELOC_NUMBER (R_M32R_RELATIVE, 53)
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RELOC_NUMBER (R_M32R_GOTOFF, 54)
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RELOC_NUMBER (R_M32R_GOTPC24, 55)
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RELOC_NUMBER (R_M32R_GOT16_HI_ULO, 56)
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RELOC_NUMBER (R_M32R_GOT16_HI_SLO, 57)
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RELOC_NUMBER (R_M32R_GOT16_LO, 58)
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RELOC_NUMBER (R_M32R_GOTPC_HI_ULO, 59)
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RELOC_NUMBER (R_M32R_GOTPC_HI_SLO, 60)
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RELOC_NUMBER (R_M32R_GOTPC_LO, 61)
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RELOC_NUMBER (R_M32R_GOTOFF_HI_ULO, 62)
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RELOC_NUMBER (R_M32R_GOTOFF_HI_SLO, 63)
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RELOC_NUMBER (R_M32R_GOTOFF_LO, 64)
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END_RELOC_NUMBERS (R_M32R_max)
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/* Processor specific section indices. These sections do not actually
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exist. Symbols with a st_shndx field corresponding to one of these
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values have a special meaning. */
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/* Small common symbol. */
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#define SHN_M32R_SCOMMON SHN_LORESERVE
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/* Processor specific section flags. */
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/* This section contains sufficient relocs to be relaxed.
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When relaxing, even relocs of branch instructions the assembler could
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complete must be present because relaxing may cause the branch target to
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move. */
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#define SHF_M32R_CAN_RELAX 0x10000000
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/* Processor specific flags for the ELF header e_flags field. */
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/* Two bit m32r architecture field. */
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#define EF_M32R_ARCH 0x30000000
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/* m32r code. */
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#define E_M32R_ARCH 0x00000000
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/* m32rx code. */
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#define E_M32RX_ARCH 0x10000000
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/* m32r2 code. */
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#define E_M32R2_ARCH 0x20000000
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/* 12 bit m32r new instructions field. */
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#define EF_M32R_INST 0x0FFF0000
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/* Parallel instructions. */
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#define E_M32R_HAS_PARALLEL 0x00010000
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/* Hidden instructions for m32rx:
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jc, jnc, macwhi-a, macwlo-a, mulwhi-a, mulwlo-a, sth+, shb+, sat, pcmpbz,
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sc, snc. */
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#define E_M32R_HAS_HIDDEN_INST 0x00020000
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/* New bit instructions:
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clrpsw, setpsw, bset, bclr, btst. */
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#define E_M32R_HAS_BIT_INST 0x00040000
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/* Floating point instructions. */
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#define E_M32R_HAS_FLOAT_INST 0x00080000
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/* 4 bit m32r ignore to check field. */
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#define EF_M32R_IGNORE 0x0000000F
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#endif
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