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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [include/] [opcode/] [ChangeLog] - Blame information for rev 449

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Line No. Rev Author Line
1 330 jeremybenn
2010-07-06  Maciej W. Rozycki  
2
 
3
        * mips.h (MIPS16_INSN_UNCOND_BRANCH): New macro.
4
        (MIPS16_INSN_BRANCH): Rename to...
5
        (MIPS16_INSN_COND_BRANCH): ... this.
6
 
7
2010-07-03  Alan Modra  
8
 
9
        * ppc.h (PPC_OPCODE_32, PPC_OPCODE_BOOKE64, PPC_OPCODE_CLASSIC): Delete.
10
        Renumber other PPC_OPCODE defines.
11
 
12
2010-07-03  Alan Modra  
13
 
14
        * ppc.h (PPC_OPCODE_COMMON): Expand comment.
15
 
16
2010-06-29  Alan Modra  
17
 
18
        * maxq.h: Delete file.
19
 
20
2010-06-14  Sebastian Andrzej Siewior  
21
 
22
        * ppc.h (PPC_OPCODE_E500): Define.
23
 
24
2010-05-26  Catherine Moore  
25
 
26
        * opcode/mips.h (INSN_MIPS16): Remove.
27
 
28
2010-04-21  Joseph Myers  
29
 
30
        * tic6x-insn-formats.h (s_branch): Correct typo in bitmask.
31
 
32
2010-04-15  Nick Clifton  
33
 
34
        * alpha.h: Update copyright notice to use GPLv3.
35
        * arc.h: Likewise.
36
        * arm.h: Likewise.
37
        * avr.h: Likewise.
38
        * bfin.h: Likewise.
39
        * cgen.h: Likewise.
40
        * convex.h: Likewise.
41
        * cr16.h: Likewise.
42
        * cris.h: Likewise.
43
        * crx.h: Likewise.
44
        * d10v.h: Likewise.
45
        * d30v.h: Likewise.
46
        * dlx.h: Likewise.
47
        * h8300.h: Likewise.
48
        * hppa.h: Likewise.
49
        * i370.h: Likewise.
50
        * i386.h: Likewise.
51
        * i860.h: Likewise.
52
        * i960.h: Likewise.
53
        * ia64.h: Likewise.
54
        * m68hc11.h: Likewise.
55
        * m68k.h: Likewise.
56
        * m88k.h: Likewise.
57
        * maxq.h: Likewise.
58
        * mips.h: Likewise.
59
        * mmix.h: Likewise.
60
        * mn10200.h: Likewise.
61
        * mn10300.h: Likewise.
62
        * msp430.h: Likewise.
63
        * np1.h: Likewise.
64
        * ns32k.h: Likewise.
65
        * or32.h: Likewise.
66
        * pdp11.h: Likewise.
67
        * pj.h: Likewise.
68
        * pn.h: Likewise.
69
        * ppc.h: Likewise.
70
        * pyr.h: Likewise.
71
        * rx.h: Likewise.
72
        * s390.h: Likewise.
73
        * score-datadep.h: Likewise.
74
        * score-inst.h: Likewise.
75
        * sparc.h: Likewise.
76
        * spu-insns.h: Likewise.
77
        * spu.h: Likewise.
78
        * tic30.h: Likewise.
79
        * tic4x.h: Likewise.
80
        * tic54x.h: Likewise.
81
        * tic80.h: Likewise.
82
        * v850.h: Likewise.
83
        * vax.h: Likewise.
84
 
85
2010-03-25  Joseph Myers  
86
 
87
        * tic6x-control-registers.h, tic6x-insn-formats.h,
88
        tic6x-opcode-table.h, tic6x.h: New.
89
 
90
2010-02-25  Wu Zhangjin  
91
 
92
        * mips.h: (LOONGSON2F_NOP_INSN): New macro.
93
 
94
2010-02-08  Philipp Tomsich  
95
 
96
        * opcode/ppc.h (PPC_OPCODE_TITAN): Define.
97
 
98
2010-01-14  H.J. Lu  
99
 
100
        * ia64.h (ia64_find_opcode): Remove argument name.
101
        (ia64_find_next_opcode): Likewise.
102
        (ia64_dis_opcode): Likewise.
103
        (ia64_free_opcode): Likewise.
104
        (ia64_find_dependency): Likewise.
105
 
106
2009-11-22  Doug Evans  
107
 
108
        * cgen.h: Include bfd_stdint.h.
109
        (CGEN_INSN_LGSINT, CGEN_INSN_LGUINT): New types.
110
 
111
2009-11-18  Paul Brook  
112
 
113
        * arm.h (FPU_VFP_V4_SP_D16, FPU_ARCH_VFP_V4_SP_D16): Define.
114
 
115
2009-11-17  Paul Brook  
116
        Daniel Jacobowitz  
117
 
118
        * arm.h (ARM_EXT_V6_DSP): Define.
119
        (ARM_AEXT_V6T2, ARM_AEXT_NOTM): Include ARM_EXT_V6_DSP.
120
        (ARM_AEXT_V7EM, ARM_ARCH_V7EM): Define.
121
 
122
2009-11-04  DJ Delorie  
123
 
124
        * rx.h (rx_decode_opcode) (mvtipl): Add.
125
        (mvtcp, mvfcp, opecp): Remove.
126
 
127
2009-11-02  Paul Brook  
128
 
129
        * arm.h (FPU_VFP_EXT_V3xD, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,
130
        FPU_VFP_EXT_FMA, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4): Define.
131
        (FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3_FP16, FPU_ARCH_VFP_V3xD,
132
        FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_VFP_V4, FPU_ARCH_VFP_V4D16,
133
        FPU_ARCH_NEON_VFP_V4): Define.
134
 
135
2009-10-23  Doug Evans  
136
 
137
        * cgen-bitset.h: Delete, moved to ../cgen/bitset.h.
138
        * cgen.h: Update.  Improve multi-inclusion macro name.
139
 
140
2009-10-02  Peter Bergner  
141
 
142
        * ppc.h (PPC_OPCODE_476): Define.
143
 
144
2009-10-01  Peter Bergner  
145
 
146
        * ppc.h (PPC_OPCODE_A2): Rename from PPC_OPCODE_PPCA2.
147
 
148
2009-09-29  DJ Delorie  
149
 
150
        * rx.h: New file.
151
 
152
2009-09-22  Peter Bergner  
153
 
154
        * ppc.h (ppc_cpu_t): Typedef to uint64_t.
155
 
156
2009-09-21  Ben Elliston  
157
 
158
        * ppc.h (PPC_OPCODE_PPCA2): New.
159
 
160
2009-09-05  Martin Thuresson  
161
 
162
        * ia64.h (struct ia64_operand): Renamed member class to op_class.
163
 
164
2009-08-29  Martin Thuresson  
165
 
166
        * tic30.h (template): Rename type template to
167
        insn_template. Updated code to use new name.
168
        * tic54x.h (template): Rename type template to
169
        insn_template.
170
 
171
2009-08-20  Nick Hudson  
172
 
173
        * hppa.h (pa_opcodes): Add a pa10 bb without FLAG_STRICT.
174
 
175
2009-06-11  Anthony Green  
176
 
177
        * moxie.h (MOXIE_F3_PCREL): Define.
178
        (moxie_form3_opc_info): Grow.
179
 
180
2009-06-06  Anthony Green  
181
 
182
        * moxie.h (MOXIE_F1_M): Define.
183
 
184
2009-04-15  Anthony Green  
185
 
186
        * moxie.h: Created.
187
 
188
2009-04-06  DJ Delorie  
189
 
190
        * h8300.h: Add relaxation attributes to MOVA opcodes.
191
 
192
2009-03-10  Alan Modra  
193
 
194
        * ppc.h (ppc_parse_cpu): Declare.
195
 
196
2009-03-02  Qinwei  
197
 
198
        * score-inst.h (score_insn_type, score_data_type): Add Ra_I9_I5
199
        and _IMM11 for mbitclr and mbitset.
200
        * score-datadep.h: Update dependency information.
201
 
202
2009-02-26  Peter Bergner  
203
 
204
        * ppc.h (PPC_OPCODE_POWER7): New.
205
 
206
2009-02-06  Doug Evans  
207
 
208
        * i386.h: Add comment regarding sse* insns and prefixes.
209
 
210
2009-02-03  Sandip Matte  
211
 
212
        * mips.h (INSN_XLR): Define.
213
        (INSN_CHIP_MASK): Update.
214
        (CPU_XLR): Define.
215
        (OPCODE_IS_MEMBER): Update.
216
        (M_MSGSND, M_MSGLD, M_MSGLD_T, M_MSGWAIT, M_MSGWAIT_T): Define.
217
 
218
2009-01-28  Doug Evans  
219
 
220
        * opcode/i386.h: Add multiple inclusion protection.
221
        (EAX_REG_NUM,ECX_REG_NUM,EDX_REGNUM,EBX_REG_NUM,ESI_REG_NUM)
222
        (EDI_REG_NUM): New macros.
223
        (MODRM_MOD_FIELD,MODRM_REG_FIELD,MODRM_RM_FIELD): New macros.
224
        (SIB_SCALE_FIELD,SIB_INDEX_FIELD,SIB_BASE_FIELD): New macros.
225
        (REX_PREFIX_P): New macro.
226
 
227
2009-01-09  Peter Bergner  
228
 
229
        * ppc.h (struct powerpc_opcode): New field "deprecated".
230
        (PPC_OPCODE_NOPOWER4): Delete.
231
 
232
2008-11-28  Joshua Kinard  
233
 
234
        * mips.h: Define CPU_R14000, CPU_R16000.
235
        (OPCODE_IS_MEMBER): Include R14000, R16000 in test.
236
 
237
2008-11-18  Catherine Moore  
238
 
239
        * arm.h (FPU_NEON_FP16): New.
240
        (FPU_ARCH_NEON_FP16): New.
241
 
242
2008-11-06  Chao-ying Fu  
243
 
244
        * mips.h: Doucument '1' for 5-bit sync type.
245
 
246
2008-08-28  H.J. Lu  
247
 
248
        * ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB.  Update
249
        IA64_RS_CR.
250
 
251
2008-08-01  Peter Bergner  
252
 
253
        * ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New.
254
 
255
2008-07-30  Michael J. Eager  
256
 
257
        * ppc.h (PPC_OPCODE_405): Define.
258
        (PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI): Define.
259
 
260
2008-06-13  Peter Bergner  
261
 
262
        * ppc.h (ppc_cpu_t): New typedef.
263
        (struct powerpc_opcode ): Use it.
264
        (struct powerpc_operand ): Likewise.
265
        (struct powerpc_macro ): Likewise.
266
 
267
2008-06-12  Adam Nemet  
268
 
269
        * mips.h: Document new field descriptors +x, +X, +p, +P, +s, +S.
270
        Update comment before MIPS16 field descriptors to mention MIPS16.
271
        (OP_SH_BBITIND, OP_MASK_BBITIND): New bit mask and shift count for
272
        BBIT.
273
        (OP_SH_CINSPOS, OP_MASK_CINSPOS, OP_SH_CINSLM1, OP_MASK_CINSLM1):
274
        New bit masks and shift counts for cins and exts.
275
 
276
        * mips.h: Document new field descriptors +Q.
277
        (OP_SH_SEQI, OP_MASK_SEQI): New bit mask and shift count for SEQI.
278
 
279
2008-04-28  Adam Nemet  
280
 
281
        * mips.h (INSN_MACRO): Move it up to the the pinfo macros.
282
        (INSN2_M_FP_S, INSN2_M_FP_D): New pinfo2 macros.
283
 
284
2008-04-14  Edmar Wienskoski  
285
 
286
        * ppc.h: (PPC_OPCODE_E500MC): New.
287
 
288
2008-04-03  H.J. Lu  
289
 
290
        * i386.h (MAX_OPERANDS): Set to 5.
291
        (MAX_MNEM_SIZE): Changed to 20.
292
 
293
2008-03-28  Eric B. Weddington  
294
 
295
        * avr.h (AVR_ISA_TINY3): Define new opcode set for attiny167.
296
 
297
2008-03-09  Paul Brook  
298
 
299
        * arm.h (FPU_VFP_EXT_D32, FPU_VFP_V3D16, FPU_ARCH_VFP_V3D16): Define.
300
 
301
2008-03-04  Paul Brook  
302
 
303
        * arm.h (ARM_EXT_V6M, ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR): Define.
304
        (ARM_AEXT_V6T2, ARM_AEXT_V7_ARM, ARM_AEXT_V7M): Use new flags.
305
        (ARM_AEXT_V6M, ARM_ARCH_V6M): Define.
306
 
307
2008-02-27  Denis Vlasenko  
308
            Nick Clifton  
309
 
310
        PR 3134
311
        * h8300.h (h8_opcodes): Add an encoding for a mov.l instruction
312
        with a 32-bit displacement but without the top bit of the 4th byte
313
        set.
314
 
315
2008-02-18  M R Swami Reddy 
316
 
317
        * cr16.h (cr16_num_optab): Declared.
318
 
319
2008-02-14  Hakan Ardo  
320
 
321
        PR gas/2626
322
        * avr.h (AVR_ISA_2xxe): Define.
323
 
324
2008-02-04  Adam Nemet  
325
 
326
        * mips.h: Update copyright.
327
        (INSN_CHIP_MASK): New macro.
328
        (INSN_OCTEON): New macro.
329
        (CPU_OCTEON): New macro.
330
        (OPCODE_IS_MEMBER): Handle Octeon instructions.
331
 
332
2008-01-23  Eric B. Weddington  
333
 
334
        * avr.h (AVR_ISA_RF401): Add new opcode set for at86rf401.
335
 
336
2008-01-03  Eric B. Weddington  
337
 
338
        * avr.h (AVR_ISA_USB162): Add new opcode set.
339
        (AVR_ISA_AVR3): Likewise.
340
 
341
2007-11-29  Mark Shinwell  
342
 
343
        * mips.h (INSN_LOONGSON_2E): New.
344
        (INSN_LOONGSON_2F): New.
345
        (CPU_LOONGSON_2E): New.
346
        (CPU_LOONGSON_2F): New.
347
        (OPCODE_IS_MEMBER): Update for Loongson-2E and -2F flags.
348
 
349
2007-11-29  Mark Shinwell  
350
 
351
        * mips.h (INSN_ISA*): Redefine certain values as an
352
        enumeration.  Update comments.
353
        (mips_isa_table): New.
354
        (ISA_MIPS*): Redefine to match enumeration.
355
        (OPCODE_IS_MEMBER): Modify to correctly test new INSN_ISA*
356
        values.
357
 
358
2007-08-08  Ben Elliston  
359
 
360
        * ppc.h (PPC_OPCODE_PPCPS): New.
361
 
362
2007-07-03  Nathan Sidwell  
363
 
364
        * m68k.h: Document j K & E.
365
 
366
2007-06-29  M R Swami Reddy  
367
 
368
        * cr16.h: New file for CR16 target.
369
 
370
2007-05-02  Alan Modra  
371
 
372
        * ppc.h (PPC_OPERAND_PLUS1): Update comment.
373
 
374
2007-04-23  Nathan Sidwell  
375
 
376
        * m68k.h (mcfisa_c): New.
377
        (mcfusp, mcf_mask): Adjust.
378
 
379
2007-04-20  Alan Modra  
380
 
381
        * ppc.h (struct powerpc_operand): Replace "bits" with "bitm".
382
        (num_powerpc_operands): Declare.
383
        (PPC_OPERAND_SIGNED et al): Redefine as hex.
384
        (PPC_OPERAND_PLUS1): Define.
385
 
386
2007-03-21  H.J. Lu  
387
 
388
        * i386.h (REX_MODE64): Renamed to ...
389
        (REX_W): This.
390
        (REX_EXTX): Renamed to ...
391
        (REX_R): This.
392
        (REX_EXTY): Renamed to ...
393
        (REX_X): This.
394
        (REX_EXTZ): Renamed to ...
395
        (REX_B): This.
396
 
397
2007-03-15  H.J. Lu  
398
 
399
        * i386.h: Add entries from config/tc-i386.h and move tables
400
        to opcodes/i386-opc.h.
401
 
402
2007-03-13  H.J. Lu  
403
 
404
        * i386.h (FloatDR): Removed.
405
        (i386_optab): Use FloatD and FloatD|FloatR instead of FloatDR.
406
 
407
2007-03-01  Alan Modra  
408
 
409
        * spu-insns.h: Add soma double-float insns.
410
 
411
2007-02-20  Thiemo Seufer  
412
            Chao-Ying Fu  
413
 
414
        * mips.h (OP_SH_BP, OP_MASK_BP): Add support for balign instruction.
415
        (INSN_DSPR2): Add flag for DSP R2 instructions.
416
        (M_BALIGN): New macro.
417
 
418
2007-02-14  Alan Modra  
419
 
420
        * i386.h (i386_optab): Replace all occurrences of Seg2ShortForm
421
        and Seg3ShortFrom with Shortform.
422
 
423
2007-02-11  H.J. Lu  
424
 
425
        PR gas/4027
426
        * i386.h (i386_optab): Put the real "test" before the pseudo
427
        one.
428
 
429
2007-01-08  Kazu Hirata  
430
 
431
        * m68k.h (m68010up): OR fido_a.
432
 
433
2006-12-25  Kazu Hirata  
434
 
435
        * m68k.h (fido_a): New.
436
 
437
2006-12-24  Kazu Hirata  
438
 
439
        * m68k.h (mcfmac, mcfemac, cfloat, mcfhwdiv, mcfisa_a,
440
        mcfisa_aa, mcfisa_b, mcfusp, mcf_mask): Double the defined
441
        values.
442
 
443
2006-11-08  H.J. Lu  
444
 
445
        * i386.h (i386_optab): Replace CpuPNI with CpuSSE3.
446
 
447
2006-10-31  Mei Ligang  
448
 
449
        * score-inst.h (enum score_insn_type): Add Insn_internal.
450
 
451
2006-10-25  Trevor Smigiel  
452
            Yukishige Shibata  
453
            Nobuhisa Fujinami  
454
            Takeaki Fukuoka  
455
            Alan Modra  
456
 
457
        * spu-insns.h: New file.
458
        * spu.h: New file.
459
 
460
2006-10-24  Andrew Pinski  
461
 
462
        * ppc.h (PPC_OPCODE_CELL): Define.
463
 
464
2006-10-23  Dwarakanath Rajagopal  
465
 
466
        * i386.h :  Modify opcode to support for the change in POPCNT opcode
467
        in amdfam10 architecture.
468
 
469
2006-09-28  H.J. Lu  
470
 
471
        * i386.h: Replace CpuMNI with CpuSSSE3.
472
 
473
2006-09-26  Mark Shinwell  
474
            Joseph Myers  
475
            Ian Lance Taylor  
476
            Ben Elliston  
477
 
478
        * arm.h (ARM_CEXT_IWMMXT2, ARM_ARCH_IWMMXT2): Define.
479
 
480
2006-09-17  Mei Ligang  
481
 
482
        * score-datadep.h: New file.
483
        * score-inst.h: New file.
484
 
485
2006-07-14  H.J. Lu  
486
 
487
        * i386.h (i386_optab): Remove InvMem from maskmovq, movhlps,
488
        movlhps, movmskps, pextrw, pmovmskb, movmskpd, maskmovdqu,
489
        movdq2q and movq2dq.
490
 
491
2006-07-10 Dwarakanath Rajagopal        
492
           Michael Meissner             
493
 
494
        * i386.h: Add amdfam10 new instructions (SSE4a and ABM instructions).
495
 
496
2006-06-12  H.J. Lu  
497
 
498
        * i386.h (i386_optab): Add "nop" with memory reference.
499
 
500
2006-06-12  H.J. Lu  
501
 
502
        * i386.h (i386_optab): Update comment for 64bit NOP.
503
 
504
2006-06-06  Ben Elliston  
505
            Anton Blanchard  
506
 
507
        * ppc.h (PPC_OPCODE_POWER6): Define.
508
        Adjust whitespace.
509
 
510
2006-06-05  Thiemo Seufer  
511
 
512
        * mips.h: Improve description of MT flags.
513
 
514
2006-05-25  Richard Sandiford  
515
 
516
        * m68k.h (mcf_mask): Define.
517
 
518
2006-05-05  Thiemo Seufer  
519
            David Ung  
520
 
521
        * mips.h (enum): Add macro M_CACHE_AB.
522
 
523
2006-05-04  Thiemo Seufer  
524
            Nigel Stephens  
525
            David Ung  
526
 
527
        * mips.h: Add INSN_SMARTMIPS define.
528
 
529
2006-04-30  Thiemo Seufer  
530
            David Ung  
531
 
532
        * mips.h: Defines udi bits and masks.  Add description of
533
        characters which may appear in the args field of udi
534
        instructions.
535
 
536
2006-04-26  Thiemo Seufer  
537
 
538
        * mips.h: Improve comments describing the bitfield instruction
539
        fields.
540
 
541
2006-04-26  Julian Brown  
542
 
543
        * arm.h (FPU_VFP_EXT_V3): Define constant.
544
        (FPU_NEON_EXT_V1): Likewise.
545
        (FPU_VFP_HARD): Update.
546
        (FPU_VFP_V3): Define macro.
547
        (FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_PLUS_NEON_V1): Define macros.
548
 
549
2006-04-07  Joerg Wunsch  
550
 
551
        * avr.h (AVR_ISA_PWMx): New.
552
 
553
2006-03-28  Nathan Sidwell  
554
 
555
        * m68k.h (cpu_m68k, cpu_cf, cpu_m68000, cpu_m68008, cpu_m68010,
556
        cpu_m68020, cpu_m68ec030, cpu_m68040, cpu_m68060, cpu_m68851,
557
        cpu_m68881, cpu_m68882, cpu_cpu32, cpu_cf5200, cpu_cf5206e,
558
        cpu_cf5208, cpu_cf521x, cpu_cf5213, cpu_cf5249, cpu_cf528x,
559
        cpu_cf5307, cpu_cf5329, cpu_cf5407, cpu_cf547x, cpu_cf548x): Remove.
560
 
561
2006-03-10  Paul Brook  
562
 
563
        * arm.h (ARM_AEXT_V7_ARM): Include v6ZK extensions.
564
 
565
2006-03-04  John David Anglin  
566
 
567
        * hppa.h (pa_opcodes): Reorder bb opcodes so that pa10 opcodes come
568
        first.  Correct mask of bb "B" opcode.
569
 
570
2006-02-27  H.J. Lu 
571
 
572
        * i386.h (i386_optab): Support Intel Merom New Instructions.
573
 
574
2006-02-24  Paul Brook  
575
 
576
        * arm.h: Add V7 feature bits.
577
 
578
2006-02-23  H.J. Lu  
579
 
580
        * ia64.h (ia64_opnd): Add IA64_OPND_IMMU5b.
581
 
582
2006-01-31  Paul Brook  
583
        Richard Earnshaw 
584
 
585
        * arm.h: Use ARM_CPU_FEATURE.
586
        (ARM_AEXT_*, FPU_ENDIAN_PURE, FPU_VFP_HARD): New.
587
        (arm_feature_set): Change to a structure.
588
        (ARM_CPU_HAS_FEATURE, ARM_MERGE_FEATURE_SETS, ARM_CLEAR_FEATURE,
589
        ARM_FEATURE): New macros.
590
 
591
2005-12-07  Hans-Peter Nilsson  
592
 
593
        * cris.h (MOVE_M_TO_PREG_OPCODE, MOVE_M_TO_PREG_ZBITS)
594
        (MOVE_PC_INCR_OPCODE_PREFIX, MOVE_PC_INCR_OPCODE_SUFFIX): New macros.
595
        (ADD_PC_INCR_OPCODE): Don't define.
596
 
597
2005-12-06  H.J. Lu  
598
 
599
        PR gas/1874
600
        * i386.h (i386_optab): Add 64bit support for monitor and mwait.
601
 
602
2005-11-14  David Ung  
603
 
604
        * mips.h: Assign 'm'/'M' codes to MIPS16e save/restore
605
        instructions.  Define MIPS16_ALL_ARGS and MIPS16_ALL_STATICS for
606
        save/restore encoding of the args field.
607
 
608
2005-10-28  Dave Brolley  
609
 
610
        Contribute the following changes:
611
        2005-02-16  Dave Brolley  
612
 
613
        * cgen-bitset.h: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
614
        cgen_isa_mask_* to cgen_bitset_*.
615
        * cgen.h: Likewise.
616
 
617
        2003-10-21  Richard Sandiford  
618
 
619
        * cgen.h (CGEN_BITSET_ATTR_VALUE): Fix definition.
620
        (CGEN_ATTR_ENTRY): Change "value" to type "unsigned".
621
        (CGEN_CPU_TABLE): Make isas a ponter.
622
 
623
        2003-09-29  Dave Brolley  
624
 
625
        * cgen.h (CGEN_ATTR_VALUE_BITSET_TYPE): New typedef.
626
        (CGEN_ATTR_VALUE_ENUM_TYPE): Ditto.
627
        (CGEN_ATTR_VALUE_TYPE): Use these new typedefs.
628
 
629
        2002-12-13  Dave Brolley  
630
 
631
        * cgen.h (symcat.h): #include it.
632
        (cgen-bitset.h): #include it.
633
        (CGEN_ATTR_VALUE_TYPE): Now a union.
634
        (CGEN_ATTR_VALUE): Reference macros generated in opcodes/-desc.h.
635
        (CGEN_ATTR_ENTRY): 'value' now unsigned.
636
        (cgen_cpu_desc): 'isas' now (CGEN_ISA_MASK*).
637
        * cgen-bitset.h: New file.
638
 
639
2005-09-30  Catherine Moore  
640
 
641
        * bfin.h: New file.
642
 
643
2005-10-24  Jan Beulich  
644
 
645
        * ia64.h (enum ia64_opnd): Move memory operand out of set of
646
        indirect operands.
647
 
648
2005-10-16  John David Anglin  
649
 
650
        * hppa.h (pa_opcodes): Add two fcmp opcodes.  Reorder ftest opcodes.
651
        Add FLAG_STRICT to pa10 ftest opcode.
652
 
653
2005-10-12  John David Anglin  
654
 
655
        * hppa.h (pa_opcodes): Remove lha entries.
656
 
657
2005-10-08  John David Anglin  
658
 
659
        * hppa.h (FLAG_STRICT): Revise comment.
660
        (pa_opcode): Revise ordering rules.  Add/move strict pa10 variants
661
        before corresponding pa11 opcodes.  Add strict pa10 register-immediate
662
        entries for "fdc".
663
 
664
2005-09-30  Catherine Moore  
665
 
666
        * bfin.h: New file.
667
 
668
2005-09-24  John David Anglin  
669
 
670
        * hppa.h (pa_opcodes): Add new "fdc" and "fic" opcode entries.
671
 
672
2005-09-06  Chao-ying Fu  
673
 
674
        * mips.h (OP_SH_MT_U, OP_MASK_MT_U, OP_SH_MT_H, OP_MASK_MT_H,
675
        OP_SH_MTACC_T, OP_MASK_MTACC_T, OP_SH_MTACC_D, OP_MASK_MTACC_D): New
676
        define.
677
        Document !, $, *, &, g, +t, +T operand formats for MT instructions.
678
        (INSN_ASE_MASK): Update to include INSN_MT.
679
        (INSN_MT): New define for MT ASE.
680
 
681
2005-08-25  Chao-ying Fu  
682
 
683
        * mips.h (OP_SH_DSPACC, OP_MASK_DSPACC, OP_SH_DSPACC_S,
684
        OP_MASK_DSPACC_S, OP_SH_DSPSFT, OP_MASK_DSPSFT, OP_SH_DSPSFT_7,
685
        OP_MASK_DSPSFT_7, OP_SH_SA3, OP_MASK_SA3, OP_SH_SA4, OP_MASK_SA4,
686
        OP_SH_IMM8, OP_MASK_IMM8, OP_SH_IMM10, OP_MASK_IMM10, OP_SH_WRDSP,
687
        OP_MASK_WRDSP, OP_SH_RDDSP, OP_MASK_RDDSP): New define.
688
        Document 3, 4, 5, 6, 7, 8, 9, 0, :, ', @ operand formats for DSP
689
        instructions.
690
        (INSN_DSP): New define for DSP ASE.
691
 
692
2005-08-18  Alan Modra  
693
 
694
        * a29k.h: Delete.
695
 
696
2005-08-15  Daniel Jacobowitz  
697
 
698
        * ppc.h (PPC_OPCODE_E300): Define.
699
 
700
2005-08-12 Martin Schwidefsky  
701
 
702
        * s390.h (s390_opcode_cpu_val): Add enum for cpu type z9-109.
703
 
704
2005-07-28  John David Anglin  
705
 
706
        PR gas/336
707
        * hppa.h (pa_opcodes): Allow 0 immediates in PA 2.0 variants of pdtlb
708
        and pitlb.
709
 
710
2005-07-27  Jan Beulich  
711
 
712
        * i386.h (i386_optab): Add comment to movd. Use LongMem for all
713
        movd-s. Add NoRex64 to movq-s dealing only with mmx or xmm registers.
714
        Add movq-s as 64-bit variants of movd-s.
715
 
716
2005-07-18  John David Anglin  
717
 
718
        * hppa.h: Fix punctuation in comment.
719
 
720
        * hppa.h (pa_opcode):  Add rules for opcode ordering.  Check first for
721
        implicit space-register addressing.  Set space-register bits on opcodes
722
        using implicit space-register addressing.  Add various missing pa20
723
        long-immediate opcodes.  Remove various opcodes using implicit 3-bit
724
        space-register addressing.  Use "fE" instead of "fe" in various
725
        fstw opcodes.
726
 
727
2005-07-18  Jan Beulich  
728
 
729
        * i386.h (i386_optab): Operands of aam and aad are unsigned.
730
 
731
2007-07-15  H.J. Lu 
732
 
733
        * i386.h (i386_optab): Support Intel VMX Instructions.
734
 
735
2005-07-10  John David Anglin  
736
 
737
        * hppa.h (pa_opcode): Don't set FLAG_STRICT in pa10 loads and stores.
738
 
739
2005-07-05  Jan Beulich  
740
 
741
        * i386.h (i386_optab): Add new insns.
742
 
743
2005-07-01  Nick Clifton  
744
 
745
        * sparc.h: Add typedefs to structure declarations.
746
 
747
2005-06-20  H.J. Lu  
748
 
749
        PR 1013
750
        * i386.h (i386_optab): Update comments for 64bit addressing on
751
        mov. Allow 64bit addressing for mov and movq.
752
 
753
2005-06-11  John David Anglin  
754
 
755
        * hppa.h (pa_opcodes): Use cM and cX instead of cm and cx,
756
        respectively, in various floating-point load and store patterns.
757
 
758
2005-05-23  John David Anglin  
759
 
760
        * hppa.h (FLAG_STRICT): Correct comment.
761
        (pa_opcodes): Update load and store entries to allow both PA 1.X and
762
        PA 2.0 mneumonics when equivalent.  Entries with cache control
763
        completers now require PA 1.1.  Adjust whitespace.
764
 
765
2005-05-19  Anton Blanchard  
766
 
767
        * ppc.h (PPC_OPCODE_POWER5): Define.
768
 
769
2005-05-10  Nick Clifton  
770
 
771
        * Update the address and phone number of the FSF organization in
772
        the GPL notices in the following files:
773
        a29k.h, alpha.h, arc.h, arm.h, avr.h, cgen.h, convex.h, cris.h,
774
        crx.h, d10v.h, d30v.h, dlx.h, h8300.h, hppa.h, i370.h, i386.h,
775
        i860.h, i960.h, m68hc11.h, m68k.h, m88k.h, maxq.h, mips.h, mmix.h,
776
        mn10200.h, mn10300.h, msp430.h, np1.h, ns32k.h, or32.h, pdp11.h,
777
        pj.h, pn.h, ppc.h, pyr.h, s390.h, sparc.h, tic30.h, tic4x.h,
778
        tic54x.h, tic80.h, v850.h, vax.h
779
 
780
2005-05-09  Jan Beulich  
781
 
782
        * i386.h (i386_optab): Add ht and hnt.
783
 
784
2005-04-18  Mark Kettenis  
785
 
786
        * i386.h: Insert hyphens into selected VIA PadLock extensions.
787
        Add xcrypt-ctr.  Provide aliases without hyphens.
788
 
789
2005-04-13  H.J. Lu  
790
 
791
        Moved from ../ChangeLog
792
 
793
        2005-04-12  Paul Brook  
794
        * m88k.h: Rename psr macros to avoid conflicts.
795
 
796
        2005-03-12  Zack Weinberg  
797
        * arm.h: Adjust comments for ARM_EXT_V4T and ARM_EXT_V5T.
798
        Add ARM_EXT_V6T2, ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2,
799
        and ARM_ARCH_V6ZKT2.
800
 
801
        2004-11-29  Tomer Levi  
802
        * crx.h (enum operand_type): Rename rbase_cst4 to rbase_dispu4.
803
        Remove redundant instruction types.
804
        (struct argument): X_op - new field.
805
        (struct cst4_entry): Remove.
806
        (no_op_insn): Declare.
807
 
808
        2004-11-05  Tomer Levi  
809
        * crx.h (enum argtype): Rename types, remove unused types.
810
 
811
        2004-10-27  Tomer Levi  
812
        * crx.h (enum reg): Rearrange registers, remove 'ccfg' and `'pc'.
813
        (enum reg_type): Remove CRX_PC_REGTYPE, CRX_MTPR_REGTYPE.
814
        (enum operand_type): Rearrange operands, edit comments.
815
        replace us with ui for unsigned immediate.
816
        replace d with disps/dispu/dispe for signed/unsigned/escaped
817
        displacements (respectively).
818
        replace rbase_ridx_scl2_dispu with rindex_disps for register index.
819
        (instruction type): Add NO_TYPE_INS.
820
        (instruction flags): Add USER_REG, CST4MAP, NO_SP, NO_RPTR.
821
        (operand_entry): New field - 'flags'.
822
        (operand flags): New.
823
 
824
        2004-10-21  Tomer Levi  
825
        * crx.h (operand_type): Remove redundant types i3, i4,
826
        i5, i8, i12.
827
        Add new unsigned immediate types us3, us4, us5, us16.
828
 
829
2005-04-12  Mark Kettenis  
830
 
831
        * i386.h (i386_optab): Mark VIA PadLock instructions as ImmExt and
832
        adjust them accordingly.
833
 
834
2005-04-01  Jan Beulich  
835
 
836
        * i386.h (i386_optab): Add rdtscp.
837
 
838
2005-03-29  H.J. Lu  
839
 
840
        * i386.h (i386_optab): Don't allow the `l' suffix for moving
841
        between memory and segment register. Allow movq for moving between
842
        general-purpose register and segment register.
843
 
844
2005-02-09  Jan Beulich  
845
 
846
        PR gas/707
847
        * i386.h (i386_optab): Add x_Suf to fbld and fbstp. Add w_Suf and
848
        FloatMF to fldcw, fstcw, fnstcw, and the memory formas of fstsw and
849
        fnstsw.
850
 
851
2006-02-07  Nathan Sidwell  
852
 
853
        * m68k.h (m68008, m68ec030, m68882): Remove.
854
        (m68k_mask): New.
855
        (cpu_m68k, cpu_cf): New.
856
        (mcf5200, mcf5206e, mcf521x, mcf5249, mcf528x, mcf5307, mcf5407,
857
        mcf5470, mcf5480): Rename to cpu_. Add m680x0 variants.
858
 
859
2005-01-25  Alexandre Oliva  
860
 
861
        2004-11-10  Alexandre Oliva  
862
        * cgen.h (enum cgen_parse_operand_type): Add
863
        CGEN_PARSE_OPERAND_SYMBOLIC.
864
 
865
2005-01-21  Fred Fish  
866
 
867
        * mips.h: Change INSN_ALIAS to INSN2_ALIAS.
868
        Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
869
        Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
870
 
871
2005-01-19  Fred Fish  
872
 
873
        * mips.h (struct mips_opcode): Add new pinfo2 member.
874
        (INSN_ALIAS): New define for opcode table entries that are
875
        specific instances of another entry, such as 'move' for an 'or'
876
        with a zero operand.
877
        (INSN_READ_MDMX_ACC): Redefine from 0 to 0x2.
878
        (INSN_WRITE_MDMX_ACC): Redefine from 0 to 0x4.
879
 
880
2004-12-09  Ian Lance Taylor  
881
 
882
        * mips.h (CPU_RM9000): Define.
883
        (OPCODE_IS_MEMBER): Handle CPU_RM9000.
884
 
885
2004-11-25 Jan Beulich  
886
 
887
        * i386.h: CpuNo64 mov can't reasonably have a 'q' suffix. Moves
888
        to/from test registers are illegal in 64-bit mode. Add missing
889
        NoRex64 to sidt. fxsave/fxrstor now allow for a 'q' suffix
890
        (previously one had to explicitly encode a rex64 prefix). Re-enable
891
        lahf/sahf in 64-bit mode as at least some Athlon64/Opteron steppings
892
        support it there. Add cmpxchg16b as per Intel's 64-bit documentation.
893
 
894
2004-11-23 Jan Beulich  
895
 
896
        * i386.h (i386_optab): paddq and psubq, even in their MMX form, are
897
        available only with SSE2. Change the MMX additions introduced by SSE
898
        and 3DNow!A to CpuMMX2 (rather than CpuMMX). Indicate the 3DNow!A
899
        instructions by their now designated identifier (since combining i686
900
        and 3DNow! does not really imply 3DNow!A).
901
 
902
2004-11-19  Alan Modra  
903
 
904
        * msp430.h (struct rcodes_s, MSP430_RLC, msp430_rcodes,
905
        struct hcodes_s, msp430_hcodes): Move to gas/config/tc-msp430.c.
906
 
907
2004-11-08  Inderpreet Singh   
908
            Vineet Sharma      
909
 
910
        * maxq.h: New file: Disassembly information for the maxq port.
911
 
912
2004-11-05  H.J. Lu  
913
 
914
        * i386.h (i386_optab): Put back "movzb".
915
 
916
2004-11-04  Hans-Peter Nilsson  
917
 
918
        * cris.h (enum cris_insn_version_usage): Tweak formatting and
919
        comments.  Remove member cris_ver_sim.  Add members
920
        cris_ver_sim_v0_10, cris_ver_v0_10, cris_ver_v3_10,
921
        cris_ver_v8_10, cris_ver_v10, cris_ver_v10p.
922
        (struct cris_support_reg, struct cris_cond15): New types.
923
        (cris_conds15): Declare.
924
        (JUMP_PC_INCR_OPCODE_V32, BA_DWORD_OPCODE, NOP_OPCODE_COMMON)
925
        (NOP_OPCODE_ZBITS_COMMON, LAPC_DWORD_OPCODE, LAPC_DWORD_Z_BITS)
926
        (NOP_OPCODE_V32, NOP_Z_BITS_V32): New macros.
927
        (NOP_Z_BITS): Define in terms of NOP_OPCODE.
928
        (cris_imm_oprnd_size_type): New members SIZE_FIELD_SIGNED and
929
        SIZE_FIELD_UNSIGNED.
930
 
931
2004-11-04 Jan Beulich  
932
 
933
        * i386.h (sldx_Suf): Remove.
934
        (FP, l_FP, sl_FP, x_FP): Don't imply IgnoreSize.
935
        (q_FP): Define, implying no REX64.
936
        (x_FP, sl_FP): Imply FloatMF.
937
        (i386_optab): Split reg and mem forms of moving from segment registers
938
        so that the memory forms can ignore the 16-/32-bit operand size
939
        distinction. Adjust a few others for Intel mode. Remove *FP uses from
940
        all non-floating-point instructions. Unite 32- and 64-bit forms of
941
        movsx, movzx, and movd. Adjust floating point operations for the above
942
        changes to the *FP macros. Add DefaultSize to floating point control
943
        insns operating on larger memory ranges. Remove left over comments
944
        hinting at certain insns being Intel-syntax ones where the ones
945
        actually meant are already gone.
946
 
947
2004-10-07  Tomer Levi  
948
 
949
        * crx.h: Add COPS_REG_INS - Coprocessor Special register
950
        instruction type.
951
 
952
2004-09-30  Paul Brook  
953
 
954
        * arm.h (ARM_EXT_V6K, ARM_EXT_V6Z): Define.
955
        (ARM_ARCH_V6K, ARM_ARCH_V6Z, ARM_ARCH_V6ZK): Define.
956
 
957
2004-09-11  Theodore A. Roth  
958
 
959
        * avr.h: Add support for
960
        atmega48, atmega88, atmega168, attiny13, attiny2313, at90can128.
961
 
962
2004-09-09  Segher Boessenkool  
963
 
964
        * ppc.h (PPC_OPERAND_OPTIONAL): Fix comment.
965
 
966
2004-08-24  Dmitry Diky  
967
 
968
        * msp430.h (msp430_opc): Add new instructions.
969
        (msp430_rcodes): Declare new instructions.
970
        (msp430_hcodes): Likewise..
971
 
972
2004-08-13  Nick Clifton  
973
 
974
        PR/301
975
        * h8300.h (O_JSR): Do not allow VECIND addressing for non-SX
976
        processors.
977
 
978
2004-08-30  Michal Ludvig  
979
 
980
        * i386.h (i386_optab): Added montmul/xsha1/xsha256 insns.
981
 
982
2004-07-22  H.J. Lu  
983
 
984
        * i386.h (i386_optab): Allow cs/ds in 64bit for branch hints.
985
 
986
2004-07-21  Jan Beulich  
987
 
988
        * i386.h: Adjust instruction descriptions to better match the
989
        specification.
990
 
991
2004-07-16  Richard Earnshaw  
992
 
993
        * arm.h: Remove all old content.  Replace with architecture defines
994
        from gas/config/tc-arm.c.
995
 
996
2004-07-09  Andreas Schwab  
997
 
998
        * m68k.h: Fix comment.
999
 
1000
2004-07-07  Tomer Levi  
1001
 
1002
        * crx.h: New file.
1003
 
1004
2004-06-24  Alan Modra  
1005
 
1006
        * i386.h (i386_optab): Remove fildd, fistpd and fisttpd.
1007
 
1008
2004-05-24  Peter Barada  
1009
 
1010
        * m68k.h: Add 'size' to m68k_opcode.
1011
 
1012
2004-05-05  Peter Barada  
1013
 
1014
        * m68k.h: Switch from ColdFire chip name to core variant.
1015
 
1016
2004-04-22  Peter Barada  
1017
 
1018
        * m68k.h: Add mcfmac/mcfemac definitions.  Update operand
1019
        descriptions for new EMAC cases.
1020
        Remove ColdFire macmw/macml/msacmw/msacmw hacks and properly
1021
        handle Motorola MAC syntax.
1022
        Allow disassembly of ColdFire V4e object files.
1023
 
1024
2004-03-16  Alan Modra  
1025
 
1026
        * ppc.h (PPC_OPERAND_GPR_0): Define.  Bump other operand defines.
1027
 
1028
2004-03-12  Jakub Jelinek  
1029
 
1030
        * i386.h (i386_optab): Remove CpuNo64 from sysenter and sysexit.
1031
 
1032
2004-03-12  Michal Ludvig  
1033
 
1034
        * i386.h (i386_optab): Added xstore as an alias for xstorerng.
1035
 
1036
2004-03-12  Michal Ludvig  
1037
 
1038
        * i386.h (i386_optab): Added xstore/xcrypt insns.
1039
 
1040
2004-02-09  Anil Paranjpe  
1041
 
1042
        * h8300.h (32bit ldc/stc): Add relaxing support.
1043
 
1044
2004-01-12  Anil Paranjpe  
1045
 
1046
        * h8300.h (BITOP): Pass MEMRELAX flag.
1047
 
1048
2004-01-09  Anil Paranjpe  
1049
 
1050
        * h8300.h (BITOP): Dissallow operations on @aa:16 and @aa:32
1051
        except for the H8S.
1052
 
1053
For older changes see ChangeLog-9103
1054
 
1055
Local Variables:
1056
mode: change-log
1057
left-margin: 8
1058
fill-column: 74
1059
version-control: never
1060
End:

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