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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [include/] [opcode/] [bfin.h] - Blame information for rev 438

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1 330 jeremybenn
/* bfin.h -- Header file for ADI Blackfin opcode table
2
   Copyright 2005, 2010 Free Software Foundation, Inc.
3
 
4
   This file is part of GDB, GAS, and the GNU binutils.
5
 
6
   GDB, GAS, and the GNU binutils are free software; you can redistribute
7
   them and/or modify them under the terms of the GNU General Public
8
   License as published by the Free Software Foundation; either version 3,
9
   or (at your option) any later version.
10
 
11
   GDB, GAS, and the GNU binutils are distributed in the hope that they
12
   will be useful, but WITHOUT ANY WARRANTY; without even the implied
13
   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
14
   the GNU General Public License for more details.
15
 
16
   You should have received a copy of the GNU General Public License
17
   along with this file; see the file COPYING3.  If not, write to the Free
18
   Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
19
   MA 02110-1301, USA.  */
20
 
21
/* Common to all DSP32 instructions.  */
22
#define BIT_MULTI_INS 0x0800
23
 
24
/* This just sets the multi instruction bit of a DSP32 instruction.  */
25
#define SET_MULTI_INSTRUCTION_BIT(x) x->value |=  BIT_MULTI_INS;
26
 
27
 
28
/* DSP instructions (32 bit) */
29
 
30
/*   dsp32mac
31
+----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+
32
| 1  | 1  | 0 | 0 |.M.| 0  | 0  |.mmod..........|.MM|.P.|.w1|.op1...|
33
|.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1......|
34
+----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+
35
*/
36
 
37
typedef struct
38
{
39
  unsigned long opcode;
40
  int bits_src1;
41
  int mask_src1;
42
  int bits_src0;
43
  int mask_src0;
44
  int bits_dst;
45
  int mask_dst;
46
  int bits_h10;
47
  int mask_h10;
48
  int bits_h00;
49
  int mask_h00;
50
  int bits_op0;
51
  int mask_op0;
52
  int bits_w0;
53
  int mask_w0;
54
  int bits_h11;
55
  int mask_h11;
56
  int bits_h01;
57
  int mask_h01;
58
  int bits_op1;
59
  int mask_op1;
60
  int bits_w1;
61
  int mask_w1;
62
  int bits_P;
63
  int mask_P;
64
  int bits_MM;
65
  int mask_MM;
66
  int bits_mmod;
67
  int mask_mmod;
68
  int bits_code2;
69
  int mask_code2;
70
  int bits_M;
71
  int mask_M;
72
  int bits_code;
73
  int mask_code;
74
} DSP32Mac;
75
 
76
#define DSP32Mac_opcode                 0xc0000000
77
#define DSP32Mac_src1_bits              0
78
#define DSP32Mac_src1_mask              0x7
79
#define DSP32Mac_src0_bits              3
80
#define DSP32Mac_src0_mask              0x7
81
#define DSP32Mac_dst_bits               6
82
#define DSP32Mac_dst_mask               0x7
83
#define DSP32Mac_h10_bits               9
84
#define DSP32Mac_h10_mask               0x1
85
#define DSP32Mac_h00_bits               10
86
#define DSP32Mac_h00_mask               0x1
87
#define DSP32Mac_op0_bits               11
88
#define DSP32Mac_op0_mask               0x3
89
#define DSP32Mac_w0_bits                13
90
#define DSP32Mac_w0_mask                0x1
91
#define DSP32Mac_h11_bits               14
92
#define DSP32Mac_h11_mask               0x1
93
#define DSP32Mac_h01_bits               15
94
#define DSP32Mac_h01_mask               0x1
95
#define DSP32Mac_op1_bits               16
96
#define DSP32Mac_op1_mask               0x3
97
#define DSP32Mac_w1_bits                18
98
#define DSP32Mac_w1_mask                0x1
99
#define DSP32Mac_p_bits                 19
100
#define DSP32Mac_p_mask                 0x1
101
#define DSP32Mac_MM_bits                20      
102
#define DSP32Mac_MM_mask                0x1
103
#define DSP32Mac_mmod_bits              21
104
#define DSP32Mac_mmod_mask              0xf
105
#define DSP32Mac_code2_bits             25
106
#define DSP32Mac_code2_mask             0x3
107
#define DSP32Mac_M_bits                 27
108
#define DSP32Mac_M_mask                 0x1
109
#define DSP32Mac_code_bits              28
110
#define DSP32Mac_code_mask              0xf
111
 
112
#define init_DSP32Mac                           \
113
{                                               \
114
  DSP32Mac_opcode,                              \
115
  DSP32Mac_src1_bits,   DSP32Mac_src1_mask,     \
116
  DSP32Mac_src0_bits,   DSP32Mac_src0_mask,     \
117
  DSP32Mac_dst_bits,    DSP32Mac_dst_mask,      \
118
  DSP32Mac_h10_bits,    DSP32Mac_h10_mask,      \
119
  DSP32Mac_h00_bits,    DSP32Mac_h00_mask,      \
120
  DSP32Mac_op0_bits,    DSP32Mac_op0_mask,      \
121
  DSP32Mac_w0_bits,     DSP32Mac_w0_mask,       \
122
  DSP32Mac_h11_bits,    DSP32Mac_h11_mask,      \
123
  DSP32Mac_h01_bits,    DSP32Mac_h01_mask,      \
124
  DSP32Mac_op1_bits,    DSP32Mac_op1_mask,      \
125
  DSP32Mac_w1_bits,     DSP32Mac_w1_mask,       \
126
  DSP32Mac_p_bits,      DSP32Mac_p_mask,        \
127
  DSP32Mac_MM_bits,     DSP32Mac_MM_mask,       \
128
  DSP32Mac_mmod_bits,   DSP32Mac_mmod_mask,     \
129
  DSP32Mac_code2_bits,  DSP32Mac_code2_mask,    \
130
  DSP32Mac_M_bits,      DSP32Mac_M_mask,        \
131
  DSP32Mac_code_bits,   DSP32Mac_code_mask      \
132
};
133
 
134
/*  dsp32mult
135
+----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+
136
| 1  | 1  | 0 | 0 |.M.| 0  | 1  |.mmod..........|.MM|.P.|.w1|.op1...|
137
|.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1......|
138
+----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+
139
*/
140
 
141
typedef DSP32Mac DSP32Mult;
142
#define DSP32Mult_opcode        0xc2000000
143
 
144
#define init_DSP32Mult                          \
145
{                                               \
146
  DSP32Mult_opcode,                             \
147
  DSP32Mac_src1_bits,   DSP32Mac_src1_mask,     \
148
  DSP32Mac_src0_bits,   DSP32Mac_src0_mask,     \
149
  DSP32Mac_dst_bits,    DSP32Mac_dst_mask,      \
150
  DSP32Mac_h10_bits,    DSP32Mac_h10_mask,      \
151
  DSP32Mac_h00_bits,    DSP32Mac_h00_mask,      \
152
  DSP32Mac_op0_bits,    DSP32Mac_op0_mask,      \
153
  DSP32Mac_w0_bits,     DSP32Mac_w0_mask,       \
154
  DSP32Mac_h11_bits,    DSP32Mac_h11_mask,      \
155
  DSP32Mac_h01_bits,    DSP32Mac_h01_mask,      \
156
  DSP32Mac_op1_bits,    DSP32Mac_op1_mask,      \
157
  DSP32Mac_w1_bits,     DSP32Mac_w1_mask,       \
158
  DSP32Mac_p_bits,      DSP32Mac_p_mask,        \
159
  DSP32Mac_MM_bits,     DSP32Mac_MM_mask,       \
160
  DSP32Mac_mmod_bits,   DSP32Mac_mmod_mask,     \
161
  DSP32Mac_code2_bits,  DSP32Mac_code2_mask,    \
162
  DSP32Mac_M_bits,      DSP32Mac_M_mask,        \
163
  DSP32Mac_code_bits,   DSP32Mac_code_mask      \
164
};
165
 
166
/*  dsp32alu
167
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
168
| 1 | 1 | 0 | 0 |.M.| 1 | 0 | - | - | - |.HL|.aopcde............|
169
|.aop...|.s.|.x.|.dst0......|.dst1......|.src0......|.src1......|
170
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
171
*/
172
 
173
typedef struct
174
{
175
  unsigned long opcode;
176
  int bits_src1;
177
  int mask_src1;
178
  int bits_src0;
179
  int mask_src0;
180
  int bits_dst1;
181
  int mask_dst1;
182
  int bits_dst0;
183
  int mask_dst0;
184
  int bits_x;
185
  int mask_x;
186
  int bits_s;
187
  int mask_s;
188
  int bits_aop;
189
  int mask_aop;
190
  int bits_aopcde;
191
  int mask_aopcde;
192
  int bits_HL;
193
  int mask_HL;
194
  int bits_dontcare;
195
  int mask_dontcare;
196
  int bits_code2;
197
  int mask_code2;
198
  int bits_M;
199
  int mask_M;
200
  int bits_code;
201
  int mask_code;
202
} DSP32Alu;
203
 
204
#define DSP32Alu_opcode         0xc4000000
205
#define DSP32Alu_src1_bits      0
206
#define DSP32Alu_src1_mask      0x7
207
#define DSP32Alu_src0_bits      3       
208
#define DSP32Alu_src0_mask      0x7
209
#define DSP32Alu_dst1_bits      6
210
#define DSP32Alu_dst1_mask      0x7
211
#define DSP32Alu_dst0_bits      9       
212
#define DSP32Alu_dst0_mask      0x7
213
#define DSP32Alu_x_bits         12
214
#define DSP32Alu_x_mask         0x1
215
#define DSP32Alu_s_bits         13
216
#define DSP32Alu_s_mask         0x1
217
#define DSP32Alu_aop_bits       14
218
#define DSP32Alu_aop_mask       0x3
219
#define DSP32Alu_aopcde_bits    16
220
#define DSP32Alu_aopcde_mask    0x1f
221
#define DSP32Alu_HL_bits        21
222
#define DSP32Alu_HL_mask        0x1
223
#define DSP32Alu_dontcare_bits  22
224
#define DSP32Alu_dontcare_mask  0x7
225
#define DSP32Alu_code2_bits     25
226
#define DSP32Alu_code2_mask     0x3
227
#define DSP32Alu_M_bits         27
228
#define DSP32Alu_M_mask         0x1
229
#define DSP32Alu_code_bits      28
230
#define DSP32Alu_code_mask      0xf
231
 
232
#define init_DSP32Alu                                   \
233
{                                                       \
234
  DSP32Alu_opcode,                                      \
235
  DSP32Alu_src1_bits,           DSP32Alu_src1_mask,     \
236
  DSP32Alu_src0_bits,           DSP32Alu_src0_mask,     \
237
  DSP32Alu_dst1_bits,           DSP32Alu_dst1_mask,     \
238
  DSP32Alu_dst0_bits,           DSP32Alu_dst0_mask,     \
239
  DSP32Alu_x_bits,              DSP32Alu_x_mask,        \
240
  DSP32Alu_s_bits,              DSP32Alu_s_mask,        \
241
  DSP32Alu_aop_bits,            DSP32Alu_aop_mask,      \
242
  DSP32Alu_aopcde_bits,         DSP32Alu_aopcde_mask,   \
243
  DSP32Alu_HL_bits,             DSP32Alu_HL_mask,       \
244
  DSP32Alu_dontcare_bits,       DSP32Alu_dontcare_mask, \
245
  DSP32Alu_code2_bits,          DSP32Alu_code2_mask,    \
246
  DSP32Alu_M_bits,              DSP32Alu_M_mask,        \
247
  DSP32Alu_code_bits,           DSP32Alu_code_mask      \
248
};
249
 
250
/*  dsp32shift
251
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
252
| 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 0 | - | - |.sopcde............|
253
|.sop...|.HLs...|.dst0......| - | - | - |.src0......|.src1......|
254
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
255
*/
256
 
257
typedef struct
258
{
259
  unsigned long opcode;
260
  int bits_src1;
261
  int mask_src1;
262
  int bits_src0;
263
  int mask_src0;
264
  int bits_dst1;
265
  int mask_dst1;
266
  int bits_dst0;
267
  int mask_dst0;
268
  int bits_HLs;
269
  int mask_HLs;
270
  int bits_sop;
271
  int mask_sop;
272
  int bits_sopcde;
273
  int mask_sopcde;
274
  int bits_dontcare;
275
  int mask_dontcare;
276
  int bits_code2;
277
  int mask_code2;
278
  int bits_M;
279
  int mask_M;
280
  int bits_code;
281
  int mask_code;
282
} DSP32Shift;
283
 
284
#define DSP32Shift_opcode               0xc6000000
285
#define DSP32Shift_src1_bits            0
286
#define DSP32Shift_src1_mask            0x7
287
#define DSP32Shift_src0_bits            3
288
#define DSP32Shift_src0_mask            0x7
289
#define DSP32Shift_dst1_bits            6
290
#define DSP32Shift_dst1_mask            0x7
291
#define DSP32Shift_dst0_bits            9
292
#define DSP32Shift_dst0_mask            0x7
293
#define DSP32Shift_HLs_bits             12
294
#define DSP32Shift_HLs_mask             0x3
295
#define DSP32Shift_sop_bits             14
296
#define DSP32Shift_sop_mask             0x3
297
#define DSP32Shift_sopcde_bits          16
298
#define DSP32Shift_sopcde_mask          0x1f
299
#define DSP32Shift_dontcare_bits        21
300
#define DSP32Shift_dontcare_mask        0x3
301
#define DSP32Shift_code2_bits           23
302
#define DSP32Shift_code2_mask           0xf
303
#define DSP32Shift_M_bits               27
304
#define DSP32Shift_M_mask               0x1
305
#define DSP32Shift_code_bits            28
306
#define DSP32Shift_code_mask            0xf
307
 
308
#define init_DSP32Shift                                         \
309
{                                                               \
310
  DSP32Shift_opcode,                                            \
311
  DSP32Shift_src1_bits,         DSP32Shift_src1_mask,           \
312
  DSP32Shift_src0_bits,         DSP32Shift_src0_mask,           \
313
  DSP32Shift_dst1_bits,         DSP32Shift_dst1_mask,           \
314
  DSP32Shift_dst0_bits,         DSP32Shift_dst0_mask,           \
315
  DSP32Shift_HLs_bits,          DSP32Shift_HLs_mask,            \
316
  DSP32Shift_sop_bits,          DSP32Shift_sop_mask,            \
317
  DSP32Shift_sopcde_bits,       DSP32Shift_sopcde_mask,         \
318
  DSP32Shift_dontcare_bits,     DSP32Shift_dontcare_mask,       \
319
  DSP32Shift_code2_bits,        DSP32Shift_code2_mask,          \
320
  DSP32Shift_M_bits,            DSP32Shift_M_mask,              \
321
  DSP32Shift_code_bits,         DSP32Shift_code_mask            \
322
};
323
 
324
/*  dsp32shiftimm
325
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
326
| 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 1 | - | - |.sopcde............|
327
|.sop...|.HLs...|.dst0......|.immag.................|.src1......|
328
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
329
*/
330
 
331
typedef struct
332
{
333
  unsigned long opcode;
334
  int bits_src1;
335
  int mask_src1;
336
  int bits_immag;
337
  int mask_immag;
338
  int bits_dst0;
339
  int mask_dst0;
340
  int bits_HLs;
341
  int mask_HLs;
342
  int bits_sop;
343
  int mask_sop;
344
  int bits_sopcde;
345
  int mask_sopcde;
346
  int bits_dontcare;
347
  int mask_dontcare;
348
  int bits_code2;
349
  int mask_code2;
350
  int bits_M;
351
  int mask_M;
352
  int bits_code;
353
  int mask_code;
354
} DSP32ShiftImm;
355
 
356
#define DSP32ShiftImm_opcode            0xc6800000
357
#define DSP32ShiftImm_src1_bits         0
358
#define DSP32ShiftImm_src1_mask         0x7
359
#define DSP32ShiftImm_immag_bits        3
360
#define DSP32ShiftImm_immag_mask        0x3f
361
#define DSP32ShiftImm_dst0_bits         9
362
#define DSP32ShiftImm_dst0_mask         0x7
363
#define DSP32ShiftImm_HLs_bits          12
364
#define DSP32ShiftImm_HLs_mask          0x3
365
#define DSP32ShiftImm_sop_bits          14
366
#define DSP32ShiftImm_sop_mask          0x3
367
#define DSP32ShiftImm_sopcde_bits       16
368
#define DSP32ShiftImm_sopcde_mask       0x1f
369
#define DSP32ShiftImm_dontcare_bits     21
370
#define DSP32ShiftImm_dontcare_mask     0x3
371
#define DSP32ShiftImm_code2_bits        23
372
#define DSP32ShiftImm_code2_mask        0xf
373
#define DSP32ShiftImm_M_bits            27
374
#define DSP32ShiftImm_M_mask            0x1
375
#define DSP32ShiftImm_code_bits         28      
376
#define DSP32ShiftImm_code_mask         0xf
377
 
378
#define init_DSP32ShiftImm                                      \
379
{                                                               \
380
  DSP32ShiftImm_opcode,                                         \
381
  DSP32ShiftImm_src1_bits,      DSP32ShiftImm_src1_mask,        \
382
  DSP32ShiftImm_immag_bits,     DSP32ShiftImm_immag_mask,       \
383
  DSP32ShiftImm_dst0_bits,      DSP32ShiftImm_dst0_mask,        \
384
  DSP32ShiftImm_HLs_bits,       DSP32ShiftImm_HLs_mask,         \
385
  DSP32ShiftImm_sop_bits,       DSP32ShiftImm_sop_mask,         \
386
  DSP32ShiftImm_sopcde_bits,    DSP32ShiftImm_sopcde_mask,      \
387
  DSP32ShiftImm_dontcare_bits,  DSP32ShiftImm_dontcare_mask,    \
388
  DSP32ShiftImm_code2_bits,     DSP32ShiftImm_code2_mask,       \
389
  DSP32ShiftImm_M_bits,         DSP32ShiftImm_M_mask,           \
390
  DSP32ShiftImm_code_bits,      DSP32ShiftImm_code_mask         \
391
};
392
 
393
/* LOAD / STORE  */
394
 
395
/*  LDSTidxI
396
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
397
| 1 | 1 | 1 | 0 | 0 | 1 |.W.|.Z.|.sz....|.ptr.......|.reg.......|
398
|.offset........................................................|
399
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
400
*/
401
 
402
typedef struct
403
{
404
  unsigned long opcode;
405
  int bits_offset;
406
  int mask_offset;
407
  int bits_reg;
408
  int mask_reg;
409
  int bits_ptr;
410
  int mask_ptr;
411
  int bits_sz;
412
  int mask_sz;
413
  int bits_Z;
414
  int mask_Z;
415
  int bits_W;
416
  int mask_W;
417
  int bits_code;
418
  int mask_code;
419
} LDSTidxI;
420
 
421
#define LDSTidxI_opcode         0xe4000000
422
#define LDSTidxI_offset_bits    0
423
#define LDSTidxI_offset_mask    0xffff
424
#define LDSTidxI_reg_bits       16
425
#define LDSTidxI_reg_mask       0x7
426
#define LDSTidxI_ptr_bits       19
427
#define LDSTidxI_ptr_mask       0x7
428
#define LDSTidxI_sz_bits        22
429
#define LDSTidxI_sz_mask        0x3
430
#define LDSTidxI_Z_bits         24
431
#define LDSTidxI_Z_mask         0x1
432
#define LDSTidxI_W_bits         25
433
#define LDSTidxI_W_mask         0x1
434
#define LDSTidxI_code_bits      26
435
#define LDSTidxI_code_mask      0x3f
436
 
437
#define init_LDSTidxI                           \
438
{                                               \
439
  LDSTidxI_opcode,                              \
440
  LDSTidxI_offset_bits, LDSTidxI_offset_mask,   \
441
  LDSTidxI_reg_bits, LDSTidxI_reg_mask,         \
442
  LDSTidxI_ptr_bits, LDSTidxI_ptr_mask,         \
443
  LDSTidxI_sz_bits, LDSTidxI_sz_mask,           \
444
  LDSTidxI_Z_bits, LDSTidxI_Z_mask,             \
445
  LDSTidxI_W_bits, LDSTidxI_W_mask,             \
446
  LDSTidxI_code_bits, LDSTidxI_code_mask        \
447
};
448
 
449
 
450
/*  LDST
451
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
452
| 1 | 0 | 0 | 1 |.sz....|.W.|.aop...|.Z.|.ptr.......|.reg.......|
453
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
454
*/
455
 
456
typedef struct
457
{
458
  unsigned short opcode;
459
  int bits_reg;
460
  int mask_reg;
461
  int bits_ptr;
462
  int mask_ptr;
463
  int bits_Z;
464
  int mask_Z;
465
  int bits_aop;
466
  int mask_aop;
467
  int bits_W;
468
  int mask_W;
469
  int bits_sz;
470
  int mask_sz;
471
  int bits_code;
472
  int mask_code;
473
} LDST;
474
 
475
#define LDST_opcode             0x9000
476
#define LDST_reg_bits           0
477
#define LDST_reg_mask           0x7
478
#define LDST_ptr_bits           3
479
#define LDST_ptr_mask           0x7
480
#define LDST_Z_bits             6
481
#define LDST_Z_mask             0x1
482
#define LDST_aop_bits           7
483
#define LDST_aop_mask           0x3
484
#define LDST_W_bits             9
485
#define LDST_W_mask             0x1
486
#define LDST_sz_bits            10
487
#define LDST_sz_mask            0x3
488
#define LDST_code_bits          12
489
#define LDST_code_mask          0xf
490
 
491
#define init_LDST                       \
492
{                                       \
493
  LDST_opcode,                          \
494
  LDST_reg_bits,        LDST_reg_mask,  \
495
  LDST_ptr_bits,        LDST_ptr_mask,  \
496
  LDST_Z_bits,          LDST_Z_mask,    \
497
  LDST_aop_bits,        LDST_aop_mask,  \
498
  LDST_W_bits,          LDST_W_mask,    \
499
  LDST_sz_bits,         LDST_sz_mask,   \
500
  LDST_code_bits,       LDST_code_mask  \
501
};
502
 
503
/*  LDSTii
504
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
505
| 1 | 0 | 1 |.W.|.op....|.offset........|.ptr.......|.reg.......|
506
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
507
*/
508
 
509
typedef struct
510
{
511
  unsigned short opcode;
512
  int bits_reg;
513
  int mask_reg;
514
  int bits_ptr;
515
  int mask_ptr;
516
  int bits_offset;
517
  int mask_offset;
518
  int bits_op;
519
  int mask_op;
520
  int bits_W;
521
  int mask_W;
522
  int bits_code;
523
  int mask_code;
524
} LDSTii;
525
 
526
#define LDSTii_opcode           0xa000
527
#define LDSTii_reg_bit          0
528
#define LDSTii_reg_mask         0x7
529
#define LDSTii_ptr_bit          3
530
#define LDSTii_ptr_mask         0x7
531
#define LDSTii_offset_bit       6
532
#define LDSTii_offset_mask      0xf
533
#define LDSTii_op_bit           10
534
#define LDSTii_op_mask          0x3
535
#define LDSTii_W_bit            12
536
#define LDSTii_W_mask           0x1
537
#define LDSTii_code_bit         13
538
#define LDSTii_code_mask        0x7
539
 
540
#define init_LDSTii                             \
541
{                                               \
542
  LDSTii_opcode,                                \
543
  LDSTii_reg_bit,       LDSTii_reg_mask,        \
544
  LDSTii_ptr_bit,       LDSTii_ptr_mask,        \
545
  LDSTii_offset_bit,    LDSTii_offset_mask,     \
546
  LDSTii_op_bit,        LDSTii_op_mask,         \
547
  LDSTii_W_bit,         LDSTii_W_mask,          \
548
  LDSTii_code_bit,      LDSTii_code_mask        \
549
};
550
 
551
 
552
/*  LDSTiiFP
553
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
554
| 1 | 0 | 1 | 1 | 1 | 0 |.W.|.offset............|.reg...........|
555
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
556
*/
557
 
558
typedef struct
559
{
560
  unsigned short opcode;
561
  int bits_reg;
562
  int mask_reg;
563
  int bits_offset;
564
  int mask_offset;
565
  int bits_W;
566
  int mask_W;
567
  int bits_code;
568
  int mask_code;
569
} LDSTiiFP;
570
 
571
#define LDSTiiFP_opcode         0xb800
572
#define LDSTiiFP_reg_bits       0
573
#define LDSTiiFP_reg_mask       0xf
574
#define LDSTiiFP_offset_bits    4
575
#define LDSTiiFP_offset_mask    0x1f
576
#define LDSTiiFP_W_bits         9
577
#define LDSTiiFP_W_mask         0x1
578
#define LDSTiiFP_code_bits      10
579
#define LDSTiiFP_code_mask      0x3f
580
 
581
#define init_LDSTiiFP                           \
582
{                                               \
583
  LDSTiiFP_opcode,                              \
584
  LDSTiiFP_reg_bits,    LDSTiiFP_reg_mask,      \
585
  LDSTiiFP_offset_bits, LDSTiiFP_offset_mask,   \
586
  LDSTiiFP_W_bits,      LDSTiiFP_W_mask,        \
587
  LDSTiiFP_code_bits,   LDSTiiFP_code_mask      \
588
};
589
 
590
/*  dspLDST
591
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
592
| 1 | 0 | 0 | 1 | 1 | 1 |.W.|.aop...|.m.....|.i.....|.reg.......|
593
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
594
*/
595
 
596
typedef struct
597
{
598
  unsigned short opcode;
599
  int bits_reg;
600
  int mask_reg;
601
  int bits_i;
602
  int mask_i;
603
  int bits_m;
604
  int mask_m;
605
  int bits_aop;
606
  int mask_aop;
607
  int bits_W;
608
  int mask_W;
609
  int bits_code;
610
  int mask_code;
611
} DspLDST;
612
 
613
#define DspLDST_opcode          0x9c00
614
#define DspLDST_reg_bits        0
615
#define DspLDST_reg_mask        0x7
616
#define DspLDST_i_bits          3
617
#define DspLDST_i_mask          0x3
618
#define DspLDST_m_bits          5
619
#define DspLDST_m_mask          0x3
620
#define DspLDST_aop_bits        7
621
#define DspLDST_aop_mask        0x3
622
#define DspLDST_W_bits          9
623
#define DspLDST_W_mask          0x1
624
#define DspLDST_code_bits       10
625
#define DspLDST_code_mask       0x3f
626
 
627
#define init_DspLDST                            \
628
{                                               \
629
  DspLDST_opcode,                               \
630
  DspLDST_reg_bits,     DspLDST_reg_mask,       \
631
  DspLDST_i_bits,       DspLDST_i_mask,         \
632
  DspLDST_m_bits,       DspLDST_m_mask,         \
633
  DspLDST_aop_bits,     DspLDST_aop_mask,       \
634
  DspLDST_W_bits,       DspLDST_W_mask,         \
635
  DspLDST_code_bits,    DspLDST_code_mask       \
636
};
637
 
638
 
639
/*  LDSTpmod
640
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
641
| 1 | 0 | 0 | 0 |.W.|.aop...|.reg.......|.idx.......|.ptr.......|
642
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
643
*/
644
 
645
typedef struct
646
{
647
  unsigned short opcode;
648
  int bits_ptr;
649
  int mask_ptr;
650
  int bits_idx;
651
  int mask_idx;
652
  int bits_reg;
653
  int mask_reg;
654
  int bits_aop;
655
  int mask_aop;
656
  int bits_W;
657
  int mask_W;
658
  int bits_code;
659
  int mask_code;
660
} LDSTpmod;
661
 
662
#define LDSTpmod_opcode         0x8000
663
#define LDSTpmod_ptr_bits       0
664
#define LDSTpmod_ptr_mask       0x7
665
#define LDSTpmod_idx_bits       3
666
#define LDSTpmod_idx_mask       0x7
667
#define LDSTpmod_reg_bits       6
668
#define LDSTpmod_reg_mask       0x7
669
#define LDSTpmod_aop_bits       9
670
#define LDSTpmod_aop_mask       0x3
671
#define LDSTpmod_W_bits         11
672
#define LDSTpmod_W_mask         0x1
673
#define LDSTpmod_code_bits      12
674
#define LDSTpmod_code_mask      0xf
675
 
676
#define init_LDSTpmod                           \
677
{                                               \
678
  LDSTpmod_opcode,                              \
679
  LDSTpmod_ptr_bits,    LDSTpmod_ptr_mask,      \
680
  LDSTpmod_idx_bits,    LDSTpmod_idx_mask,      \
681
  LDSTpmod_reg_bits,    LDSTpmod_reg_mask,      \
682
  LDSTpmod_aop_bits,    LDSTpmod_aop_mask,      \
683
  LDSTpmod_W_bits,      LDSTpmod_W_mask,        \
684
  LDSTpmod_code_bits,   LDSTpmod_code_mask      \
685
};
686
 
687
 
688
/*  LOGI2op
689
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
690
| 0 | 1 | 0 | 0 | 1 |.opc.......|.src...............|.dst.......|
691
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
692
*/
693
 
694
typedef struct
695
{
696
  unsigned short opcode;
697
  int bits_dst;
698
  int mask_dst;
699
  int bits_src;
700
  int mask_src;
701
  int bits_opc;
702
  int mask_opc;
703
  int bits_code;
704
  int mask_code;
705
} LOGI2op;
706
 
707
#define LOGI2op_opcode          0x4800
708
#define LOGI2op_dst_bits        0
709
#define LOGI2op_dst_mask        0x7
710
#define LOGI2op_src_bits        3
711
#define LOGI2op_src_mask        0x1f
712
#define LOGI2op_opc_bits        8
713
#define LOGI2op_opc_mask        0x7
714
#define LOGI2op_code_bits       11
715
#define LOGI2op_code_mask       0x1f
716
 
717
#define init_LOGI2op                            \
718
{                                               \
719
  LOGI2op_opcode,                               \
720
  LOGI2op_dst_bits,     LOGI2op_dst_mask,       \
721
  LOGI2op_src_bits,     LOGI2op_src_mask,       \
722
  LOGI2op_opc_bits,     LOGI2op_opc_mask,       \
723
  LOGI2op_code_bits,    LOGI2op_code_mask       \
724
};
725
 
726
 
727
/*  ALU2op
728
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
729
| 0 | 1 | 0 | 0 | 0 | 0 |.opc...........|.src.......|.dst.......|
730
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
731
*/
732
 
733
typedef struct
734
{
735
  unsigned short opcode;
736
  int bits_dst;
737
  int mask_dst;
738
  int bits_src;
739
  int mask_src;
740
  int bits_opc;
741
  int mask_opc;
742
  int bits_code;
743
  int mask_code;
744
} ALU2op;
745
 
746
#define ALU2op_opcode           0x4000
747
#define ALU2op_dst_bits         0
748
#define ALU2op_dst_mask         0x7
749
#define ALU2op_src_bits         3
750
#define ALU2op_src_mask         0x7
751
#define ALU2op_opc_bits         6
752
#define ALU2op_opc_mask         0xf
753
#define ALU2op_code_bits        10
754
#define ALU2op_code_mask        0x3f
755
 
756
#define init_ALU2op                             \
757
{                                               \
758
  ALU2op_opcode,                                \
759
  ALU2op_dst_bits,      ALU2op_dst_mask,        \
760
  ALU2op_src_bits,      ALU2op_src_mask,        \
761
  ALU2op_opc_bits,      ALU2op_opc_mask,        \
762
  ALU2op_code_bits,     ALU2op_code_mask        \
763
};
764
 
765
 
766
/*  BRCC
767
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
768
| 0 | 0 | 0 | 1 |.T.|.B.|.offset................................|
769
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
770
*/
771
 
772
typedef struct
773
{
774
  unsigned short opcode;
775
  int bits_offset;
776
  int mask_offset;
777
  int bits_B;
778
  int mask_B;
779
  int bits_T;
780
  int mask_T;
781
  int bits_code;
782
  int mask_code;
783
} BRCC;
784
 
785
#define BRCC_opcode             0x1000
786
#define BRCC_offset_bits        0
787
#define BRCC_offset_mask        0x3ff
788
#define BRCC_B_bits             10
789
#define BRCC_B_mask             0x1
790
#define BRCC_T_bits             11
791
#define BRCC_T_mask             0x1
792
#define BRCC_code_bits          12
793
#define BRCC_code_mask          0xf
794
 
795
#define init_BRCC                               \
796
{                                               \
797
  BRCC_opcode,                                  \
798
  BRCC_offset_bits,     BRCC_offset_mask,       \
799
  BRCC_B_bits,          BRCC_B_mask,            \
800
  BRCC_T_bits,          BRCC_T_mask,            \
801
  BRCC_code_bits,       BRCC_code_mask          \
802
};
803
 
804
 
805
/*  UJUMP
806
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
807
| 0 | 0 | 1 | 0 |.offset........................................|
808
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
809
*/
810
 
811
typedef struct
812
{
813
  unsigned short opcode;
814
  int bits_offset;
815
  int mask_offset;
816
  int bits_code;
817
  int mask_code;
818
} UJump;
819
 
820
#define UJump_opcode            0x2000
821
#define UJump_offset_bits       0
822
#define UJump_offset_mask       0xfff
823
#define UJump_code_bits         12
824
#define UJump_code_mask         0xf
825
 
826
#define init_UJump                              \
827
{                                               \
828
  UJump_opcode,                                 \
829
  UJump_offset_bits,    UJump_offset_mask,      \
830
  UJump_code_bits,      UJump_code_mask         \
831
};
832
 
833
 
834
/*  ProgCtrl
835
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
836
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.prgfunc.......|.poprnd........|
837
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
838
*/
839
 
840
typedef struct
841
{
842
  unsigned short opcode;
843
  int bits_poprnd;
844
  int mask_poprnd;
845
  int bits_prgfunc;
846
  int mask_prgfunc;
847
  int bits_code;
848
  int mask_code;
849
} ProgCtrl;
850
 
851
#define ProgCtrl_opcode         0x0000
852
#define ProgCtrl_poprnd_bits    0
853
#define ProgCtrl_poprnd_mask    0xf
854
#define ProgCtrl_prgfunc_bits   4
855
#define ProgCtrl_prgfunc_mask   0xf
856
#define ProgCtrl_code_bits      8
857
#define ProgCtrl_code_mask      0xff
858
 
859
#define init_ProgCtrl                                   \
860
{                                                       \
861
  ProgCtrl_opcode,                                      \
862
  ProgCtrl_poprnd_bits,         ProgCtrl_poprnd_mask,   \
863
  ProgCtrl_prgfunc_bits,        ProgCtrl_prgfunc_mask,  \
864
  ProgCtrl_code_bits,           ProgCtrl_code_mask      \
865
};
866
 
867
/*  CALLa
868
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
869
| 1 | 1 | 1 | 0 | 0 | 0 | 1 |.S.|.msw...........................|
870
|.lsw...........................................................|
871
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
872
*/
873
 
874
 
875
typedef struct
876
{
877
  unsigned long opcode;
878
  int bits_addr;
879
  int mask_addr;
880
  int bits_S;
881
  int mask_S;
882
  int bits_code;
883
  int mask_code;
884
} CALLa;
885
 
886
#define CALLa_opcode    0xe2000000
887
#define CALLa_addr_bits 0
888
#define CALLa_addr_mask 0xffffff
889
#define CALLa_S_bits    24
890
#define CALLa_S_mask    0x1
891
#define CALLa_code_bits 25
892
#define CALLa_code_mask 0x7f
893
 
894
#define init_CALLa                              \
895
{                                               \
896
  CALLa_opcode,                                 \
897
  CALLa_addr_bits,      CALLa_addr_mask,        \
898
  CALLa_S_bits,         CALLa_S_mask,           \
899
  CALLa_code_bits,      CALLa_code_mask         \
900
};
901
 
902
 
903
/*  pseudoDEBUG
904
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
905
| 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 |.fn....|.grp.......|.reg.......|
906
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
907
*/
908
 
909
typedef struct
910
{
911
  unsigned short opcode;
912
  int bits_reg;
913
  int mask_reg;
914
  int bits_grp;
915
  int mask_grp;
916
  int bits_fn;
917
  int mask_fn;
918
  int bits_code;
919
  int mask_code;
920
} PseudoDbg;
921
 
922
#define PseudoDbg_opcode        0xf800
923
#define PseudoDbg_reg_bits      0
924
#define PseudoDbg_reg_mask      0x7
925
#define PseudoDbg_grp_bits      3
926
#define PseudoDbg_grp_mask      0x7
927
#define PseudoDbg_fn_bits       6
928
#define PseudoDbg_fn_mask       0x3
929
#define PseudoDbg_code_bits     8
930
#define PseudoDbg_code_mask     0xff
931
 
932
#define init_PseudoDbg                          \
933
{                                               \
934
  PseudoDbg_opcode,                             \
935
  PseudoDbg_reg_bits,   PseudoDbg_reg_mask,     \
936
  PseudoDbg_grp_bits,   PseudoDbg_grp_mask,     \
937
  PseudoDbg_fn_bits,    PseudoDbg_fn_mask,      \
938
  PseudoDbg_code_bits,  PseudoDbg_code_mask     \
939
};
940
 
941
/*  PseudoDbg_assert
942
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
943
| 1 | 1 | 1 | 1 | 0 | - | - | - | dbgop |.grp.......|.regtest...|
944
|.expected......................................................|
945
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
946
*/
947
 
948
typedef struct
949
{
950
  unsigned long opcode;
951
  int bits_expected;
952
  int mask_expected;
953
  int bits_regtest;
954
  int mask_regtest;
955
  int bits_grp;
956
  int mask_grp;
957
  int bits_dbgop;
958
  int mask_dbgop;
959
  int bits_dontcare;
960
  int mask_dontcare;
961
  int bits_code;
962
  int mask_code;
963
} PseudoDbg_Assert;
964
 
965
#define PseudoDbg_Assert_opcode         0xf0000000
966
#define PseudoDbg_Assert_expected_bits  0
967
#define PseudoDbg_Assert_expected_mask  0xffff
968
#define PseudoDbg_Assert_regtest_bits   16
969
#define PseudoDbg_Assert_regtest_mask   0x7
970
#define PseudoDbg_Assert_grp_bits       19
971
#define PseudoDbg_Assert_grp_mask       0x7
972
#define PseudoDbg_Assert_dbgop_bits     22
973
#define PseudoDbg_Assert_dbgop_mask     0x3
974
#define PseudoDbg_Assert_dontcare_bits  24
975
#define PseudoDbg_Assert_dontcare_mask  0x7
976
#define PseudoDbg_Assert_code_bits      27
977
#define PseudoDbg_Assert_code_mask      0x1f
978
 
979
#define init_PseudoDbg_Assert                                           \
980
{                                                                       \
981
  PseudoDbg_Assert_opcode,                                              \
982
  PseudoDbg_Assert_expected_bits,       PseudoDbg_Assert_expected_mask, \
983
  PseudoDbg_Assert_regtest_bits,        PseudoDbg_Assert_regtest_mask,  \
984
  PseudoDbg_Assert_grp_bits,            PseudoDbg_Assert_grp_mask,      \
985
  PseudoDbg_Assert_dbgop_bits,          PseudoDbg_Assert_dbgop_mask,    \
986
  PseudoDbg_Assert_dontcare_bits,       PseudoDbg_Assert_dontcare_mask, \
987
  PseudoDbg_Assert_code_bits,           PseudoDbg_Assert_code_mask      \
988
};
989
 
990
/*  CaCTRL
991
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
992
| 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |.a.|.op....|.reg.......|
993
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
994
*/
995
 
996
typedef struct
997
{
998
  unsigned short opcode;
999
  int bits_reg;
1000
  int mask_reg;
1001
  int bits_op;
1002
  int mask_op;
1003
  int bits_a;
1004
  int mask_a;
1005
  int bits_code;
1006
  int mask_code;
1007
} CaCTRL;
1008
 
1009
#define CaCTRL_opcode           0x0240
1010
#define CaCTRL_reg_bits         0
1011
#define CaCTRL_reg_mask         0x7
1012
#define CaCTRL_op_bits          3
1013
#define CaCTRL_op_mask          0x3
1014
#define CaCTRL_a_bits           5
1015
#define CaCTRL_a_mask           0x1
1016
#define CaCTRL_code_bits        6
1017
#define CaCTRL_code_mask        0x3fff
1018
 
1019
#define init_CaCTRL                             \
1020
{                                               \
1021
  CaCTRL_opcode,                                \
1022
  CaCTRL_reg_bits,      CaCTRL_reg_mask,        \
1023
  CaCTRL_op_bits,       CaCTRL_op_mask,         \
1024
  CaCTRL_a_bits,        CaCTRL_a_mask,          \
1025
  CaCTRL_code_bits,     CaCTRL_code_mask        \
1026
};
1027
 
1028
/*  PushPopMultiple
1029
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1030
| 0 | 0 | 0 | 0 | 0 | 1 | 0 |.d.|.p.|.W.|.dr........|.pr........|
1031
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1032
*/
1033
 
1034
typedef struct
1035
{
1036
  unsigned short opcode;
1037
  int bits_pr;
1038
  int mask_pr;
1039
  int bits_dr;
1040
  int mask_dr;
1041
  int bits_W;
1042
  int mask_W;
1043
  int bits_p;
1044
  int mask_p;
1045
  int bits_d;
1046
  int mask_d;
1047
  int bits_code;
1048
  int mask_code;
1049
} PushPopMultiple;
1050
 
1051
#define PushPopMultiple_opcode          0x0400
1052
#define PushPopMultiple_pr_bits         0
1053
#define PushPopMultiple_pr_mask         0x7
1054
#define PushPopMultiple_dr_bits         3
1055
#define PushPopMultiple_dr_mask         0x7
1056
#define PushPopMultiple_W_bits          6
1057
#define PushPopMultiple_W_mask          0x1
1058
#define PushPopMultiple_p_bits          7
1059
#define PushPopMultiple_p_mask          0x1
1060
#define PushPopMultiple_d_bits          8
1061
#define PushPopMultiple_d_mask          0x1
1062
#define PushPopMultiple_code_bits       8
1063
#define PushPopMultiple_code_mask       0x1
1064
 
1065
#define init_PushPopMultiple                                    \
1066
{                                                               \
1067
  PushPopMultiple_opcode,                                       \
1068
  PushPopMultiple_pr_bits,      PushPopMultiple_pr_mask,        \
1069
  PushPopMultiple_dr_bits,      PushPopMultiple_dr_mask,        \
1070
  PushPopMultiple_W_bits,       PushPopMultiple_W_mask,         \
1071
  PushPopMultiple_p_bits,       PushPopMultiple_p_mask,         \
1072
  PushPopMultiple_d_bits,       PushPopMultiple_d_mask,         \
1073
  PushPopMultiple_code_bits,    PushPopMultiple_code_mask       \
1074
};
1075
 
1076
/*  PushPopReg
1077
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1078
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.W.|.grp.......|.reg.......|
1079
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1080
*/
1081
 
1082
typedef struct
1083
{
1084
  unsigned short opcode;
1085
  int bits_reg;
1086
  int mask_reg;
1087
  int bits_grp;
1088
  int mask_grp;
1089
  int bits_W;
1090
  int mask_W;
1091
  int bits_code;
1092
  int mask_code;
1093
} PushPopReg;
1094
 
1095
#define PushPopReg_opcode       0x0100
1096
#define PushPopReg_reg_bits     0
1097
#define PushPopReg_reg_mask     0x7
1098
#define PushPopReg_grp_bits     3
1099
#define PushPopReg_grp_mask     0x7
1100
#define PushPopReg_W_bits       6
1101
#define PushPopReg_W_mask       0x1
1102
#define PushPopReg_code_bits    7
1103
#define PushPopReg_code_mask    0x1ff
1104
 
1105
#define init_PushPopReg                         \
1106
{                                               \
1107
  PushPopReg_opcode,                            \
1108
  PushPopReg_reg_bits,  PushPopReg_reg_mask,    \
1109
  PushPopReg_grp_bits,  PushPopReg_grp_mask,    \
1110
  PushPopReg_W_bits,    PushPopReg_W_mask,      \
1111
  PushPopReg_code_bits, PushPopReg_code_mask,   \
1112
};
1113
 
1114
/*  linkage
1115
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1116
| 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.R.|
1117
|.framesize.....................................................|
1118
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1119
*/
1120
 
1121
typedef struct
1122
{
1123
  unsigned long opcode;
1124
  int bits_framesize;
1125
  int mask_framesize;
1126
  int bits_R;
1127
  int mask_R;
1128
  int bits_code;
1129
  int mask_code;
1130
} Linkage;
1131
 
1132
#define Linkage_opcode          0xe8000000
1133
#define Linkage_framesize_bits  0
1134
#define Linkage_framesize_mask  0xffff
1135
#define Linkage_R_bits          16
1136
#define Linkage_R_mask          0x1
1137
#define Linkage_code_bits       17
1138
#define Linkage_code_mask       0x7fff
1139
 
1140
#define init_Linkage                                    \
1141
{                                                       \
1142
  Linkage_opcode,                                       \
1143
  Linkage_framesize_bits,       Linkage_framesize_mask, \
1144
  Linkage_R_bits,               Linkage_R_mask,         \
1145
  Linkage_code_bits,            Linkage_code_mask       \
1146
};
1147
 
1148
/*  LoopSetup
1149
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1150
| 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 |.rop...|.c.|.soffset.......|
1151
|.reg...........| - | - |.eoffset...............................|
1152
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1153
*/
1154
 
1155
typedef struct
1156
{
1157
  unsigned long opcode;
1158
  int bits_eoffset;
1159
  int mask_eoffset;
1160
  int bits_dontcare;
1161
  int mask_dontcare;
1162
  int bits_reg;
1163
  int mask_reg;
1164
  int bits_soffset;
1165
  int mask_soffset;
1166
  int bits_c;
1167
  int mask_c;
1168
  int bits_rop;
1169
  int mask_rop;
1170
  int bits_code;
1171
  int mask_code;
1172
} LoopSetup;
1173
 
1174
#define LoopSetup_opcode                0xe0800000
1175
#define LoopSetup_eoffset_bits          0
1176
#define LoopSetup_eoffset_mask          0x3ff
1177
#define LoopSetup_dontcare_bits         10
1178
#define LoopSetup_dontcare_mask         0x3
1179
#define LoopSetup_reg_bits              12
1180
#define LoopSetup_reg_mask              0xf
1181
#define LoopSetup_soffset_bits          16
1182
#define LoopSetup_soffset_mask          0xf
1183
#define LoopSetup_c_bits                20
1184
#define LoopSetup_c_mask                0x1
1185
#define LoopSetup_rop_bits              21
1186
#define LoopSetup_rop_mask              0x3
1187
#define LoopSetup_code_bits             23
1188
#define LoopSetup_code_mask             0x1ff
1189
 
1190
#define init_LoopSetup                                          \
1191
{                                                               \
1192
  LoopSetup_opcode,                                             \
1193
  LoopSetup_eoffset_bits,       LoopSetup_eoffset_mask,         \
1194
  LoopSetup_dontcare_bits,      LoopSetup_dontcare_mask,        \
1195
  LoopSetup_reg_bits,           LoopSetup_reg_mask,             \
1196
  LoopSetup_soffset_bits,       LoopSetup_soffset_mask,         \
1197
  LoopSetup_c_bits,             LoopSetup_c_mask,               \
1198
  LoopSetup_rop_bits,           LoopSetup_rop_mask,             \
1199
  LoopSetup_code_bits,          LoopSetup_code_mask             \
1200
};
1201
 
1202
/*  LDIMMhalf
1203
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1204
| 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 |.Z.|.H.|.S.|.grp...|.reg.......|
1205
|.hword.........................................................|
1206
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1207
*/
1208
 
1209
typedef struct
1210
{
1211
  unsigned long opcode;
1212
  int bits_hword;
1213
  int mask_hword;
1214
  int bits_reg;
1215
  int mask_reg;
1216
  int bits_grp;
1217
  int mask_grp;
1218
  int bits_S;
1219
  int mask_S;
1220
  int bits_H;
1221
  int mask_H;
1222
  int bits_Z;
1223
  int mask_Z;
1224
  int bits_code;
1225
  int mask_code;
1226
} LDIMMhalf;
1227
 
1228
#define LDIMMhalf_opcode        0xe1000000
1229
#define LDIMMhalf_hword_bits    0
1230
#define LDIMMhalf_hword_mask    0xffff
1231
#define LDIMMhalf_reg_bits      16
1232
#define LDIMMhalf_reg_mask      0x7
1233
#define LDIMMhalf_grp_bits      19
1234
#define LDIMMhalf_grp_mask      0x3
1235
#define LDIMMhalf_S_bits        21
1236
#define LDIMMhalf_S_mask        0x1
1237
#define LDIMMhalf_H_bits        22
1238
#define LDIMMhalf_H_mask        0x1
1239
#define LDIMMhalf_Z_bits        23
1240
#define LDIMMhalf_Z_mask        0x1
1241
#define LDIMMhalf_code_bits     24
1242
#define LDIMMhalf_code_mask     0xff
1243
 
1244
#define init_LDIMMhalf                          \
1245
{                                               \
1246
  LDIMMhalf_opcode,                             \
1247
  LDIMMhalf_hword_bits, LDIMMhalf_hword_mask,   \
1248
  LDIMMhalf_reg_bits,   LDIMMhalf_reg_mask,     \
1249
  LDIMMhalf_grp_bits,   LDIMMhalf_grp_mask,     \
1250
  LDIMMhalf_S_bits,     LDIMMhalf_S_mask,       \
1251
  LDIMMhalf_H_bits,     LDIMMhalf_H_mask,       \
1252
  LDIMMhalf_Z_bits,     LDIMMhalf_Z_mask,       \
1253
  LDIMMhalf_code_bits,  LDIMMhalf_code_mask     \
1254
};
1255
 
1256
 
1257
/*  CC2dreg
1258
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1259
| 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |.op....|.reg.......|
1260
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1261
*/
1262
 
1263
typedef struct
1264
{
1265
  unsigned short opcode;
1266
  int bits_reg;
1267
  int mask_reg;
1268
  int bits_op;
1269
  int mask_op;
1270
  int bits_code;
1271
  int mask_code;
1272
} CC2dreg;
1273
 
1274
#define CC2dreg_opcode          0x0200
1275
#define CC2dreg_reg_bits        0
1276
#define CC2dreg_reg_mask        0x7
1277
#define CC2dreg_op_bits         3
1278
#define CC2dreg_op_mask         0x3
1279
#define CC2dreg_code_bits       5
1280
#define CC2dreg_code_mask       0x7fff
1281
 
1282
#define init_CC2dreg                            \
1283
{                                               \
1284
  CC2dreg_opcode,                               \
1285
  CC2dreg_reg_bits,     CC2dreg_reg_mask,       \
1286
  CC2dreg_op_bits,      CC2dreg_op_mask,        \
1287
  CC2dreg_code_bits,    CC2dreg_code_mask       \
1288
};
1289
 
1290
 
1291
/*  PTR2op
1292
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1293
| 0 | 1 | 0 | 0 | 0 | 1 | 0 |.opc.......|.src.......|.dst.......|
1294
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1295
*/
1296
 
1297
typedef struct
1298
{
1299
  unsigned short opcode;
1300
  int bits_dst;
1301
  int mask_dst;
1302
  int bits_src;
1303
  int mask_src;
1304
  int bits_opc;
1305
  int mask_opc;
1306
  int bits_code;
1307
  int mask_code;
1308
} PTR2op;
1309
 
1310
#define PTR2op_opcode           0x4400
1311
#define PTR2op_dst_bits         0
1312
#define PTR2op_dst_mask         0x7
1313
#define PTR2op_src_bits         3
1314
#define PTR2op_src_mask         0x7
1315
#define PTR2op_opc_bits         6
1316
#define PTR2op_opc_mask         0x7
1317
#define PTR2op_code_bits        9       
1318
#define PTR2op_code_mask        0x7f
1319
 
1320
#define init_PTR2op                             \
1321
{                                               \
1322
  PTR2op_opcode,                                \
1323
  PTR2op_dst_bits,      PTR2op_dst_mask,        \
1324
  PTR2op_src_bits,      PTR2op_src_mask,        \
1325
  PTR2op_opc_bits,      PTR2op_opc_mask,        \
1326
  PTR2op_code_bits,     PTR2op_code_mask        \
1327
};
1328
 
1329
 
1330
/*  COMP3op
1331
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1332
| 0 | 1 | 0 | 1 |.opc.......|.dst.......|.src1......|.src0......|
1333
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1334
*/
1335
 
1336
typedef struct
1337
{
1338
  unsigned short opcode;
1339
  int bits_src0;
1340
  int mask_src0;
1341
  int bits_src1;
1342
  int mask_src1;
1343
  int bits_dst;
1344
  int mask_dst;
1345
  int bits_opc;
1346
  int mask_opc;
1347
  int bits_code;
1348
  int mask_code;
1349
} COMP3op;
1350
 
1351
#define COMP3op_opcode          0x5000
1352
#define COMP3op_src0_bits       0
1353
#define COMP3op_src0_mask       0x7
1354
#define COMP3op_src1_bits       3
1355
#define COMP3op_src1_mask       0x7
1356
#define COMP3op_dst_bits        6
1357
#define COMP3op_dst_mask        0x7
1358
#define COMP3op_opc_bits        9
1359
#define COMP3op_opc_mask        0x7
1360
#define COMP3op_code_bits       12
1361
#define COMP3op_code_mask       0xf
1362
 
1363
#define init_COMP3op                            \
1364
{                                               \
1365
  COMP3op_opcode,                               \
1366
  COMP3op_src0_bits,    COMP3op_src0_mask,      \
1367
  COMP3op_src1_bits,    COMP3op_src1_mask,      \
1368
  COMP3op_dst_bits,     COMP3op_dst_mask,       \
1369
  COMP3op_opc_bits,     COMP3op_opc_mask,       \
1370
  COMP3op_code_bits,    COMP3op_code_mask       \
1371
};
1372
 
1373
/*  ccMV
1374
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1375
| 0 | 0 | 0 | 0 | 0 | 1 | 1 |.T.|.d.|.s.|.dst.......|.src.......|
1376
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1377
*/
1378
 
1379
typedef struct
1380
{
1381
  unsigned short opcode;
1382
  int bits_src;
1383
  int mask_src;
1384
  int bits_dst;
1385
  int mask_dst;
1386
  int bits_s;
1387
  int mask_s;
1388
  int bits_d;
1389
  int mask_d;
1390
  int bits_T;
1391
  int mask_T;
1392
  int bits_code;
1393
  int mask_code;
1394
} CCmv;
1395
 
1396
#define CCmv_opcode     0x0600
1397
#define CCmv_src_bits   0
1398
#define CCmv_src_mask   0x7
1399
#define CCmv_dst_bits   3
1400
#define CCmv_dst_mask   0x7
1401
#define CCmv_s_bits     6
1402
#define CCmv_s_mask     0x1
1403
#define CCmv_d_bits     7       
1404
#define CCmv_d_mask     0x1
1405
#define CCmv_T_bits     8
1406
#define CCmv_T_mask     0x1
1407
#define CCmv_code_bits  9
1408
#define CCmv_code_mask  0x7f
1409
 
1410
#define init_CCmv                       \
1411
{                                       \
1412
  CCmv_opcode,                          \
1413
  CCmv_src_bits,        CCmv_src_mask,  \
1414
  CCmv_dst_bits,        CCmv_dst_mask,  \
1415
  CCmv_s_bits,          CCmv_s_mask,    \
1416
  CCmv_d_bits,          CCmv_d_mask,    \
1417
  CCmv_T_bits,          CCmv_T_mask,    \
1418
  CCmv_code_bits,       CCmv_code_mask  \
1419
};
1420
 
1421
 
1422
/*  CCflag
1423
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1424
| 0 | 0 | 0 | 0 | 1 |.I.|.opc.......|.G.|.y.........|.x.........|
1425
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1426
*/
1427
 
1428
typedef struct
1429
{
1430
  unsigned short opcode;
1431
  int bits_x;
1432
  int mask_x;
1433
  int bits_y;
1434
  int mask_y;
1435
  int bits_G;
1436
  int mask_G;
1437
  int bits_opc;
1438
  int mask_opc;
1439
  int bits_I;
1440
  int mask_I;
1441
  int bits_code;
1442
  int mask_code;
1443
} CCflag;
1444
 
1445
#define CCflag_opcode           0x0800
1446
#define CCflag_x_bits           0
1447
#define CCflag_x_mask           0x7
1448
#define CCflag_y_bits           3
1449
#define CCflag_y_mask           0x7
1450
#define CCflag_G_bits           6
1451
#define CCflag_G_mask           0x1
1452
#define CCflag_opc_bits         7
1453
#define CCflag_opc_mask         0x7
1454
#define CCflag_I_bits           10
1455
#define CCflag_I_mask           0x1
1456
#define CCflag_code_bits        11
1457
#define CCflag_code_mask        0x1f
1458
 
1459
#define init_CCflag                             \
1460
{                                               \
1461
  CCflag_opcode,                                \
1462
  CCflag_x_bits,        CCflag_x_mask,          \
1463
  CCflag_y_bits,        CCflag_y_mask,          \
1464
  CCflag_G_bits,        CCflag_G_mask,          \
1465
  CCflag_opc_bits,      CCflag_opc_mask,        \
1466
  CCflag_I_bits,        CCflag_I_mask,          \
1467
  CCflag_code_bits,     CCflag_code_mask,       \
1468
};
1469
 
1470
 
1471
/*  CC2stat
1472
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1473
| 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.D.|.op....|.cbit..............|
1474
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1475
*/
1476
 
1477
typedef struct
1478
{
1479
  unsigned short opcode;
1480
  int bits_cbit;
1481
  int mask_cbit;
1482
  int bits_op;
1483
  int mask_op;
1484
  int bits_D;
1485
  int mask_D;
1486
  int bits_code;
1487
  int mask_code;
1488
} CC2stat;
1489
 
1490
#define CC2stat_opcode          0x0300
1491
#define CC2stat_cbit_bits       0
1492
#define CC2stat_cbit_mask       0x1f
1493
#define CC2stat_op_bits         5
1494
#define CC2stat_op_mask         0x3
1495
#define CC2stat_D_bits          7
1496
#define CC2stat_D_mask          0x1
1497
#define CC2stat_code_bits       8
1498
#define CC2stat_code_mask       0xff
1499
 
1500
#define init_CC2stat                            \
1501
{                                               \
1502
  CC2stat_opcode,                               \
1503
  CC2stat_cbit_bits,    CC2stat_cbit_mask,      \
1504
  CC2stat_op_bits,      CC2stat_op_mask,        \
1505
  CC2stat_D_bits,       CC2stat_D_mask,         \
1506
  CC2stat_code_bits,    CC2stat_code_mask       \
1507
};
1508
 
1509
 
1510
/*  REGMV
1511
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1512
| 0 | 0 | 1 | 1 |.gd........|.gs........|.dst.......|.src.......|
1513
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1514
*/
1515
 
1516
typedef struct
1517
{
1518
  unsigned short opcode;
1519
  int bits_src;
1520
  int mask_src;
1521
  int bits_dst;
1522
  int mask_dst;
1523
  int bits_gs;
1524
  int mask_gs;
1525
  int bits_gd;
1526
  int mask_gd;
1527
  int bits_code;
1528
  int mask_code;
1529
} RegMv;
1530
 
1531
#define RegMv_opcode            0x3000
1532
#define RegMv_src_bits          0
1533
#define RegMv_src_mask          0x7
1534
#define RegMv_dst_bits          3
1535
#define RegMv_dst_mask          0x7
1536
#define RegMv_gs_bits           6
1537
#define RegMv_gs_mask           0x7
1538
#define RegMv_gd_bits           9
1539
#define RegMv_gd_mask           0x7
1540
#define RegMv_code_bits         12
1541
#define RegMv_code_mask         0xf
1542
 
1543
#define init_RegMv                      \
1544
{                                       \
1545
  RegMv_opcode,                         \
1546
  RegMv_src_bits,       RegMv_src_mask, \
1547
  RegMv_dst_bits,       RegMv_dst_mask, \
1548
  RegMv_gs_bits,        RegMv_gs_mask,  \
1549
  RegMv_gd_bits,        RegMv_gd_mask,  \
1550
  RegMv_code_bits,      RegMv_code_mask \
1551
};
1552
 
1553
 
1554
/*  COMPI2opD
1555
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1556
| 0 | 1 | 1 | 0 | 0 |.op|.isrc......................|.dst.......|
1557
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1558
*/
1559
 
1560
typedef struct
1561
{
1562
  unsigned short opcode;
1563
  int bits_dst;
1564
  int mask_dst;
1565
  int bits_src;
1566
  int mask_src;
1567
  int bits_op;
1568
  int mask_op;
1569
  int bits_code;
1570
  int mask_code;
1571
} COMPI2opD;
1572
 
1573
#define COMPI2opD_opcode        0x6000
1574
#define COMPI2opD_dst_bits      0
1575
#define COMPI2opD_dst_mask      0x7
1576
#define COMPI2opD_src_bits      3
1577
#define COMPI2opD_src_mask      0x7f
1578
#define COMPI2opD_op_bits       10
1579
#define COMPI2opD_op_mask       0x1
1580
#define COMPI2opD_code_bits     11
1581
#define COMPI2opD_code_mask     0x1f
1582
 
1583
#define init_COMPI2opD                          \
1584
{                                               \
1585
  COMPI2opD_opcode,                             \
1586
  COMPI2opD_dst_bits,   COMPI2opD_dst_mask,     \
1587
  COMPI2opD_src_bits,   COMPI2opD_src_mask,     \
1588
  COMPI2opD_op_bits,    COMPI2opD_op_mask,      \
1589
  COMPI2opD_code_bits,  COMPI2opD_code_mask     \
1590
};
1591
 
1592
/*  COMPI2opP
1593
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1594
| 0 | 1 | 1 | 0 | 1 |.op|.src.......................|.dst.......|
1595
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1596
*/
1597
 
1598
typedef COMPI2opD COMPI2opP;
1599
 
1600
#define COMPI2opP_opcode        0x6800
1601
#define COMPI2opP_dst_bits      0
1602
#define COMPI2opP_dst_mask      0x7
1603
#define COMPI2opP_src_bits      3
1604
#define COMPI2opP_src_mask      0x7f
1605
#define COMPI2opP_op_bits       10
1606
#define COMPI2opP_op_mask       0x1
1607
#define COMPI2opP_code_bits     11
1608
#define COMPI2opP_code_mask     0x1f
1609
 
1610
#define init_COMPI2opP                          \
1611
{                                               \
1612
  COMPI2opP_opcode,                             \
1613
  COMPI2opP_dst_bits,   COMPI2opP_dst_mask,     \
1614
  COMPI2opP_src_bits,   COMPI2opP_src_mask,     \
1615
  COMPI2opP_op_bits,    COMPI2opP_op_mask,      \
1616
  COMPI2opP_code_bits,  COMPI2opP_code_mask     \
1617
};
1618
 
1619
 
1620
/*  dagMODim
1621
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1622
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 |.br| 1 | 1 |.op|.m.....|.i.....|
1623
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1624
*/
1625
 
1626
typedef struct
1627
{
1628
  unsigned short opcode;
1629
  int bits_i;
1630
  int mask_i;
1631
  int bits_m;
1632
  int mask_m;
1633
  int bits_op;
1634
  int mask_op;
1635
  int bits_code2;
1636
  int mask_code2;
1637
  int bits_br;
1638
  int mask_br;
1639
  int bits_code;
1640
  int mask_code;
1641
} DagMODim;
1642
 
1643
#define DagMODim_opcode         0x9e60
1644
#define DagMODim_i_bits         0
1645
#define DagMODim_i_mask         0x3
1646
#define DagMODim_m_bits         2
1647
#define DagMODim_m_mask         0x3
1648
#define DagMODim_op_bits        4
1649
#define DagMODim_op_mask        0x1
1650
#define DagMODim_code2_bits     5
1651
#define DagMODim_code2_mask     0x3
1652
#define DagMODim_br_bits        7
1653
#define DagMODim_br_mask        0x1
1654
#define DagMODim_code_bits      8
1655
#define DagMODim_code_mask      0xff
1656
 
1657
#define init_DagMODim                           \
1658
{                                               \
1659
  DagMODim_opcode,                              \
1660
  DagMODim_i_bits,      DagMODim_i_mask,        \
1661
  DagMODim_m_bits,      DagMODim_m_mask,        \
1662
  DagMODim_op_bits,     DagMODim_op_mask,       \
1663
  DagMODim_code2_bits,  DagMODim_code2_mask,    \
1664
  DagMODim_br_bits,     DagMODim_br_mask,       \
1665
  DagMODim_code_bits,   DagMODim_code_mask      \
1666
};
1667
 
1668
/*  dagMODik
1669
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1670
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 |.op....|.i.....|
1671
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1672
*/
1673
 
1674
typedef struct
1675
{
1676
  unsigned short opcode;
1677
  int bits_i;
1678
  int mask_i;
1679
  int bits_op;
1680
  int mask_op;
1681
  int bits_code;
1682
  int mask_code;
1683
} DagMODik;
1684
 
1685
#define DagMODik_opcode         0x9f60
1686
#define DagMODik_i_bits         0
1687
#define DagMODik_i_mask         0x3
1688
#define DagMODik_op_bits        2
1689
#define DagMODik_op_mask        0x3
1690
#define DagMODik_code_bits      3
1691
#define DagMODik_code_mask      0xfff
1692
 
1693
#define init_DagMODik                           \
1694
{                                               \
1695
  DagMODik_opcode,                              \
1696
  DagMODik_i_bits,      DagMODik_i_mask,        \
1697
  DagMODik_op_bits,     DagMODik_op_mask,       \
1698
  DagMODik_code_bits,   DagMODik_code_mask      \
1699
};

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