OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [sim/] [common/] [dv-core.c] - Blame information for rev 467

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 330 jeremybenn
/* The common simulator framework for GDB, the GNU Debugger.
2
 
3
   Copyright 2002, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
4
 
5
   Contributed by Andrew Cagney and Red Hat.
6
 
7
   This file is part of GDB.
8
 
9
   This program is free software; you can redistribute it and/or modify
10
   it under the terms of the GNU General Public License as published by
11
   the Free Software Foundation; either version 3 of the License, or
12
   (at your option) any later version.
13
 
14
   This program is distributed in the hope that it will be useful,
15
   but WITHOUT ANY WARRANTY; without even the implied warranty of
16
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17
   GNU General Public License for more details.
18
 
19
   You should have received a copy of the GNU General Public License
20
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
21
 
22
 
23
#include "sim-main.h"
24
#include "hw-main.h"
25
 
26
/* DEVICE
27
 
28
   core - root of the device tree
29
 
30
   DESCRIPTION
31
 
32
   The core device, positioned at the root of the device tree appears
33
   to its child devices as a normal device just like every other
34
   device in the tree.
35
 
36
   Internally it is implemented using a core object.  Requests to
37
   attach (or detach) address spaces are passed to that core object.
38
   Requests to transfer (DMA) data are reflected back down the device
39
   tree using the core_map data transfer methods.
40
 
41
   PROPERTIES
42
 
43
   None.
44
 
45
   */
46
 
47
 
48
static void
49
dv_core_attach_address_callback (struct hw *me,
50
                                 int level,
51
                                 int space,
52
                                 address_word addr,
53
                                 address_word nr_bytes,
54
                                 struct hw *client)
55
{
56
  HW_TRACE ((me, "attach - level=%d, space=%d, addr=0x%lx, nr_bytes=%ld, client=%s",
57
             level, space, (unsigned long) addr, (unsigned long) nr_bytes, hw_path (client)));
58
  /* NOTE: At preset the space is assumed to be zero.  Perhaphs the
59
     space should be mapped onto something for instance: space0 -
60
     unified memory; space1 - IO memory; ... */
61
  sim_core_attach (hw_system (me),
62
                   NULL, /*cpu*/
63
                   level,
64
                   access_read_write_exec,
65
                   space, addr,
66
                   nr_bytes,
67
                   0, /* modulo */
68
                   client,
69
                   NULL);
70
}
71
 
72
 
73
static unsigned
74
dv_core_dma_read_buffer_callback (struct hw *me,
75
                                  void *dest,
76
                                  int space,
77
                                  unsigned_word addr,
78
                                  unsigned nr_bytes)
79
{
80
  return sim_core_read_buffer (hw_system (me),
81
                               NULL, /*CPU*/
82
                               space, /*???*/
83
                               dest,
84
                               addr,
85
                               nr_bytes);
86
}
87
 
88
 
89
static unsigned
90
dv_core_dma_write_buffer_callback (struct hw *me,
91
                                   const void *source,
92
                                   int space,
93
                                   unsigned_word addr,
94
                                   unsigned nr_bytes,
95
                                   int violate_read_only_section)
96
{
97
  return sim_core_write_buffer (hw_system (me),
98
                                NULL, /*cpu*/
99
                                space, /*???*/
100
                                source,
101
                                addr,
102
                                nr_bytes);
103
}
104
 
105
 
106
static void
107
dv_core_finish (struct hw *me)
108
{
109
  set_hw_attach_address (me, dv_core_attach_address_callback);
110
  set_hw_dma_write_buffer (me, dv_core_dma_write_buffer_callback);
111
  set_hw_dma_read_buffer (me, dv_core_dma_read_buffer_callback);
112
}
113
 
114
const struct hw_descriptor dv_core_descriptor[] = {
115
  { "core", dv_core_finish, },
116
  { NULL, NULL },
117
};

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.