OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [sim/] [common/] [hw-ports.h] - Blame information for rev 357

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 330 jeremybenn
/* Hardware ports.
2
   Copyright (C) 1998, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
3
   Contributed by Andrew Cagney and Cygnus Solutions.
4
 
5
This file is part of GDB, the GNU debugger.
6
 
7
This program is free software; you can redistribute it and/or modify
8
it under the terms of the GNU General Public License as published by
9
the Free Software Foundation; either version 3 of the License, or
10
(at your option) any later version.
11
 
12
This program is distributed in the hope that it will be useful,
13
but WITHOUT ANY WARRANTY; without even the implied warranty of
14
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15
GNU General Public License for more details.
16
 
17
You should have received a copy of the GNU General Public License
18
along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
19
 
20
 
21
#ifndef HW_PORTS_H
22
#define HW_PORTS_H
23
 
24
/* Initialize a port */
25
 
26
struct hw_port_descriptor {
27
  const char *name;
28
  int number;
29
  int nr_ports;
30
  port_direction direction;
31
};
32
 
33
void set_hw_ports (struct hw *hw, const struct hw_port_descriptor ports[]);
34
 
35
typedef void (hw_port_event_method)
36
     (struct hw *me,
37
      int my_port,
38
      struct hw *source,
39
      int source_port,
40
      int level);
41
 
42
void set_hw_port_event (struct hw *hw, hw_port_event_method *to_port_event);
43
 
44
 
45
/* Port source
46
 
47
   A device drives its output ports using the call
48
 
49
   */
50
 
51
void hw_port_event
52
(struct hw *me,
53
 int my_port,
54
 int value);
55
 
56
/* This port event will then be propagated to any attached
57
   destination ports.
58
 
59
   Any interpretation of PORT and VALUE is model dependent.  As a
60
   guideline the following are recommended: PCI interrupts A-D should
61
   correspond to ports 0-3; level sensitive interrupts be requested
62
   with a value of one and withdrawn with a value of 0; edge sensitive
63
   interrupts always have a value of 1, the event its self is treated
64
   as the interrupt.
65
 
66
 
67
   Port destinations
68
 
69
   Attached to each port of a device can be zero or more
70
   destinations.  These destinations consist of a device/port pair.
71
   A destination is attached/detached to a device line using the
72
   attach and detach calls. */
73
 
74
void hw_port_attach
75
(struct hw *me,
76
 int my_port,
77
 struct hw *dest,
78
 int dest_port,
79
 object_disposition disposition);
80
 
81
void hw_port_detach
82
(struct hw *me,
83
 int my_port,
84
 struct hw *dest,
85
 int dest_port);
86
 
87
 
88
/* Iterate over the list of ports attached to a device */
89
 
90
typedef void (hw_port_traverse_function)
91
     (struct hw *me,
92
      int my_port,
93
      struct hw *dest,
94
      int dest_port,
95
      void *data);
96
 
97
void hw_port_traverse
98
(struct hw *me,
99
 hw_port_traverse_function *handler,
100
 void *data);
101
 
102
 
103
/* DESTINATION is attached (detached) to LINE of the device ME
104
 
105
 
106
   Port conversion
107
 
108
   Users refer to port numbers symbolically.  For instance a device
109
   may refer to its `INT' signal which is internally represented by
110
   port 3.
111
 
112
   To convert to/from the symbolic and internal representation of a
113
   port name/number.  The following functions are available. */
114
 
115
int hw_port_decode
116
(struct hw *me,
117
 const char *symbolic_name,
118
 port_direction direction);
119
 
120
int hw_port_encode
121
(struct hw *me,
122
 int port_number,
123
 char *buf,
124
 int sizeof_buf,
125
 port_direction direction);
126
 
127
 
128
#endif

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.