OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [sim/] [common/] [sim-signal.c] - Blame information for rev 357

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 330 jeremybenn
/* Simulator signal support
2
   Copyright (C) 1997, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
3
   Contributed by Cygnus Support
4
 
5
This file is part of the GNU Simulators.
6
 
7
This program is free software; you can redistribute it and/or modify
8
it under the terms of the GNU General Public License as published by
9
the Free Software Foundation; either version 3 of the License, or
10
(at your option) any later version.
11
 
12
This program is distributed in the hope that it will be useful,
13
but WITHOUT ANY WARRANTY; without even the implied warranty of
14
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15
GNU General Public License for more details.
16
 
17
You should have received a copy of the GNU General Public License
18
along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
19
 
20
#include <signal.h>
21
#include "sim-main.h"
22
 
23
/* Convert SIM_SIGFOO to SIGFOO.
24
   What to do when the host doesn't have SIGFOO is handled on a case by case
25
   basis.  Generally, in the case of passing a value back to gdb, we want gdb
26
   to not think the process has died (so it can be debugged at the point of
27
   failure).  */
28
 
29
#ifdef _WIN32
30
#ifndef SIGTRAP
31
#define SIGTRAP 5
32
#endif
33
#ifndef SIGBUS
34
#define SIGBUS 10
35
#endif
36
#ifndef SIGQUIT
37
#define SIGQUIT 3
38
#endif
39
#endif
40
 
41
int
42
sim_signal_to_host (SIM_DESC sd, SIM_SIGNAL sig)
43
{
44
  switch (sig)
45
    {
46
    case SIM_SIGINT :
47
      return SIGINT;
48
 
49
    case SIM_SIGABRT :
50
      return SIGABRT;
51
 
52
    case SIM_SIGILL :
53
#ifdef SIGILL
54
      return SIGILL;
55
#else
56
      return SIGSEGV;
57
#endif
58
 
59
    case SIM_SIGTRAP :
60
      return SIGTRAP;
61
 
62
    case SIM_SIGBUS :
63
#ifdef SIGBUS
64
      return SIGBUS;
65
#else
66
      return SIGSEGV;
67
#endif
68
 
69
    case SIM_SIGSEGV :
70
      return SIGSEGV;
71
 
72
    case SIM_SIGXCPU :
73
#ifdef SIGXCPU
74
      return SIGXCPU;
75
#endif
76
      break;
77
 
78
    case SIM_SIGFPE:
79
#ifdef SIGFPE
80
      return SIGFPE;
81
#endif
82
      break;
83
 
84
    case SIM_SIGNONE:
85
      return 0;
86
      break;
87
    }
88
 
89
  sim_io_eprintf (sd, "sim_signal_to_host: unknown signal: %d\n", sig);
90
#ifdef SIGHUP
91
  return SIGHUP;  /* FIXME: Suggestions?  */
92
#else
93
  return 1;
94
#endif
95
}
96
 
97
enum target_signal
98
sim_signal_to_target (SIM_DESC sd, SIM_SIGNAL sig)
99
{
100
  switch (sig)
101
    {
102
    case SIM_SIGINT :
103
      return TARGET_SIGNAL_INT;
104
 
105
    case SIM_SIGABRT :
106
      return TARGET_SIGNAL_ABRT;
107
 
108
    case SIM_SIGILL :
109
      return TARGET_SIGNAL_ILL;
110
 
111
    case SIM_SIGTRAP :
112
      return TARGET_SIGNAL_TRAP;
113
 
114
    case SIM_SIGBUS :
115
      return TARGET_SIGNAL_BUS;
116
 
117
    case SIM_SIGSEGV :
118
      return TARGET_SIGNAL_SEGV;
119
 
120
    case SIM_SIGXCPU :
121
      return TARGET_SIGNAL_XCPU;
122
 
123
    case SIM_SIGFPE:
124
      return TARGET_SIGNAL_FPE;
125
      break;
126
 
127
    case SIM_SIGNONE:
128
      return TARGET_SIGNAL_0;
129
      break;
130
    }
131
 
132
  sim_io_eprintf (sd, "sim_signal_to_host: unknown signal: %d\n", sig);
133
  return TARGET_SIGNAL_HUP;
134
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.