OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [sim/] [cr16/] [gencode.c] - Blame information for rev 416

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 330 jeremybenn
/* Simulation code for the CR16 processor.
2
   Copyright (C) 2008, 2009, 2010 Free Software Foundation, Inc.
3
   Contributed by M Ranga Swami Reddy <MR.Swami.Reddy@nsc.com>
4
 
5
   This file is part of GDB, the GNU debugger.
6
 
7
   This program is free software; you can redistribute it and/or modify
8
   it under the terms of the GNU General Public License as published by
9
   the Free Software Foundation; either version 3, or (at your option)
10
   any later version.
11
 
12
   This program is distributed in the hope that it will be useful,
13
   but WITHOUT ANY WARRANTY; without even the implied warranty of
14
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15
   GNU General Public License for more details.
16
 
17
   You should have received a copy of the GNU General Public License
18
   along with this program. If not, see <http://www.gnu.org/licenses/>.  */
19
 
20
 
21
#include "config.h"
22
#include <stdio.h>
23
#include <ctype.h>
24
#include <limits.h>
25
#include "ansidecl.h"
26
#include "opcode/cr16.h"
27
 
28
static void write_header PARAMS ((void));
29
static void write_opcodes PARAMS ((void));
30
static void write_template PARAMS ((void));
31
 
32
int
33
main (int argc, char *argv[])
34
{
35
  if ((argc > 1) && (strcmp (argv[1],"-h") == 0))
36
    write_header();
37
  else if ((argc > 1) && (strcmp (argv[1],"-t") == 0))
38
    write_template ();
39
  else
40
    write_opcodes();
41
  return 0;
42
}
43
 
44
 
45
static void
46
write_header ()
47
{
48
  int i = 0;
49
 
50
  /* Start searching from end of instruction table.  */
51
  const inst *instruction = &cr16_instruction[NUMOPCODES - 1];
52
 
53
  /* Loop over instruction table until a full match is found.  */
54
  for ( ; i < NUMOPCODES; i++)
55
  {
56
   printf("void OP_%X_%X PARAMS ((void));\t\t/* %s */\n",cr16_instruction[i].match, (32 - cr16_instruction[i].match_bits), cr16_instruction[i].mnemonic);
57
  }
58
}
59
 
60
 
61
/* write_template creates a file all required functions,
62
   ready to be filled out.  */
63
 
64
static void
65
write_template ()
66
{
67
  int i = 0,j, k, flags;
68
 
69
  printf ("#include \"cr16_sim.h\"\n");
70
  printf ("#include \"simops.h\"\n\n");
71
 
72
  for ( ; i < NUMOPCODES; i++)
73
    {
74
      if (cr16_instruction[i].size != 0)
75
{
76
  printf("/* %s */\nvoid\nOP_%X_%X ()\n{\n",cr16_instruction[i].mnemonic,cr16_instruction[i].match,(32 - cr16_instruction[i].match_bits));
77
 
78
  /* count operands.  */
79
  j = 0;
80
  for (k=0;k<5;k++)
81
    {
82
      if (cr16_instruction[i].operands[k].op_type == dummy)
83
                break;
84
              else
85
                j++;
86
    }
87
  switch (j)
88
    {
89
    case 0:
90
      printf ("printf(\"   %s\\n\");\n",cr16_instruction[i].mnemonic);
91
      break;
92
    case 1:
93
      printf ("printf(\"   %s\\t%%x\\n\",OP[0]);\n",cr16_instruction[i].mnemonic);
94
      break;
95
    case 2:
96
      printf ("printf(\"   %s\\t%%x,%%x\\n\",OP[0],OP[1]);\n",cr16_instruction[i].mnemonic);
97
      break;
98
    case 3:
99
      printf ("printf(\"   %s\\t%%x,%%x,%%x\\n\",OP[0],OP[1],OP[2]);\n",cr16_instruction[i].mnemonic);
100
      break;
101
    default:
102
      fprintf (stderr,"Too many operands: %d\n",j);
103
    }
104
  printf ("}\n\n");
105
}
106
    }
107
}
108
 
109
 
110
long Opcodes[512];
111
static int curop=0;
112
 
113
check_opcodes( long op)
114
{
115
  int i;
116
 
117
  for (i=0;i<curop;i++)
118
    if (Opcodes[i] == op)
119
      fprintf(stderr,"DUPLICATE OPCODES: %x\n",op);
120
}
121
 
122
 
123
static void
124
write_opcodes ()
125
{
126
  int i = 0, j = 0, k;
127
 
128
  /* write out opcode table.  */
129
  printf ("#include \"cr16_sim.h\"\n");
130
  printf ("#include \"simops.h\"\n\n");
131
  printf ("struct simops Simops[] = {\n");
132
 
133
  for (i = NUMOPCODES-1; i >= 0; --i)
134
    {
135
      if (cr16_instruction[i].size != 0)
136
{
137
           printf ("  { \"%s\", %ld, %d, %d, %d, \"OP_%X_%X\", OP_%X_%X, ",
138
                    cr16_instruction[i].mnemonic, cr16_instruction[i].size,
139
                    cr16_instruction[i].match_bits, cr16_instruction[i].match,
140
                     cr16_instruction[i].flags, ((BIN(cr16_instruction[i].match, cr16_instruction[i].match_bits))>>(cr16_instruction[i].match_bits)),
141
             (32 - cr16_instruction[i].match_bits),
142
                     ((BIN(cr16_instruction[i].match, cr16_instruction[i].match_bits))>>(cr16_instruction[i].match_bits)), (32 - cr16_instruction[i].match_bits));
143
 
144
  j = 0;
145
  for (k=0;k<5;k++)
146
    {
147
      if (cr16_instruction[i].operands[k].op_type == dummy)
148
                break;
149
              else
150
                j++;
151
    }
152
  printf ("%d, ",j);
153
 
154
  j = 0;
155
  for (k=0;k<4;k++)
156
    {
157
      int optype = cr16_instruction[i].operands[k].op_type;
158
      int shift = cr16_instruction[i].operands[k].shift;
159
      if (j == 0)
160
        printf ("{");
161
      else
162
        printf (", ");
163
      printf ("{");
164
      printf ("%d,%d",optype, shift);
165
      printf ("}");
166
      j = 1;
167
   }
168
 if (j)
169
  printf ("}");
170
 printf ("},\n");
171
        }
172
    }
173
  printf (" { \"NULL\",1,8,0,0,\"OP_0_20\",OP_0_20,0,{0,0,0}},\n};\n");
174
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.