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/* Misc. support for CPU family crisv10f.
 
THIS FILE IS MACHINE GENERATED WITH CGEN.
 
Copyright 1996-2010 Free Software Foundation, Inc.
 
This file is part of the GNU simulators.
 
   This file is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3, or (at your option)
   any later version.
 
   It is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.
 
   You should have received a copy of the GNU General Public License along
   with this program; if not, write to the Free Software Foundation, Inc.,
   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
*/
 
#define WANT_CPU crisv10f
#define WANT_CPU_CRISV10F
 
#include "sim-main.h"
#include "cgen-ops.h"
 
/* Get the value of h-v32-non-v32.  */
 
BI
crisv10f_h_v32_non_v32_get (SIM_CPU *current_cpu)
{
  return GET_H_V32_NON_V32 ();
}
 
/* Set a value for h-v32-non-v32.  */
 
void
crisv10f_h_v32_non_v32_set (SIM_CPU *current_cpu, BI newval)
{
  SET_H_V32_NON_V32 (newval);
}
 
/* Get the value of h-pc.  */
 
USI
crisv10f_h_pc_get (SIM_CPU *current_cpu)
{
  return CPU (h_pc);
}
 
/* Set a value for h-pc.  */
 
void
crisv10f_h_pc_set (SIM_CPU *current_cpu, USI newval)
{
  SET_H_PC (newval);
}
 
/* Get the value of h-gr.  */
 
SI
crisv10f_h_gr_get (SIM_CPU *current_cpu, UINT regno)
{
  return GET_H_GR (regno);
}
 
/* Set a value for h-gr.  */
 
void
crisv10f_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
{
  SET_H_GR (regno, newval);
}
 
/* Get the value of h-gr-pc.  */
 
SI
crisv10f_h_gr_pc_get (SIM_CPU *current_cpu, UINT regno)
{
  return GET_H_GR_PC (regno);
}
 
/* Set a value for h-gr-pc.  */
 
void
crisv10f_h_gr_pc_set (SIM_CPU *current_cpu, UINT regno, SI newval)
{
  SET_H_GR_PC (regno, newval);
}
 
/* Get the value of h-gr-real-pc.  */
 
SI
crisv10f_h_gr_real_pc_get (SIM_CPU *current_cpu, UINT regno)
{
  return CPU (h_gr_real_pc[regno]);
}
 
/* Set a value for h-gr-real-pc.  */
 
void
crisv10f_h_gr_real_pc_set (SIM_CPU *current_cpu, UINT regno, SI newval)
{
  CPU (h_gr_real_pc[regno]) = newval;
}
 
/* Get the value of h-raw-gr-pc.  */
 
SI
crisv10f_h_raw_gr_pc_get (SIM_CPU *current_cpu, UINT regno)
{
  return GET_H_RAW_GR_PC (regno);
}
 
/* Set a value for h-raw-gr-pc.  */
 
void
crisv10f_h_raw_gr_pc_set (SIM_CPU *current_cpu, UINT regno, SI newval)
{
  SET_H_RAW_GR_PC (regno, newval);
}
 
/* Get the value of h-sr.  */
 
SI
crisv10f_h_sr_get (SIM_CPU *current_cpu, UINT regno)
{
  return GET_H_SR (regno);
}
 
/* Set a value for h-sr.  */
 
void
crisv10f_h_sr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
{
  SET_H_SR (regno, newval);
}
 
/* Get the value of h-sr-v10.  */
 
SI
crisv10f_h_sr_v10_get (SIM_CPU *current_cpu, UINT regno)
{
  return GET_H_SR_V10 (regno);
}
 
/* Set a value for h-sr-v10.  */
 
void
crisv10f_h_sr_v10_set (SIM_CPU *current_cpu, UINT regno, SI newval)
{
  SET_H_SR_V10 (regno, newval);
}
 
/* Get the value of h-cbit.  */
 
BI
crisv10f_h_cbit_get (SIM_CPU *current_cpu)
{
  return CPU (h_cbit);
}
 
/* Set a value for h-cbit.  */
 
void
crisv10f_h_cbit_set (SIM_CPU *current_cpu, BI newval)
{
  CPU (h_cbit) = newval;
}
 
/* Get the value of h-cbit-move.  */
 
BI
crisv10f_h_cbit_move_get (SIM_CPU *current_cpu)
{
  return GET_H_CBIT_MOVE ();
}
 
/* Set a value for h-cbit-move.  */
 
void
crisv10f_h_cbit_move_set (SIM_CPU *current_cpu, BI newval)
{
  SET_H_CBIT_MOVE (newval);
}
 
/* Get the value of h-cbit-move-pre-v32.  */
 
BI
crisv10f_h_cbit_move_pre_v32_get (SIM_CPU *current_cpu)
{
  return GET_H_CBIT_MOVE_PRE_V32 ();
}
 
/* Set a value for h-cbit-move-pre-v32.  */
 
void
crisv10f_h_cbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)
{
  SET_H_CBIT_MOVE_PRE_V32 (newval);
}
 
/* Get the value of h-vbit.  */
 
BI
crisv10f_h_vbit_get (SIM_CPU *current_cpu)
{
  return CPU (h_vbit);
}
 
/* Set a value for h-vbit.  */
 
void
crisv10f_h_vbit_set (SIM_CPU *current_cpu, BI newval)
{
  CPU (h_vbit) = newval;
}
 
/* Get the value of h-vbit-move.  */
 
BI
crisv10f_h_vbit_move_get (SIM_CPU *current_cpu)
{
  return GET_H_VBIT_MOVE ();
}
 
/* Set a value for h-vbit-move.  */
 
void
crisv10f_h_vbit_move_set (SIM_CPU *current_cpu, BI newval)
{
  SET_H_VBIT_MOVE (newval);
}
 
/* Get the value of h-vbit-move-pre-v32.  */
 
BI
crisv10f_h_vbit_move_pre_v32_get (SIM_CPU *current_cpu)
{
  return GET_H_VBIT_MOVE_PRE_V32 ();
}
 
/* Set a value for h-vbit-move-pre-v32.  */
 
void
crisv10f_h_vbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)
{
  SET_H_VBIT_MOVE_PRE_V32 (newval);
}
 
/* Get the value of h-zbit.  */
 
BI
crisv10f_h_zbit_get (SIM_CPU *current_cpu)
{
  return CPU (h_zbit);
}
 
/* Set a value for h-zbit.  */
 
void
crisv10f_h_zbit_set (SIM_CPU *current_cpu, BI newval)
{
  CPU (h_zbit) = newval;
}
 
/* Get the value of h-zbit-move.  */
 
BI
crisv10f_h_zbit_move_get (SIM_CPU *current_cpu)
{
  return GET_H_ZBIT_MOVE ();
}
 
/* Set a value for h-zbit-move.  */
 
void
crisv10f_h_zbit_move_set (SIM_CPU *current_cpu, BI newval)
{
  SET_H_ZBIT_MOVE (newval);
}
 
/* Get the value of h-zbit-move-pre-v32.  */
 
BI
crisv10f_h_zbit_move_pre_v32_get (SIM_CPU *current_cpu)
{
  return GET_H_ZBIT_MOVE_PRE_V32 ();
}
 
/* Set a value for h-zbit-move-pre-v32.  */
 
void
crisv10f_h_zbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)
{
  SET_H_ZBIT_MOVE_PRE_V32 (newval);
}
 
/* Get the value of h-nbit.  */
 
BI
crisv10f_h_nbit_get (SIM_CPU *current_cpu)
{
  return CPU (h_nbit);
}
 
/* Set a value for h-nbit.  */
 
void
crisv10f_h_nbit_set (SIM_CPU *current_cpu, BI newval)
{
  CPU (h_nbit) = newval;
}
 
/* Get the value of h-nbit-move.  */
 
BI
crisv10f_h_nbit_move_get (SIM_CPU *current_cpu)
{
  return GET_H_NBIT_MOVE ();
}
 
/* Set a value for h-nbit-move.  */
 
void
crisv10f_h_nbit_move_set (SIM_CPU *current_cpu, BI newval)
{
  SET_H_NBIT_MOVE (newval);
}
 
/* Get the value of h-nbit-move-pre-v32.  */
 
BI
crisv10f_h_nbit_move_pre_v32_get (SIM_CPU *current_cpu)
{
  return GET_H_NBIT_MOVE_PRE_V32 ();
}
 
/* Set a value for h-nbit-move-pre-v32.  */
 
void
crisv10f_h_nbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)
{
  SET_H_NBIT_MOVE_PRE_V32 (newval);
}
 
/* Get the value of h-xbit.  */
 
BI
crisv10f_h_xbit_get (SIM_CPU *current_cpu)
{
  return CPU (h_xbit);
}
 
/* Set a value for h-xbit.  */
 
void
crisv10f_h_xbit_set (SIM_CPU *current_cpu, BI newval)
{
  CPU (h_xbit) = newval;
}
 
/* Get the value of h-ibit.  */
 
BI
crisv10f_h_ibit_get (SIM_CPU *current_cpu)
{
  return GET_H_IBIT ();
}
 
/* Set a value for h-ibit.  */
 
void
crisv10f_h_ibit_set (SIM_CPU *current_cpu, BI newval)
{
  SET_H_IBIT (newval);
}
 
/* Get the value of h-ibit-pre-v32.  */
 
BI
crisv10f_h_ibit_pre_v32_get (SIM_CPU *current_cpu)
{
  return CPU (h_ibit_pre_v32);
}
 
/* Set a value for h-ibit-pre-v32.  */
 
void
crisv10f_h_ibit_pre_v32_set (SIM_CPU *current_cpu, BI newval)
{
  CPU (h_ibit_pre_v32) = newval;
}
 
/* Get the value of h-pbit.  */
 
BI
crisv10f_h_pbit_get (SIM_CPU *current_cpu)
{
  return CPU (h_pbit);
}
 
/* Set a value for h-pbit.  */
 
void
crisv10f_h_pbit_set (SIM_CPU *current_cpu, BI newval)
{
  CPU (h_pbit) = newval;
}
 
/* Get the value of h-ubit.  */
 
BI
crisv10f_h_ubit_get (SIM_CPU *current_cpu)
{
  return GET_H_UBIT ();
}
 
/* Set a value for h-ubit.  */
 
void
crisv10f_h_ubit_set (SIM_CPU *current_cpu, BI newval)
{
  SET_H_UBIT (newval);
}
 
/* Get the value of h-ubit-pre-v32.  */
 
BI
crisv10f_h_ubit_pre_v32_get (SIM_CPU *current_cpu)
{
  return CPU (h_ubit_pre_v32);
}
 
/* Set a value for h-ubit-pre-v32.  */
 
void
crisv10f_h_ubit_pre_v32_set (SIM_CPU *current_cpu, BI newval)
{
  CPU (h_ubit_pre_v32) = newval;
}
 
/* Get the value of h-insn-prefixed-p.  */
 
BI
crisv10f_h_insn_prefixed_p_get (SIM_CPU *current_cpu)
{
  return GET_H_INSN_PREFIXED_P ();
}
 
/* Set a value for h-insn-prefixed-p.  */
 
void
crisv10f_h_insn_prefixed_p_set (SIM_CPU *current_cpu, BI newval)
{
  SET_H_INSN_PREFIXED_P (newval);
}
 
/* Get the value of h-insn-prefixed-p-pre-v32.  */
 
BI
crisv10f_h_insn_prefixed_p_pre_v32_get (SIM_CPU *current_cpu)
{
  return CPU (h_insn_prefixed_p_pre_v32);
}
 
/* Set a value for h-insn-prefixed-p-pre-v32.  */
 
void
crisv10f_h_insn_prefixed_p_pre_v32_set (SIM_CPU *current_cpu, BI newval)
{
  CPU (h_insn_prefixed_p_pre_v32) = newval;
}
 
/* Get the value of h-prefixreg-pre-v32.  */
 
SI
crisv10f_h_prefixreg_pre_v32_get (SIM_CPU *current_cpu)
{
  return CPU (h_prefixreg_pre_v32);
}
 
/* Set a value for h-prefixreg-pre-v32.  */
 
void
crisv10f_h_prefixreg_pre_v32_set (SIM_CPU *current_cpu, SI newval)
{
  CPU (h_prefixreg_pre_v32) = newval;
}
 
/* Record trace results for INSN.  */
 
void
crisv10f_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
                            int *indices, TRACE_RECORD *tr)
{
}

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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [sim/] [cris/] [cpuv10.c] - Blame information for rev 357

Line No.	Rev	Author	Line
1	330	jeremybenn	`/* Misc. support for CPU family crisv10f.`
2
3			`THIS FILE IS MACHINE GENERATED WITH CGEN.`
4
5			`Copyright 1996-2010 Free Software Foundation, Inc.`
6
7			`This file is part of the GNU simulators.`
8
9			`This file is free software; you can redistribute it and/or modify`
10			`it under the terms of the GNU General Public License as published by`
11			`the Free Software Foundation; either version 3, or (at your option)`
12			`any later version.`
13
14			`It is distributed in the hope that it will be useful, but WITHOUT`
15			`ANY WARRANTY; without even the implied warranty of MERCHANTABILITY`
16			`or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public`
17			`License for more details.`
18
19			`You should have received a copy of the GNU General Public License along`
20			`with this program; if not, write to the Free Software Foundation, Inc.,`
21			`51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.`
22
23			`*/`
24
25			`#define WANT_CPU crisv10f`
26			`#define WANT_CPU_CRISV10F`
27
28			`#include "sim-main.h"`
29			`#include "cgen-ops.h"`
30
31			`/* Get the value of h-v32-non-v32. */`
32
33			`BI`
34			`crisv10f_h_v32_non_v32_get (SIM_CPU *current_cpu)`
35			`{`
36			`return GET_H_V32_NON_V32 ();`
37			`}`
38
39			`/* Set a value for h-v32-non-v32. */`
40
41			`void`
42			`crisv10f_h_v32_non_v32_set (SIM_CPU *current_cpu, BI newval)`
43			`{`
44			`SET_H_V32_NON_V32 (newval);`
45			`}`
46
47			`/* Get the value of h-pc. */`
48
49			`USI`
50			`crisv10f_h_pc_get (SIM_CPU *current_cpu)`
51			`{`
52			`return CPU (h_pc);`
53			`}`
54
55			`/* Set a value for h-pc. */`
56
57			`void`
58			`crisv10f_h_pc_set (SIM_CPU *current_cpu, USI newval)`
59			`{`
60			`SET_H_PC (newval);`
61			`}`
62
63			`/* Get the value of h-gr. */`
64
65			`SI`
66			`crisv10f_h_gr_get (SIM_CPU *current_cpu, UINT regno)`
67			`{`
68			`return GET_H_GR (regno);`
69			`}`
70
71			`/* Set a value for h-gr. */`
72
73			`void`
74			`crisv10f_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)`
75			`{`
76			`SET_H_GR (regno, newval);`
77			`}`
78
79			`/* Get the value of h-gr-pc. */`
80
81			`SI`
82			`crisv10f_h_gr_pc_get (SIM_CPU *current_cpu, UINT regno)`
83			`{`
84			`return GET_H_GR_PC (regno);`
85			`}`
86
87			`/* Set a value for h-gr-pc. */`
88
89			`void`
90			`crisv10f_h_gr_pc_set (SIM_CPU *current_cpu, UINT regno, SI newval)`
91			`{`
92			`SET_H_GR_PC (regno, newval);`
93			`}`
94
95			`/* Get the value of h-gr-real-pc. */`
96
97			`SI`
98			`crisv10f_h_gr_real_pc_get (SIM_CPU *current_cpu, UINT regno)`
99			`{`
100			`return CPU (h_gr_real_pc[regno]);`
101			`}`
102
103			`/* Set a value for h-gr-real-pc. */`
104
105			`void`
106			`crisv10f_h_gr_real_pc_set (SIM_CPU *current_cpu, UINT regno, SI newval)`
107			`{`
108			`CPU (h_gr_real_pc[regno]) = newval;`
109			`}`
110
111			`/* Get the value of h-raw-gr-pc. */`
112
113			`SI`
114			`crisv10f_h_raw_gr_pc_get (SIM_CPU *current_cpu, UINT regno)`
115			`{`
116			`return GET_H_RAW_GR_PC (regno);`
117			`}`
118
119			`/* Set a value for h-raw-gr-pc. */`
120
121			`void`
122			`crisv10f_h_raw_gr_pc_set (SIM_CPU *current_cpu, UINT regno, SI newval)`
123			`{`
124			`SET_H_RAW_GR_PC (regno, newval);`
125			`}`
126
127			`/* Get the value of h-sr. */`
128
129			`SI`
130			`crisv10f_h_sr_get (SIM_CPU *current_cpu, UINT regno)`
131			`{`
132			`return GET_H_SR (regno);`
133			`}`
134
135			`/* Set a value for h-sr. */`
136
137			`void`
138			`crisv10f_h_sr_set (SIM_CPU *current_cpu, UINT regno, SI newval)`
139			`{`
140			`SET_H_SR (regno, newval);`
141			`}`
142
143			`/* Get the value of h-sr-v10. */`
144
145			`SI`
146			`crisv10f_h_sr_v10_get (SIM_CPU *current_cpu, UINT regno)`
147			`{`
148			`return GET_H_SR_V10 (regno);`
149			`}`
150
151			`/* Set a value for h-sr-v10. */`
152
153			`void`
154			`crisv10f_h_sr_v10_set (SIM_CPU *current_cpu, UINT regno, SI newval)`
155			`{`
156			`SET_H_SR_V10 (regno, newval);`
157			`}`
158
159			`/* Get the value of h-cbit. */`
160
161			`BI`
162			`crisv10f_h_cbit_get (SIM_CPU *current_cpu)`
163			`{`
164			`return CPU (h_cbit);`
165			`}`
166
167			`/* Set a value for h-cbit. */`
168
169			`void`
170			`crisv10f_h_cbit_set (SIM_CPU *current_cpu, BI newval)`
171			`{`
172			`CPU (h_cbit) = newval;`
173			`}`
174
175			`/* Get the value of h-cbit-move. */`
176
177			`BI`
178			`crisv10f_h_cbit_move_get (SIM_CPU *current_cpu)`
179			`{`
180			`return GET_H_CBIT_MOVE ();`
181			`}`
182
183			`/* Set a value for h-cbit-move. */`
184
185			`void`
186			`crisv10f_h_cbit_move_set (SIM_CPU *current_cpu, BI newval)`
187			`{`
188			`SET_H_CBIT_MOVE (newval);`
189			`}`
190
191			`/* Get the value of h-cbit-move-pre-v32. */`
192
193			`BI`
194			`crisv10f_h_cbit_move_pre_v32_get (SIM_CPU *current_cpu)`
195			`{`
196			`return GET_H_CBIT_MOVE_PRE_V32 ();`
197			`}`
198
199			`/* Set a value for h-cbit-move-pre-v32. */`
200
201			`void`
202			`crisv10f_h_cbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)`
203			`{`
204			`SET_H_CBIT_MOVE_PRE_V32 (newval);`
205			`}`
206
207			`/* Get the value of h-vbit. */`
208
209			`BI`
210			`crisv10f_h_vbit_get (SIM_CPU *current_cpu)`
211			`{`
212			`return CPU (h_vbit);`
213			`}`
214
215			`/* Set a value for h-vbit. */`
216
217			`void`
218			`crisv10f_h_vbit_set (SIM_CPU *current_cpu, BI newval)`
219			`{`
220			`CPU (h_vbit) = newval;`
221			`}`
222
223			`/* Get the value of h-vbit-move. */`
224
225			`BI`
226			`crisv10f_h_vbit_move_get (SIM_CPU *current_cpu)`
227			`{`
228			`return GET_H_VBIT_MOVE ();`
229			`}`
230
231			`/* Set a value for h-vbit-move. */`
232
233			`void`
234			`crisv10f_h_vbit_move_set (SIM_CPU *current_cpu, BI newval)`
235			`{`
236			`SET_H_VBIT_MOVE (newval);`
237			`}`
238
239			`/* Get the value of h-vbit-move-pre-v32. */`
240
241			`BI`
242			`crisv10f_h_vbit_move_pre_v32_get (SIM_CPU *current_cpu)`
243			`{`
244			`return GET_H_VBIT_MOVE_PRE_V32 ();`
245			`}`
246
247			`/* Set a value for h-vbit-move-pre-v32. */`
248
249			`void`
250			`crisv10f_h_vbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)`
251			`{`
252			`SET_H_VBIT_MOVE_PRE_V32 (newval);`
253			`}`
254
255			`/* Get the value of h-zbit. */`
256
257			`BI`
258			`crisv10f_h_zbit_get (SIM_CPU *current_cpu)`
259			`{`
260			`return CPU (h_zbit);`
261			`}`
262
263			`/* Set a value for h-zbit. */`
264
265			`void`
266			`crisv10f_h_zbit_set (SIM_CPU *current_cpu, BI newval)`
267			`{`
268			`CPU (h_zbit) = newval;`
269			`}`
270
271			`/* Get the value of h-zbit-move. */`
272
273			`BI`
274			`crisv10f_h_zbit_move_get (SIM_CPU *current_cpu)`
275			`{`
276			`return GET_H_ZBIT_MOVE ();`
277			`}`
278
279			`/* Set a value for h-zbit-move. */`
280
281			`void`
282			`crisv10f_h_zbit_move_set (SIM_CPU *current_cpu, BI newval)`
283			`{`
284			`SET_H_ZBIT_MOVE (newval);`
285			`}`
286
287			`/* Get the value of h-zbit-move-pre-v32. */`
288
289			`BI`
290			`crisv10f_h_zbit_move_pre_v32_get (SIM_CPU *current_cpu)`
291			`{`
292			`return GET_H_ZBIT_MOVE_PRE_V32 ();`
293			`}`
294
295			`/* Set a value for h-zbit-move-pre-v32. */`
296
297			`void`
298			`crisv10f_h_zbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)`
299			`{`
300			`SET_H_ZBIT_MOVE_PRE_V32 (newval);`
301			`}`
302
303			`/* Get the value of h-nbit. */`
304
305			`BI`
306			`crisv10f_h_nbit_get (SIM_CPU *current_cpu)`
307			`{`
308			`return CPU (h_nbit);`
309			`}`
310
311			`/* Set a value for h-nbit. */`
312
313			`void`
314			`crisv10f_h_nbit_set (SIM_CPU *current_cpu, BI newval)`
315			`{`
316			`CPU (h_nbit) = newval;`
317			`}`
318
319			`/* Get the value of h-nbit-move. */`
320
321			`BI`
322			`crisv10f_h_nbit_move_get (SIM_CPU *current_cpu)`
323			`{`
324			`return GET_H_NBIT_MOVE ();`
325			`}`
326
327			`/* Set a value for h-nbit-move. */`
328
329			`void`
330			`crisv10f_h_nbit_move_set (SIM_CPU *current_cpu, BI newval)`
331			`{`
332			`SET_H_NBIT_MOVE (newval);`
333			`}`
334
335			`/* Get the value of h-nbit-move-pre-v32. */`
336
337			`BI`
338			`crisv10f_h_nbit_move_pre_v32_get (SIM_CPU *current_cpu)`
339			`{`
340			`return GET_H_NBIT_MOVE_PRE_V32 ();`
341			`}`
342
343			`/* Set a value for h-nbit-move-pre-v32. */`
344
345			`void`
346			`crisv10f_h_nbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)`
347			`{`
348			`SET_H_NBIT_MOVE_PRE_V32 (newval);`
349			`}`
350
351			`/* Get the value of h-xbit. */`
352
353			`BI`
354			`crisv10f_h_xbit_get (SIM_CPU *current_cpu)`
355			`{`
356			`return CPU (h_xbit);`
357			`}`
358
359			`/* Set a value for h-xbit. */`
360
361			`void`
362			`crisv10f_h_xbit_set (SIM_CPU *current_cpu, BI newval)`
363			`{`
364			`CPU (h_xbit) = newval;`
365			`}`
366
367			`/* Get the value of h-ibit. */`
368
369			`BI`
370			`crisv10f_h_ibit_get (SIM_CPU *current_cpu)`
371			`{`
372			`return GET_H_IBIT ();`
373			`}`
374
375			`/* Set a value for h-ibit. */`
376
377			`void`
378			`crisv10f_h_ibit_set (SIM_CPU *current_cpu, BI newval)`
379			`{`
380			`SET_H_IBIT (newval);`
381			`}`
382
383			`/* Get the value of h-ibit-pre-v32. */`
384
385			`BI`
386			`crisv10f_h_ibit_pre_v32_get (SIM_CPU *current_cpu)`
387			`{`
388			`return CPU (h_ibit_pre_v32);`
389			`}`
390
391			`/* Set a value for h-ibit-pre-v32. */`
392
393			`void`
394			`crisv10f_h_ibit_pre_v32_set (SIM_CPU *current_cpu, BI newval)`
395			`{`
396			`CPU (h_ibit_pre_v32) = newval;`
397			`}`
398
399			`/* Get the value of h-pbit. */`
400
401			`BI`
402			`crisv10f_h_pbit_get (SIM_CPU *current_cpu)`
403			`{`
404			`return CPU (h_pbit);`
405			`}`
406
407			`/* Set a value for h-pbit. */`
408
409			`void`
410			`crisv10f_h_pbit_set (SIM_CPU *current_cpu, BI newval)`
411			`{`
412			`CPU (h_pbit) = newval;`
413			`}`
414
415			`/* Get the value of h-ubit. */`
416
417			`BI`
418			`crisv10f_h_ubit_get (SIM_CPU *current_cpu)`
419			`{`
420			`return GET_H_UBIT ();`
421			`}`
422
423			`/* Set a value for h-ubit. */`
424
425			`void`
426			`crisv10f_h_ubit_set (SIM_CPU *current_cpu, BI newval)`
427			`{`
428			`SET_H_UBIT (newval);`
429			`}`
430
431			`/* Get the value of h-ubit-pre-v32. */`
432
433			`BI`
434			`crisv10f_h_ubit_pre_v32_get (SIM_CPU *current_cpu)`
435			`{`
436			`return CPU (h_ubit_pre_v32);`
437			`}`
438
439			`/* Set a value for h-ubit-pre-v32. */`
440
441			`void`
442			`crisv10f_h_ubit_pre_v32_set (SIM_CPU *current_cpu, BI newval)`
443			`{`
444			`CPU (h_ubit_pre_v32) = newval;`
445			`}`
446
447			`/* Get the value of h-insn-prefixed-p. */`
448
449			`BI`
450			`crisv10f_h_insn_prefixed_p_get (SIM_CPU *current_cpu)`
451			`{`
452			`return GET_H_INSN_PREFIXED_P ();`
453			`}`
454
455			`/* Set a value for h-insn-prefixed-p. */`
456
457			`void`
458			`crisv10f_h_insn_prefixed_p_set (SIM_CPU *current_cpu, BI newval)`
459			`{`
460			`SET_H_INSN_PREFIXED_P (newval);`
461			`}`
462
463			`/* Get the value of h-insn-prefixed-p-pre-v32. */`
464
465			`BI`
466			`crisv10f_h_insn_prefixed_p_pre_v32_get (SIM_CPU *current_cpu)`
467			`{`
468			`return CPU (h_insn_prefixed_p_pre_v32);`
469			`}`
470
471			`/* Set a value for h-insn-prefixed-p-pre-v32. */`
472
473			`void`
474			`crisv10f_h_insn_prefixed_p_pre_v32_set (SIM_CPU *current_cpu, BI newval)`
475			`{`
476			`CPU (h_insn_prefixed_p_pre_v32) = newval;`
477			`}`
478
479			`/* Get the value of h-prefixreg-pre-v32. */`
480
481			`SI`
482			`crisv10f_h_prefixreg_pre_v32_get (SIM_CPU *current_cpu)`
483			`{`
484			`return CPU (h_prefixreg_pre_v32);`
485			`}`
486
487			`/* Set a value for h-prefixreg-pre-v32. */`
488
489			`void`
490			`crisv10f_h_prefixreg_pre_v32_set (SIM_CPU *current_cpu, SI newval)`
491			`{`
492			`CPU (h_prefixreg_pre_v32) = newval;`
493			`}`
494
495			`/* Record trace results for INSN. */`
496
497			`void`
498			`crisv10f_record_trace_results (SIM_CPU current_cpu, CGEN_INSN insn,`
499			`int indices, TRACE_RECORD tr)`
500			`{`
501			`}`