OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [sim/] [lm32/] [Makefile.in] - Blame information for rev 438

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 330 jeremybenn
# Makefile for Lattice Mico32 simulator.
2
# Contributed by Jon Beniston 
3
 
4
## COMMON_PRE_CONFIG_FRAG
5
 
6
# List of object files, less common parts.
7
SIM_OBJS = \
8
        $(SIM_NEW_COMMON_OBJS) \
9
        sim-cpu.o \
10
        sim-hload.o \
11
        sim-hrw.o \
12
        sim-model.o \
13
        sim-reg.o \
14
        sim-signal.o \
15
        cgen-utils.o cgen-trace.o cgen-scache.o \
16
        cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
17
        sim-if.o arch.o \
18
        cpu.o decode.o sem.o model.o mloop.o \
19
        lm32.o traps.o user.o
20
 
21
# List of extra dependencies.
22
# Generally this consists of simulator specific files included by sim-main.h.
23
SIM_EXTRA_DEPS = $(CGEN_INCLUDE_DEPS) $(srcdir)/../../opcodes/lm32-desc.h
24
 
25
# List of flags to always pass to $(CC).
26
#SIM_EXTRA_CFLAGS =
27
 
28
# List of main object files for `run'.
29
SIM_RUN_OBJS = nrun.o
30
 
31
SIM_EXTRA_CLEAN = lm32-clean
32
 
33
# This selects the lm32 newlib/libgloss syscall definitions.
34
NL_TARGET = -DNL_TARGET_lm32
35
 
36
## COMMON_POST_CONFIG_FRAG
37
 
38
arch = lm32
39
 
40
arch.o: arch.c $(SIM_MAIN_DEPS)
41
 
42
traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
43
 
44
sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
45
 
46
LM32BF_INCLUDE_DEPS = \
47
        $(CGEN_MAIN_CPU_DEPS) \
48
        cpu.h decode.h eng.h
49
 
50
lm32.o: lm32.c $(LM32BF_INCLUDE_DEPS)
51
 
52
# FIXME: Use of `mono' is wip.
53
mloop.c eng.h: stamp-mloop
54
stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
55
        $(SHELL) $(srccom)/genmloop.sh \
56
                -mono -fast -pbb -switch sem-switch.c \
57
                -cpu lm32bf -infile $(srcdir)/mloop.in
58
        $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
59
        $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
60
        touch stamp-mloop
61
mloop.o: mloop.c sem-switch.c
62
 
63
cpu.o: cpu.c $(LM32BF_INCLUDE_DEPS)
64
decode.o: decode.c $(LM32BF_INCLUDE_DEPS)
65
sem.o: sem.c $(LM32BF_INCLUDE_DEPS)
66
model.o: model.c $(LM32BF_INCLUDE_DEPS)
67
 
68
lm32-clean:
69
        rm -f mloop.c eng.h stamp-mloop
70
        rm -f stamp-arch stamp-cpu
71
        rm -f tmp-*
72
 
73
# cgen support, enable with --enable-cgen-maint
74
CGEN_MAINT = ; @true
75
# The following line is commented in or out depending upon --enable-cgen-maint.
76
@CGEN_MAINT@CGEN_MAINT =
77
 
78
stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/lm32.cpu
79
        $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
80
          archfile=$(CPU_DIR)/lm32.cpu \
81
          FLAGS="with-scache with-profile=fn"
82
        touch stamp-arch
83
arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
84
 
85
stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/lm32.cpu
86
        $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
87
          cpu=lm32bf mach=lm32 SUFFIX= \
88
          archfile=$(CPU_DIR)/lm32.cpu \
89
          FLAGS="with-scache with-profile=fn" \
90
          EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
91
        touch stamp-cpu
92
cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.