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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [sim/] [lm32/] [sim-main.h] - Blame information for rev 421

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1 330 jeremybenn
/* Lattice Mico32 simulator support code
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   Contributed by Jon Beniston <jon@beniston.com>
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   Copyright (C) 2009, 2010 Free Software Foundation, Inc.
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   This file is part of GDB.
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   This program is free software; you can redistribute it and/or modify
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   it under the terms of the GNU General Public License as published by
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   the Free Software Foundation; either version 3 of the License, or
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   (at your option) any later version.
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   This program is distributed in the hope that it will be useful,
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   but WITHOUT ANY WARRANTY; without even the implied warranty of
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   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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   GNU General Public License for more details.
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   You should have received a copy of the GNU General Public License
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   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
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/* Main header for the LM32 simulator.  */
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#ifndef SIM_MAIN_H
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#define SIM_MAIN_H
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#define USING_SIM_BASE_H        /* FIXME: quick hack */
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struct _sim_cpu;                /* FIXME: should be in sim-basics.h */
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typedef struct _sim_cpu SIM_CPU;
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#include "symcat.h"
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#include "sim-basics.h"
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#include "cgen-types.h"
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#include "lm32-desc.h"
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#include "lm32-opc.h"
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#include "arch.h"
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/* These must be defined before sim-base.h.  */
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typedef USI sim_cia;
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#define CIA_GET(cpu)     CPU_PC_GET (cpu)
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#define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
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#define SIM_ENGINE_HALT_HOOK(sd, cpu, cia) \
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do { \
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  if (cpu) /* null if ctrl-c */ \
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    sim_pc_set ((cpu), (cia)); \
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} while (0)
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#define SIM_ENGINE_RESTART_HOOK(sd, cpu, cia) \
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do { \
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  sim_pc_set ((cpu), (cia)); \
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} while (0)
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#include "sim-base.h"
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#include "cgen-sim.h"
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#include "lm32-sim.h"
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#include "opcode/cgen.h"
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/* The _sim_cpu struct.  */
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struct _sim_cpu
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{
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  /* sim/common cpu base.  */
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  sim_cpu_base base;
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  /* Static parts of cgen.  */
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  CGEN_CPU cgen_cpu;
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  /* CPU specific parts go here.
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     Note that in files that don't need to access these pieces WANT_CPU_FOO
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     won't be defined and thus these parts won't appear.  This is ok in the
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     sense that things work.  It is a source of bugs though.
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     One has to of course be careful to not take the size of this
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     struct and no structure members accessed in non-cpu specific files can
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     go after here.  Oh for a better language.  */
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#if defined (WANT_CPU_LM32BF)
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  LM32BF_CPU_DATA cpu_data;
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#endif
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};
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/* The sim_state struct.  */
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struct sim_state
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{
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  sim_cpu *cpu;
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#define STATE_CPU(sd, n) (/*&*/ (sd)->cpu)
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  CGEN_STATE cgen_state;
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  sim_state_base base;
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};
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/* Misc.  */
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/* Catch address exceptions.  */
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extern SIM_CORE_SIGNAL_FN lm32_core_signal;
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#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
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lm32_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
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                  (TRANSFER), (ERROR))
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#endif /* SIM_MAIN_H */

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