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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [sim/] [testsuite/] [sim/] [cr16/] [tbitw.cgs] - Blame information for rev 330

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# cr16 testcase for tbitw
# mach:  cr16
 
        .include "testutils.inc"
 
        start
 
        .global tbitw
tbitw:
        movw $0, r1
        lpr     r1, psr
        tbitw   $0,_y
        spr  psr, r1
        cmpb    $0x20, r1
        beq ok1
not_ok:
        fail
 
ok1:
        movw $0, r1
        lpr     r1, psr
        movd   $_y, (r1,r0)
        tbitw   $1,0(r1,r0)
        loadw   _y, r1
        spr  psr, r1
        cmpb    $0x20, r1
        beq ok2
        br not_ok
ok2:
 
        pass
 
_y:     .word   0xf7

Line No.	Rev	Author	Line
1	330	jeremybenn	`# cr16 testcase for tbitw`
2			`# mach: cr16`
3
4			`.include "testutils.inc"`
5
6			`start`
7
8			`.global tbitw`
9			`tbitw:`
10			`movw $0, r1`
11			`lpr r1, psr`
12			`tbitw $0,_y`
13			`spr psr, r1`
14			`cmpb $0x20, r1`
15			`beq ok1`
16			`not_ok:`
17			`fail`
18
19			`ok1:`
20			`movw $0, r1`
21			`lpr r1, psr`
22			`movd $_y, (r1,r0)`
23			`tbitw $1,0(r1,r0)`
24			`loadw _y, r1`
25			`spr psr, r1`
26			`cmpb $0x20, r1`
27			`beq ok2`
28			`br not_ok`
29			`ok2:`
30
31			`pass`
32
33			`_y: .word 0xf7`

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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [sim/] [testsuite/] [sim/] [cr16/] [tbitw.cgs] - Blame information for rev 330