URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [sim/] [testsuite/] [sim/] [frv/] [addxi.cgs] - Blame information for rev 373

Go to most recent revision | Details | Compare with Previous | View Log


# frv testcase for addxi $GRi,$s10,$GRk,$ICCi_1
# mach: all
 
        .include "testutils.inc"
 
        start
 
        .global addxi
addxi:
        set_gr_immed    2,gr8
        set_icc         0x0e,0          ; Make sure carry bit is off
        addxi           gr8,1,gr8,icc0
        test_icc        1 1 1 0 icc0
        test_gr_immed   3,gr8
 
        set_gr_limmed   0x7fff,0xffff,gr8
        set_icc         0x04,0          ; Make sure carry bit is off
        addxi           gr8,1,gr8,icc0
        test_icc        0 1 0 0 icc0
        test_gr_limmed  0x8000,0x0000,gr8
 
        set_gr_limmed   0xffff,0xff00,gr8
        set_icc         0x08,0          ; Make sure carry bit is off
        addxi           gr8,0x100,gr8,icc0
        test_icc        1 0 0 0 icc0
        test_gr_immed   0,gr8
 
        set_gr_immed    2,gr8
        set_icc         0x0f,0          ; Make sure carry bit is on
        addxi           gr8,1,gr8,icc0
        test_icc        1 1 1 1 icc0
        test_gr_immed   4,gr8
 
        set_gr_limmed   0x7fff,0xffff,gr8
        set_icc         0x05,0          ; Make sure carry bit is on
        addxi           gr8,0,gr8,icc0
        test_icc        0 1 0 1 icc0
        test_gr_limmed  0x8000,0x0000,gr8
 
        set_gr_limmed   0xffff,0xfeff,gr8
        set_icc         0x0b,0          ; Make sure carry bit is on
        addxi           gr8,0x100,gr8,icc0
        test_icc        1 0 1 1 icc0
        test_gr_immed   0,gr8
 
        pass

Line No.	Rev	Author	Line
1	330	jeremybenn	`# frv testcase for addxi $GRi,$s10,$GRk,$ICCi_1`
2			`# mach: all`
3
4			`.include "testutils.inc"`
5
6			`start`
7
8			`.global addxi`
9			`addxi:`
10			`set_gr_immed 2,gr8`
11			`set_icc 0x0e,0 ; Make sure carry bit is off`
12			`addxi gr8,1,gr8,icc0`
13			`test_icc 1 1 1 0 icc0`
14			`test_gr_immed 3,gr8`
15
16			`set_gr_limmed 0x7fff,0xffff,gr8`
17			`set_icc 0x04,0 ; Make sure carry bit is off`
18			`addxi gr8,1,gr8,icc0`
19			`test_icc 0 1 0 0 icc0`
20			`test_gr_limmed 0x8000,0x0000,gr8`
21
22			`set_gr_limmed 0xffff,0xff00,gr8`
23			`set_icc 0x08,0 ; Make sure carry bit is off`
24			`addxi gr8,0x100,gr8,icc0`
25			`test_icc 1 0 0 0 icc0`
26			`test_gr_immed 0,gr8`
27
28			`set_gr_immed 2,gr8`
29			`set_icc 0x0f,0 ; Make sure carry bit is on`
30			`addxi gr8,1,gr8,icc0`
31			`test_icc 1 1 1 1 icc0`
32			`test_gr_immed 4,gr8`
33
34			`set_gr_limmed 0x7fff,0xffff,gr8`
35			`set_icc 0x05,0 ; Make sure carry bit is on`
36			`addxi gr8,0,gr8,icc0`
37			`test_icc 0 1 0 1 icc0`
38			`test_gr_limmed 0x8000,0x0000,gr8`
39
40			`set_gr_limmed 0xffff,0xfeff,gr8`
41			`set_icc 0x0b,0 ; Make sure carry bit is on`
42			`addxi gr8,0x100,gr8,icc0`
43			`test_icc 1 0 1 1 icc0`
44			`test_gr_immed 0,gr8`
45
46			`pass`

Browse

Tools

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [sim/] [testsuite/] [sim/] [frv/] [addxi.cgs] - Blame information for rev 373