URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [sim/] [testsuite/] [sim/] [frv/] [mcmpsh.cgs] - Blame information for rev 373

Go to most recent revision | Details | Compare with Previous | View Log


# frv testcase for mcmpsh $FRi,$FRj,$FCCk
# mach: all
 
        .include "testutils.inc"
 
        start
 
        .global mcmpsh
mcmpsh:
        set_fr_iimmed   0x7fff,0x7fff,fr10
        set_fr_iimmed   0x7fff,0x7fff,fr11
        set_fcc         0x7,0           ; Set mask opposite of expected
        set_fcc         0x7,1           ; Set mask opposite of expected
        mcmpsh          fr10,fr11,fcc0
        test_fcc        0x8,0
        test_fcc        0x8,1
 
        set_fr_iimmed   0x7fff,0x7fff,fr10
        set_fr_iimmed   0x7fff,0x8000,fr11
        set_fcc         0x7,0           ; Set mask opposite of expected
        set_fcc         0xd,1           ; Set mask opposite of expected
        mcmpsh          fr10,fr11,fcc0
        test_fcc        0x8,0
        test_fcc        0x2,1
 
        set_fr_iimmed   0x7fff,0x7fff,fr10
        set_fr_iimmed   0x8000,0x7fff,fr11
        set_fcc         0xd,0           ; Set mask opposite of expected
        set_fcc         0x7,1           ; Set mask opposite of expected
        mcmpsh          fr10,fr11,fcc0
        test_fcc        0x2,0
        test_fcc        0x8,1
 
        set_fr_iimmed   0x7fff,0x7fff,fr10
        set_fr_iimmed   0x8000,0x8000,fr11
        set_fcc         0xd,0           ; Set mask opposite of expected
        set_fcc         0xd,1           ; Set mask opposite of expected
        mcmpsh          fr10,fr11,fcc0
        test_fcc        0x2,0
        test_fcc        0x2,1
 
        set_fr_iimmed   0x7fff,0x8000,fr10
        set_fr_iimmed   0x7fff,0x7fff,fr11
        set_fcc         0x7,0           ; Set mask opposite of expected
        set_fcc         0xb,1           ; Set mask opposite of expected
        mcmpsh          fr10,fr11,fcc0
        test_fcc        0x8,0
        test_fcc        0x4,1
 
        set_fr_iimmed   0x7fff,0x8000,fr10
        set_fr_iimmed   0x7fff,0x8000,fr11
        set_fcc         0x7,0           ; Set mask opposite of expected
        set_fcc         0x7,1           ; Set mask opposite of expected
        mcmpsh          fr10,fr11,fcc0
        test_fcc        0x8,0
        test_fcc        0x8,1
 
        set_fr_iimmed   0x7fff,0x8000,fr10
        set_fr_iimmed   0x8000,0x7fff,fr11
        set_fcc         0xd,0           ; Set mask opposite of expected
        set_fcc         0xb,1           ; Set mask opposite of expected
        mcmpsh          fr10,fr11,fcc0
        test_fcc        0x2,0
        test_fcc        0x4,1
 
        set_fr_iimmed   0x7fff,0x8000,fr10
        set_fr_iimmed   0x8000,0x8000,fr11
        set_fcc         0xd,0           ; Set mask opposite of expected
        set_fcc         0x7,1           ; Set mask opposite of expected
        mcmpsh          fr10,fr11,fcc0
        test_fcc        0x2,0
        test_fcc        0x8,1
 
        set_fr_iimmed   0x8000,0x7fff,fr10
        set_fr_iimmed   0x7fff,0x7fff,fr11
        set_fcc         0xb,0           ; Set mask opposite of expected
        set_fcc         0x7,1           ; Set mask opposite of expected
        mcmpsh          fr10,fr11,fcc0
        test_fcc        0x4,0
        test_fcc        0x8,1
 
        set_fr_iimmed   0x8000,0x7fff,fr10
        set_fr_iimmed   0x7fff,0x8000,fr11
        set_fcc         0xb,0           ; Set mask opposite of expected
        set_fcc         0xd,1           ; Set mask opposite of expected
        mcmpsh          fr10,fr11,fcc0
        test_fcc        0x4,0
        test_fcc        0x2,1
 
        set_fr_iimmed   0x8000,0x7fff,fr10
        set_fr_iimmed   0x8000,0x7fff,fr11
        set_fcc         0x7,0           ; Set mask opposite of expected
        set_fcc         0x7,1           ; Set mask opposite of expected
        mcmpsh          fr10,fr11,fcc0
        test_fcc        0x8,0
        test_fcc        0x8,1
 
        set_fr_iimmed   0x8000,0x7fff,fr10
        set_fr_iimmed   0x8000,0x8000,fr11
        set_fcc         0x7,0           ; Set mask opposite of expected
        set_fcc         0xd,1           ; Set mask opposite of expected
        mcmpsh          fr10,fr11,fcc0
        test_fcc        0x8,0
        test_fcc        0x2,1
 
        set_fr_iimmed   0x8000,0x8000,fr10
        set_fr_iimmed   0x7fff,0x7fff,fr11
        set_fcc         0xb,0           ; Set mask opposite of expected
        set_fcc         0xb,1           ; Set mask opposite of expected
        mcmpsh          fr10,fr11,fcc0
        test_fcc        0x4,0
        test_fcc        0x4,1
 
        set_fr_iimmed   0x8000,0x8000,fr10
        set_fr_iimmed   0x7fff,0x8000,fr11
        set_fcc         0xb,0           ; Set mask opposite of expected
        set_fcc         0x7,1           ; Set mask opposite of expected
        mcmpsh          fr10,fr11,fcc0
        test_fcc        0x4,0
        test_fcc        0x8,1
 
        set_fr_iimmed   0x8000,0x8000,fr10
        set_fr_iimmed   0x8000,0x7fff,fr11
        set_fcc         0x7,0           ; Set mask opposite of expected
        set_fcc         0xb,1           ; Set mask opposite of expected
        mcmpsh          fr10,fr11,fcc0
        test_fcc        0x8,0
        test_fcc        0x4,1
 
        set_fr_iimmed   0x8000,0x8000,fr10
        set_fr_iimmed   0x8000,0x8000,fr11
        set_fcc         0x7,0           ; Set mask opposite of expected
        set_fcc         0x7,1           ; Set mask opposite of expected
        mcmpsh          fr10,fr11,fcc0
        test_fcc        0x8,0
        test_fcc        0x8,1
 
        pass

Line No.	Rev	Author	Line
1	330	jeremybenn	`# frv testcase for mcmpsh $FRi,$FRj,$FCCk`
2			`# mach: all`
3
4			`.include "testutils.inc"`
5
6			`start`
7
8			`.global mcmpsh`
9			`mcmpsh:`
10			`set_fr_iimmed 0x7fff,0x7fff,fr10`
11			`set_fr_iimmed 0x7fff,0x7fff,fr11`
12			`set_fcc 0x7,0 ; Set mask opposite of expected`
13			`set_fcc 0x7,1 ; Set mask opposite of expected`
14			`mcmpsh fr10,fr11,fcc0`
15			`test_fcc 0x8,0`
16			`test_fcc 0x8,1`
17
18			`set_fr_iimmed 0x7fff,0x7fff,fr10`
19			`set_fr_iimmed 0x7fff,0x8000,fr11`
20			`set_fcc 0x7,0 ; Set mask opposite of expected`
21			`set_fcc 0xd,1 ; Set mask opposite of expected`
22			`mcmpsh fr10,fr11,fcc0`
23			`test_fcc 0x8,0`
24			`test_fcc 0x2,1`
25
26			`set_fr_iimmed 0x7fff,0x7fff,fr10`
27			`set_fr_iimmed 0x8000,0x7fff,fr11`
28			`set_fcc 0xd,0 ; Set mask opposite of expected`
29			`set_fcc 0x7,1 ; Set mask opposite of expected`
30			`mcmpsh fr10,fr11,fcc0`
31			`test_fcc 0x2,0`
32			`test_fcc 0x8,1`
33
34			`set_fr_iimmed 0x7fff,0x7fff,fr10`
35			`set_fr_iimmed 0x8000,0x8000,fr11`
36			`set_fcc 0xd,0 ; Set mask opposite of expected`
37			`set_fcc 0xd,1 ; Set mask opposite of expected`
38			`mcmpsh fr10,fr11,fcc0`
39			`test_fcc 0x2,0`
40			`test_fcc 0x2,1`
41
42			`set_fr_iimmed 0x7fff,0x8000,fr10`
43			`set_fr_iimmed 0x7fff,0x7fff,fr11`
44			`set_fcc 0x7,0 ; Set mask opposite of expected`
45			`set_fcc 0xb,1 ; Set mask opposite of expected`
46			`mcmpsh fr10,fr11,fcc0`
47			`test_fcc 0x8,0`
48			`test_fcc 0x4,1`
49
50			`set_fr_iimmed 0x7fff,0x8000,fr10`
51			`set_fr_iimmed 0x7fff,0x8000,fr11`
52			`set_fcc 0x7,0 ; Set mask opposite of expected`
53			`set_fcc 0x7,1 ; Set mask opposite of expected`
54			`mcmpsh fr10,fr11,fcc0`
55			`test_fcc 0x8,0`
56			`test_fcc 0x8,1`
57
58			`set_fr_iimmed 0x7fff,0x8000,fr10`
59			`set_fr_iimmed 0x8000,0x7fff,fr11`
60			`set_fcc 0xd,0 ; Set mask opposite of expected`
61			`set_fcc 0xb,1 ; Set mask opposite of expected`
62			`mcmpsh fr10,fr11,fcc0`
63			`test_fcc 0x2,0`
64			`test_fcc 0x4,1`
65
66			`set_fr_iimmed 0x7fff,0x8000,fr10`
67			`set_fr_iimmed 0x8000,0x8000,fr11`
68			`set_fcc 0xd,0 ; Set mask opposite of expected`
69			`set_fcc 0x7,1 ; Set mask opposite of expected`
70			`mcmpsh fr10,fr11,fcc0`
71			`test_fcc 0x2,0`
72			`test_fcc 0x8,1`
73
74			`set_fr_iimmed 0x8000,0x7fff,fr10`
75			`set_fr_iimmed 0x7fff,0x7fff,fr11`
76			`set_fcc 0xb,0 ; Set mask opposite of expected`
77			`set_fcc 0x7,1 ; Set mask opposite of expected`
78			`mcmpsh fr10,fr11,fcc0`
79			`test_fcc 0x4,0`
80			`test_fcc 0x8,1`
81
82			`set_fr_iimmed 0x8000,0x7fff,fr10`
83			`set_fr_iimmed 0x7fff,0x8000,fr11`
84			`set_fcc 0xb,0 ; Set mask opposite of expected`
85			`set_fcc 0xd,1 ; Set mask opposite of expected`
86			`mcmpsh fr10,fr11,fcc0`
87			`test_fcc 0x4,0`
88			`test_fcc 0x2,1`
89
90			`set_fr_iimmed 0x8000,0x7fff,fr10`
91			`set_fr_iimmed 0x8000,0x7fff,fr11`
92			`set_fcc 0x7,0 ; Set mask opposite of expected`
93			`set_fcc 0x7,1 ; Set mask opposite of expected`
94			`mcmpsh fr10,fr11,fcc0`
95			`test_fcc 0x8,0`
96			`test_fcc 0x8,1`
97
98			`set_fr_iimmed 0x8000,0x7fff,fr10`
99			`set_fr_iimmed 0x8000,0x8000,fr11`
100			`set_fcc 0x7,0 ; Set mask opposite of expected`
101			`set_fcc 0xd,1 ; Set mask opposite of expected`
102			`mcmpsh fr10,fr11,fcc0`
103			`test_fcc 0x8,0`
104			`test_fcc 0x2,1`
105
106			`set_fr_iimmed 0x8000,0x8000,fr10`
107			`set_fr_iimmed 0x7fff,0x7fff,fr11`
108			`set_fcc 0xb,0 ; Set mask opposite of expected`
109			`set_fcc 0xb,1 ; Set mask opposite of expected`
110			`mcmpsh fr10,fr11,fcc0`
111			`test_fcc 0x4,0`
112			`test_fcc 0x4,1`
113
114			`set_fr_iimmed 0x8000,0x8000,fr10`
115			`set_fr_iimmed 0x7fff,0x8000,fr11`
116			`set_fcc 0xb,0 ; Set mask opposite of expected`
117			`set_fcc 0x7,1 ; Set mask opposite of expected`
118			`mcmpsh fr10,fr11,fcc0`
119			`test_fcc 0x4,0`
120			`test_fcc 0x8,1`
121
122			`set_fr_iimmed 0x8000,0x8000,fr10`
123			`set_fr_iimmed 0x8000,0x7fff,fr11`
124			`set_fcc 0x7,0 ; Set mask opposite of expected`
125			`set_fcc 0xb,1 ; Set mask opposite of expected`
126			`mcmpsh fr10,fr11,fcc0`
127			`test_fcc 0x8,0`
128			`test_fcc 0x4,1`
129
130			`set_fr_iimmed 0x8000,0x8000,fr10`
131			`set_fr_iimmed 0x8000,0x8000,fr11`
132			`set_fcc 0x7,0 ; Set mask opposite of expected`
133			`set_fcc 0x7,1 ; Set mask opposite of expected`
134			`mcmpsh fr10,fr11,fcc0`
135			`test_fcc 0x8,0`
136			`test_fcc 0x8,1`
137
138			`pass`

Browse

Tools

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [sim/] [testsuite/] [sim/] [frv/] [mcmpsh.cgs] - Blame information for rev 373