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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [sim/] [testsuite/] [sim/] [frv/] [mqmulxhu.cgs] - Blame information for rev 373

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Line No. Rev Author Line
1 330 jeremybenn
# frv testcase for mqmulxhu $GRi,$GRj,$GRk
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# mach: all
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        .include "testutils.inc"
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        start
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        .global mqmulxhu
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mqmulxhu:
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        set_fr_iimmed   3,2,fr8         ; multiply small numbers
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        set_fr_iimmed   3,2,fr10
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        set_fr_iimmed   1,2,fr9         ; multiply by 1
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        set_fr_iimmed   1,2,fr11
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        mqmulxhu        fr8,fr10,acc0
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        test_accg_immed         0,accg0
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        test_acc_immed  6,acc0
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        test_accg_immed         0,accg1
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        test_acc_immed  6,acc1
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        test_accg_immed         0,accg2
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        test_acc_immed  2,acc2
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        test_accg_immed         0,accg3
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        test_acc_immed  2,acc3
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        set_fr_iimmed   0,2,fr8         ; multiply by 0
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        set_fr_iimmed   0,2,fr10
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        set_fr_iimmed   0x3fff,2,fr9    ; 15 bit result
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        set_fr_iimmed   0x3fff,2,fr11
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        mqmulxhu        fr8,fr10,acc0
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        test_accg_immed         0,accg0
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        test_acc_immed  0,acc0
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        test_accg_immed         0,accg1
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        test_acc_immed  0,acc1
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        test_accg_immed         0,accg2
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        test_acc_limmed 0x0000,0x7ffe,acc2
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        test_accg_immed         0,accg3
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        test_acc_limmed 0x0000,0x7ffe,acc3
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        set_fr_iimmed   0x4000,2,fr8    ; 16 bit result
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        set_fr_iimmed   0x4000,2,fr10
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        set_fr_iimmed   0x8000,2,fr9    ; 17 bit result
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        set_fr_iimmed   0x8000,2,fr11
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        mqmulxhu        fr8,fr10,acc0
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        test_accg_immed         0,accg0
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        test_acc_limmed 0x0000,0x8000,acc0
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        test_accg_immed         0,accg1
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        test_acc_limmed 0x0000,0x8000,acc1
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        test_accg_immed         0,accg2
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        test_acc_immed  0x00010000,acc2
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        test_accg_immed         0,accg3
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        test_acc_immed  0x00010000,acc3
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        set_fr_iimmed   0x7fff,0x7fff,fr8       ; max positive result
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        set_fr_iimmed   0x7fff,0x7fff,fr10
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        set_fr_iimmed   0x8000,0x8000,fr9       ; max positive result
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        set_fr_iimmed   0x8000,0x8000,fr11
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        mqmulxhu        fr8,fr10,acc0
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        test_accg_immed         0,accg0
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        test_acc_immed  0x3fff0001,acc0
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        test_accg_immed         0,accg1
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        test_acc_immed  0x3fff0001,acc1
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        test_accg_immed         0,accg2
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        test_acc_limmed 0x4000,0x0000,acc2
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        test_accg_immed         0,accg3
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        test_acc_limmed 0x4000,0x0000,acc3
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        set_fr_iimmed   0xffff,0xffff,fr8       ; max positive result
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        set_fr_iimmed   0xffff,0xffff,fr10
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        set_fr_iimmed   0xffff,0xffff,fr9       ; max positive result
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        set_fr_iimmed   0xffff,0xffff,fr11
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        mqmulxhu        fr8,fr10,acc0
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        test_accg_immed         0,accg0
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        test_acc_limmed 0xfffe,0x0001,acc0
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        test_accg_immed         0,accg1
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        test_acc_limmed 0xfffe,0x0001,acc1
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        test_accg_immed         0,accg2
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        test_acc_limmed 0xfffe,0x0001,acc2
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        test_accg_immed         0,accg3
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        test_acc_limmed 0xfffe,0x0001,acc3
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        pass

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