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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [sim/] [testsuite/] [sim/] [frv/] [stc.cgs] - Blame information for rev 330

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# frv testcase for stc $CPRk,@($GRi,$GRj)
# mach: frv
# as(frv): -mcpu=frv
 
        .include "testutils.inc"
 
        start
 
        .global stc
stc:
        set_mem_limmed  0xdead,0xbeef,sp
        set_gr_immed    0,gr7
        set_cpr_limmed  0xffff,0xffff,cpr8
        stc             cpr8,@(sp,gr7)
        test_mem_limmed 0xffff,0xffff,sp
 
        pass

Line No.	Rev	Author	Line
1	330	jeremybenn	`# frv testcase for stc $CPRk,@($GRi,$GRj)`
2			`# mach: frv`
3			`# as(frv): -mcpu=frv`
4
5			`.include "testutils.inc"`
6
7			`start`
8
9			`.global stc`
10			`stc:`
11			`set_mem_limmed 0xdead,0xbeef,sp`
12			`set_gr_immed 0,gr7`
13			`set_cpr_limmed 0xffff,0xffff,cpr8`
14			`stc cpr8,@(sp,gr7)`
15			`test_mem_limmed 0xffff,0xffff,sp`
16
17			`pass`

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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [sim/] [testsuite/] [sim/] [frv/] [stc.cgs] - Blame information for rev 330