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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [sim/] [testsuite/] [sim/] [m32r/] [uwrite16.ms] - Blame information for rev 330

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1 330 jeremybenn
# mach: m32r m32rx
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# xerror:
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# output: *misaligned write*
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        .include "testutils.inc"
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        start
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; construct bra trap2_handler in trap 2 slot
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        ld24 r0,#foo+1
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        sth r0,@r0
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        fail
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        exit 0
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.data
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        .p2align 2
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foo:
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        .short 42

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