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[/] [openrisc/] [trunk/] [gnu-src/] [newlib-1.17.0/] [libgloss/] [bfin/] [include/] [cdefBF535.h] - Blame information for rev 455

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Line No. Rev Author Line
1 148 jeremybenn
/*
2
 * The authors hereby grant permission to use, copy, modify, distribute,
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 * and license this software and its documentation for any purpose, provided
4
 * that existing copyright notices are retained in all copies and that this
5
 * notice is included verbatim in any distributions. No written agreement,
6
 * license, or royalty fee is required for any of the authorized uses.
7
 * Modifications to this software may be copyrighted by their authors
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 * and need not follow the licensing terms described here, provided that
9
 * the new terms are clearly indicated on the first page of each file where
10
 * they apply.
11
 */
12
 
13
/************************************************************************
14
 *
15
 * cdefBF535.h
16
 *
17
 * Copyright (C) 2008 Analog Devices, Inc.
18
 *
19
 ************************************************************************/
20
 
21
#ifndef _CDEF_BF535_H
22
#define _CDEF_BF535_H
23
 
24
/* include all Core registers and bit definitions */
25
#if defined(__ADSPLPBLACKFIN__)
26
#warning cdefBF535.h should only be included for 535 compatible chips.
27
#endif
28
#include <defBF535.h>
29
 
30
/* include core specific register pointer definitions */
31
#include <cdefblackfin.h>
32
 
33
#ifndef _PTR_TO_VOL_VOID_PTR
34
#ifndef _USE_LEGACY_CDEF_BEHAVIOUR
35
#define _PTR_TO_VOL_VOID_PTR (void * volatile *)
36
#else
37
#define _PTR_TO_VOL_VOID_PTR (volatile void **)
38
#endif
39
#endif
40
 
41
/* Clock and System Control (0xFFC0 0400-0xFFC0 07FF) */
42
#define pPLL_CTL ((volatile unsigned long *)PLL_CTL)
43
#define pPLL_STAT ((volatile unsigned short *)PLL_STAT)
44
#define pPLL_LOCKCNT ((volatile unsigned short *)PLL_LOCKCNT)
45
#define pSWRST ((volatile unsigned short *)SWRST)
46
#define pSYSCR ((volatile unsigned short *)SYSCR)
47
#define pPLL_IOCKR ((volatile unsigned short *)PLL_IOCKR)
48
#define pPLL_IOCK ((volatile unsigned short *)PLL_IOCK)
49
 
50
/* JTAG/Debug Communication Channel (0xFFC0 0800-0xFFC0 0BFF) */
51
#define pCHIPID ((volatile unsigned long *)CHIPID)
52
 
53
/* System Interrupt Controller (0xFFC0 0C00-0xFFC0 0FFF) */
54
#define pSIC_IAR0 ((volatile unsigned long *)SIC_IAR0)
55
#define pSIC_IAR1 ((volatile unsigned long *)SIC_IAR1)
56
#define pSIC_IAR2 ((volatile unsigned long *)SIC_IAR2)
57
#define pSIC_IMASK ((volatile unsigned long *)SIC_IMASK)
58
#define pSIC_ISR ((volatile unsigned long *)SIC_ISR)
59
#define pSIC_IWR ((volatile unsigned long *)SIC_IWR)
60
 
61
/* Watchdog Timer (0xFFC0 1000-0xFFC0 13FF) */
62
#define pWDOG_CTL ((volatile unsigned short *)WDOG_CTL)
63
#define pWDOG_CNT ((volatile unsigned long *)WDOG_CNT)
64
#define pWDOG_STAT ((volatile unsigned long *)WDOG_STAT)
65
 
66
/* Real Time Clock (0xFFC0 1400-0xFFC0 17FF) */
67
#define pRTC_STAT ((volatile unsigned long *)RTC_STAT)
68
#define pRTC_ICTL ((volatile unsigned short *)RTC_ICTL)
69
#define pRTC_ISTAT ((volatile unsigned short *)RTC_ISTAT)
70
#define pRTC_SWCNT ((volatile unsigned short *)RTC_SWCNT)
71
#define pRTC_ALARM ((volatile unsigned long *)RTC_ALARM)
72
#define pRTC_FAST ((volatile unsigned short *)RTC_FAST)
73
 
74
/* General Purpose IO (0xFFC0 2400-0xFFC0 27FF) */
75
#define pFIO_DIR ((volatile unsigned short *)FIO_DIR)
76
#define pFIO_FLAG_C ((volatile unsigned short *)FIO_FLAG_C)
77
#define pFIO_FLAG_S ((volatile unsigned short *)FIO_FLAG_S)
78
#define pFIO_MASKA_C ((volatile unsigned short *)FIO_MASKA_C)
79
#define pFIO_MASKA_S ((volatile unsigned short *)FIO_MASKA_S)
80
#define pFIO_MASKB_C ((volatile unsigned short *)FIO_MASKB_C)
81
#define pFIO_MASKB_S ((volatile unsigned short *)FIO_MASKB_S)
82
#define pFIO_POLAR ((volatile unsigned short *)FIO_POLAR)
83
#define pFIO_EDGE ((volatile unsigned short *)FIO_EDGE)
84
#define pFIO_BOTH ((volatile unsigned short *)FIO_BOTH)
85
 
86
/* Aysnchronous Memory Controller - External Bus Interface Unit (0xFFC0 3C00-0xFFC0 3FFF) */
87
#define pEBIU_AMGCTL ((volatile unsigned short *)EBIU_AMGCTL)
88
#define pEBIU_AMBCTL0 ((volatile unsigned long *)EBIU_AMBCTL0)
89
#define pEBIU_AMBCTL1 ((volatile unsigned long *)EBIU_AMBCTL1)
90
 
91
/* USB Registers (0xFFC0 4400 - 0xFFC0 47FF) */
92
#define pUSBD_ID ((volatile unsigned short *)USBD_ID)
93
#define pUSBD_FRM ((volatile unsigned short *)USBD_FRM)
94
#define pUSBD_FRMAT ((volatile unsigned short *)USBD_FRMAT)
95
#define pUSBD_EPBUF ((volatile unsigned short *)USBD_EPBUF)
96
#define pUSBD_STAT ((volatile unsigned short *)USBD_STAT)
97
#define pUSBD_CTRL ((volatile unsigned short *)USBD_CTRL)
98
#define pUSBD_GINTR ((volatile unsigned short *)USBD_GINTR)
99
#define pUSBD_GMASK ((volatile unsigned short *)USBD_GMASK)
100
#define pUSBD_DMACFG ((volatile unsigned short *)USBD_DMACFG)
101
#define pUSBD_DMABL ((volatile unsigned short *)USBD_DMABL)
102
#define pUSBD_DMABH ((volatile unsigned short *)USBD_DMABH)
103
#define pUSBD_DMACT ((volatile unsigned short *)USBD_DMACT)
104
#define pUSBD_DMAIRQ ((volatile unsigned short *)USBD_DMAIRQ)
105
#define pUSBD_INTR0 ((volatile unsigned short *)USBD_INTR0)
106
#define pUSBD_MASK0 ((volatile unsigned short *)USBD_MASK0)
107
#define pUSBD_EPCFG0 ((volatile unsigned short *)USBD_EPCFG0)
108
#define pUSBD_EPADR0 ((volatile unsigned short *)USBD_EPADR0)
109
#define pUSBD_EPLEN0 ((volatile unsigned short *)USBD_EPLEN0)
110
#define pUSBD_INTR1 ((volatile unsigned short *)USBD_INTR1)
111
#define pUSBD_MASK1 ((volatile unsigned short *)USBD_MASK1)
112
#define pUSBD_EPCFG1 ((volatile unsigned short *)USBD_EPCFG1)
113
#define pUSBD_EPADR1 ((volatile unsigned short *)USBD_EPADR1)
114
#define pUSBD_EPLEN1 ((volatile unsigned short *)USBD_EPLEN1)
115
#define pUSBD_INTR2 ((volatile unsigned short *)USBD_INTR2)
116
#define pUSBD_MASK2 ((volatile unsigned short *)USBD_MASK2)
117
#define pUSBD_EPCFG2 ((volatile unsigned short *)USBD_EPCFG2)
118
#define pUSBD_EPADR2 ((volatile unsigned short *)USBD_EPADR2)
119
#define pUSBD_EPLEN2 ((volatile unsigned short *)USBD_EPLEN2)
120
#define pUSBD_INTR3 ((volatile unsigned short *)USBD_INTR3)
121
#define pUSBD_MASK3 ((volatile unsigned short *)USBD_MASK3)
122
#define pUSBD_EPCFG3 ((volatile unsigned short *)USBD_EPCFG3)
123
#define pUSBD_EPADR3 ((volatile unsigned short *)USBD_EPADR3)
124
#define pUSBD_EPLEN3 ((volatile unsigned short *)USBD_EPLEN3)
125
#define pUSBD_INTR4 ((volatile unsigned short *)USBD_INTR4)
126
#define pUSBD_MASK4 ((volatile unsigned short *)USBD_MASK4)
127
#define pUSBD_EPCFG4 ((volatile unsigned short *)USBD_EPCFG4)
128
#define pUSBD_EPADR4 ((volatile unsigned short *)USBD_EPADR4)
129
#define pUSBD_EPLEN4 ((volatile unsigned short *)USBD_EPLEN4)
130
#define pUSBD_INTR5 ((volatile unsigned short *)USBD_INTR5)
131
#define pUSBD_MASK5 ((volatile unsigned short *)USBD_MASK5)
132
#define pUSBD_EPCFG5 ((volatile unsigned short *)USBD_EPCFG5)
133
#define pUSBD_EPADR5 ((volatile unsigned short *)USBD_EPADR5)
134
#define pUSBD_EPLEN5 ((volatile unsigned short *)USBD_EPLEN5)
135
#define pUSBD_INTR6 ((volatile unsigned short *)USBD_INTR6)
136
#define pUSBD_MASK6 ((volatile unsigned short *)USBD_MASK6)
137
#define pUSBD_EPCFG6 ((volatile unsigned short *)USBD_EPCFG6)
138
#define pUSBD_EPADR6 ((volatile unsigned short *)USBD_EPADR6)
139
#define pUSBD_EPLEN6 ((volatile unsigned short *)USBD_EPLEN6)
140
#define pUSBD_INTR7 ((volatile unsigned short *)USBD_INTR7)
141
#define pUSBD_MASK7 ((volatile unsigned short *)USBD_MASK7)
142
#define pUSBD_EPCFG7 ((volatile unsigned short *)USBD_EPCFG7)
143
#define pUSBD_EPADR7 ((volatile unsigned short *)USBD_EPADR7)
144
#define pUSBD_EPLEN7 ((volatile unsigned short *)USBD_EPLEN7)
145
 
146
/* SDRAM Controller External Bus Interface Unit (0xFFC0 4C00-0xFFC0 4FFF) */
147
#define pEBIU_SDGCTL ((volatile unsigned long *)EBIU_SDGCTL)
148
#define pEBIU_SDRRC ((volatile unsigned short *)EBIU_SDRRC)
149
#define pEBIU_SDSTAT ((volatile unsigned short *)EBIU_SDSTAT)
150
#define pEBIU_SDBCTL ((volatile unsigned long *)EBIU_SDBCTL)
151
 
152
/* Memory Map */
153
 
154
/* Core MMRs */
155
#define pCOREMMR_BASE ((volatile void *)COREMMR_BASE)
156
 
157
/* System MMRs */
158
#define pSYSMMR_BASE ((volatile void *)SYSMMR_BASE)
159
 
160
/* L1 cache/SRAM internal memory */
161
#define pL1_DATA_A ((void *)L1_DATA_A)
162
#define pL1_DATA_B ((void *)L1_DATA_B)
163
#define pL1_CODE ((void *)L1_CODE)
164
#define pL1_SCRATCH ((void *)L1_SCRATCH)
165
 
166
/* L2 SRAM external memory */
167
#define pL2_BASE ((void *)L2_BASE)
168
 
169
/* PCI Spaces */
170
#define pPCI_CONFIG_SPACE_PORT ((volatile void *)PCI_CONFIG_SPACE_PORT)
171
#define pPCI_CONFIG_BASE ((volatile void *)PCI_CONFIG_BASE)
172
#define pPCI_IO_BASE ((volatile void *)PCI_IO_BASE)
173
#define pPCI_MEM_BASE ((volatile void *)PCI_MEM_BASE)
174
 
175
/* Async Memory Banks */
176
#define pASYNC_BANK3_BASE ((void *)ASYNC_BANK3_BASE)
177
#define pASYNC_BANK2_BASE ((void *)ASYNC_BANK2_BASE)
178
#define pASYNC_BANK1_BASE ((void *)ASYNC_BANK1_BASE)
179
#define pASYNC_BANK0_BASE ((void *)ASYNC_BANK0_BASE)
180
 
181
/* Sync DRAM Banks */
182
#define pSDRAM_BANK3_BASE ((void *)SDRAM_BANK3_BASE)
183
#define pSDRAM_BANK2_BASE ((void *)SDRAM_BANK2_BASE)
184
#define pSDRAM_BANK1_BASE ((void *)SDRAM_BANK1_BASE)
185
#define pSDRAM_BANK0_BASE ((void *)SDRAM_BANK0_BASE)
186
 
187
/* UART 0 Controller (0xFFC0 1800-0xFFC0 1BFF) */
188
#define pUART0_THR ((volatile unsigned short *)UART0_THR)
189
#define pUART0_RBR ((volatile unsigned short *)UART0_RBR)
190
#define pUART0_DLL ((volatile unsigned short *)UART0_DLL)
191
#define pUART0_IER ((volatile unsigned short *)UART0_IER)
192
#define pUART0_DLH ((volatile unsigned short *)UART0_DLH)
193
#define pUART0_IIR ((volatile unsigned short *)UART0_IIR)
194
#define pUART0_LCR ((volatile unsigned short *)UART0_LCR)
195
#define pUART0_MCR ((volatile unsigned short *)UART0_MCR)
196
#define pUART0_LSR ((volatile unsigned short *)UART0_LSR)
197
#define pUART0_MSR ((volatile unsigned short *)UART0_MSR)
198
#define pUART0_SCR ((volatile unsigned short *)UART0_SCR)
199
#define pUART0_IRCR ((volatile unsigned short *)UART0_IRCR)
200
#define pUART0_CURR_PTR_RX ((volatile unsigned short *)UART0_CURR_PTR_RX)
201
#define pUART0_CONFIG_RX ((volatile unsigned short *)UART0_CONFIG_RX)
202
#define pUART0_START_ADDR_HI_RX ((volatile unsigned short *)UART0_START_ADDR_HI_RX)
203
#define pUART0_START_ADDR_LO_RX ((volatile unsigned short *)UART0_START_ADDR_LO_RX)
204
#define pUART0_COUNT_RX ((volatile unsigned short *)UART0_COUNT_RX)
205
#define pUART0_NEXT_DESCR_RX ((volatile unsigned short *)UART0_NEXT_DESCR_RX)
206
#define pUART0_DESCR_RDY_RX ((volatile unsigned short *)UART0_DESCR_RDY_RX)
207
#define pUART0_IRQSTAT_RX ((volatile unsigned short *)UART0_IRQSTAT_RX)
208
#define pUART0_CURR_PTR_TX ((volatile unsigned short *)UART0_CURR_PTR_TX)
209
#define pUART0_CONFIG_TX ((volatile unsigned short *)UART0_CONFIG_TX)
210
#define pUART0_START_ADDR_HI_TX ((volatile unsigned short *)UART0_START_ADDR_HI_TX)
211
#define pUART0_START_ADDR_LO_TX ((volatile unsigned short *)UART0_START_ADDR_LO_TX)
212
#define pUART0_COUNT_TX ((volatile unsigned short *)UART0_COUNT_TX)
213
#define pUART0_NEXT_DESCR_TX ((volatile unsigned short *)UART0_NEXT_DESCR_TX)
214
#define pUART0_DESCR_RDY_TX ((volatile unsigned short *)UART0_DESCR_RDY_TX)
215
#define pUART0_IRQSTAT_TX ((volatile unsigned short *)UART0_IRQSTAT_TX)
216
 
217
/* UART 1 Controller (0xFFC0 1C00-0xFFC0 1FFF) */
218
#define pUART1_THR ((volatile unsigned short *)UART1_THR)
219
#define pUART1_RBR ((volatile unsigned short *)UART1_RBR)
220
#define pUART1_DLL ((volatile unsigned short *)UART1_DLL)
221
#define pUART1_IER ((volatile unsigned short *)UART1_IER)
222
#define pUART1_DLH ((volatile unsigned short *)UART1_DLH)
223
#define pUART1_IIR ((volatile unsigned short *)UART1_IIR)
224
#define pUART1_LCR ((volatile unsigned short *)UART1_LCR)
225
#define pUART1_MCR ((volatile unsigned short *)UART1_MCR)
226
#define pUART1_LSR ((volatile unsigned short *)UART1_LSR)
227
#define pUART1_MSR ((volatile unsigned short *)UART1_MSR)
228
#define pUART1_SCR ((volatile unsigned short *)UART1_SCR)
229
#define pUART1_CURR_PTR_RX ((volatile unsigned short *)UART1_CURR_PTR_RX)
230
#define pUART1_CONFIG_RX ((volatile unsigned short *)UART1_CONFIG_RX)
231
#define pUART1_START_ADDR_HI_RX ((volatile unsigned short *)UART1_START_ADDR_HI_RX)
232
#define pUART1_START_ADDR_LO_RX ((volatile unsigned short *)UART1_START_ADDR_LO_RX)
233
#define pUART1_COUNT_RX ((volatile unsigned short *)UART1_COUNT_RX)
234
#define pUART1_NEXT_DESCR_RX ((volatile unsigned short *)UART1_NEXT_DESCR_RX)
235
#define pUART1_DESCR_RDY_RX ((volatile unsigned short *)UART1_DESCR_RDY_RX)
236
#define pUART1_IRQSTAT_RX ((volatile unsigned short *)UART1_IRQSTAT_RX)
237
#define pUART1_CURR_PTR_TX ((volatile unsigned short *)UART1_CURR_PTR_TX)
238
#define pUART1_CONFIG_TX ((volatile unsigned short *)UART1_CONFIG_TX)
239
#define pUART1_START_ADDR_HI_TX ((volatile unsigned short *)UART1_START_ADDR_HI_TX)
240
#define pUART1_START_ADDR_LO_TX ((volatile unsigned short *)UART1_START_ADDR_LO_TX)
241
#define pUART1_COUNT_TX ((volatile unsigned short *)UART1_COUNT_TX)
242
#define pUART1_NEXT_DESCR_TX ((volatile unsigned short *)UART1_NEXT_DESCR_TX)
243
#define pUART1_DESCR_RDY_TX ((volatile unsigned short *)UART1_DESCR_RDY_TX)
244
#define pUART1_IRQSTAT_TX ((volatile unsigned short *)UART1_IRQSTAT_TX)
245
 
246
/* TIMER 0, 1, 2 Registers (0xFFC0 2000-0xFFC0 23FF) */
247
#define pTIMER0_STATUS ((volatile unsigned short *)TIMER0_STATUS)
248
#define pTIMER0_CONFIG ((volatile unsigned short *)TIMER0_CONFIG)
249
#define pTIMER0_COUNTER_LO ((volatile unsigned short *)TIMER0_COUNTER_LO)
250
#define pTIMER0_COUNTER_HI ((volatile unsigned short *)TIMER0_COUNTER_HI)
251
#define pTIMER0_PERIOD_LO ((volatile unsigned short *)TIMER0_PERIOD_LO)
252
#define pTIMER0_PERIOD_HI ((volatile unsigned short *)TIMER0_PERIOD_HI)
253
#define pTIMER0_WIDTH_LO ((volatile unsigned short *)TIMER0_WIDTH_LO)
254
#define pTIMER0_WIDTH_HI ((volatile unsigned short *)TIMER0_WIDTH_HI)
255
#define pTIMER1_STATUS ((volatile unsigned short *)TIMER1_STATUS)
256
#define pTIMER1_CONFIG ((volatile unsigned short *)TIMER1_CONFIG)
257
#define pTIMER1_COUNTER_LO ((volatile unsigned short *)TIMER1_COUNTER_LO)
258
#define pTIMER1_COUNTER_HI ((volatile unsigned short *)TIMER1_COUNTER_HI)
259
#define pTIMER1_PERIOD_LO ((volatile unsigned short *)TIMER1_PERIOD_LO)
260
#define pTIMER1_PERIOD_HI ((volatile unsigned short *)TIMER1_PERIOD_HI)
261
#define pTIMER1_WIDTH_LO ((volatile unsigned short *)TIMER1_WIDTH_LO)
262
#define pTIMER1_WIDTH_HI ((volatile unsigned short *)TIMER1_WIDTH_HI)
263
#define pTIMER2_STATUS ((volatile unsigned short *)TIMER2_STATUS)
264
#define pTIMER2_CONFIG ((volatile unsigned short *)TIMER2_CONFIG)
265
#define pTIMER2_COUNTER_LO ((volatile unsigned short *)TIMER2_COUNTER_LO)
266
#define pTIMER2_COUNTER_HI ((volatile unsigned short *)TIMER2_COUNTER_HI)
267
#define pTIMER2_PERIOD_LO ((volatile unsigned short *)TIMER2_PERIOD_LO)
268
#define pTIMER2_PERIOD_HI ((volatile unsigned short *)TIMER2_PERIOD_HI)
269
#define pTIMER2_WIDTH_LO ((volatile unsigned short *)TIMER2_WIDTH_LO)
270
#define pTIMER2_WIDTH_HI ((volatile unsigned short *)TIMER2_WIDTH_HI)
271
 
272
/* SPORT0 Controller (0xFFC0 2800-0xFFC0 2BFF) */
273
#define pSPORT0_TX_CONFIG ((volatile unsigned short *)SPORT0_TX_CONFIG)
274
#define pSPORT0_RX_CONFIG ((volatile unsigned short *)SPORT0_RX_CONFIG)
275
#define pSPORT0_TX ((volatile short *)SPORT0_TX)
276
#define pSPORT0_RX ((volatile short *)SPORT0_RX)
277
#define pSPORT0_TSCLKDIV ((volatile unsigned short *)SPORT0_TSCLKDIV)
278
#define pSPORT0_RSCLKDIV ((volatile unsigned short *)SPORT0_RSCLKDIV)
279
#define pSPORT0_TFSDIV ((volatile unsigned short *)SPORT0_TFSDIV)
280
#define pSPORT0_RFSDIV ((volatile unsigned short *)SPORT0_RFSDIV)
281
#define pSPORT0_STAT ((volatile unsigned short *)SPORT0_STAT)
282
#define pSPORT0_MTCS0 ((volatile unsigned short *)SPORT0_MTCS0)
283
#define pSPORT0_MTCS1 ((volatile unsigned short *)SPORT0_MTCS1)
284
#define pSPORT0_MTCS2 ((volatile unsigned short *)SPORT0_MTCS2)
285
#define pSPORT0_MTCS3 ((volatile unsigned short *)SPORT0_MTCS3)
286
#define pSPORT0_MTCS4 ((volatile unsigned short *)SPORT0_MTCS4)
287
#define pSPORT0_MTCS5 ((volatile unsigned short *)SPORT0_MTCS5)
288
#define pSPORT0_MTCS6 ((volatile unsigned short *)SPORT0_MTCS6)
289
#define pSPORT0_MTCS7 ((volatile unsigned short *)SPORT0_MTCS7)
290
#define pSPORT0_MRCS0 ((volatile unsigned short *)SPORT0_MRCS0)
291
#define pSPORT0_MRCS1 ((volatile unsigned short *)SPORT0_MRCS1)
292
#define pSPORT0_MRCS2 ((volatile unsigned short *)SPORT0_MRCS2)
293
#define pSPORT0_MRCS3 ((volatile unsigned short *)SPORT0_MRCS3)
294
#define pSPORT0_MRCS4 ((volatile unsigned short *)SPORT0_MRCS4)
295
#define pSPORT0_MRCS5 ((volatile unsigned short *)SPORT0_MRCS5)
296
#define pSPORT0_MRCS6 ((volatile unsigned short *)SPORT0_MRCS6)
297
#define pSPORT0_MRCS7 ((volatile unsigned short *)SPORT0_MRCS7)
298
#define pSPORT0_MCMC1 ((volatile unsigned short *)SPORT0_MCMC1)
299
#define pSPORT0_MCMC2 ((volatile unsigned short *)SPORT0_MCMC2)
300
#define pSPORT0_CURR_PTR_RX ((volatile unsigned short *)SPORT0_CURR_PTR_RX)
301
#define pSPORT0_CONFIG_DMA_RX ((volatile unsigned short *)SPORT0_CONFIG_DMA_RX)
302
#define pSPORT0_START_ADDR_HI_RX ((volatile unsigned short *)SPORT0_START_ADDR_HI_RX)
303
#define pSPORT0_START_ADDR_LO_RX ((volatile unsigned short *)SPORT0_START_ADDR_LO_RX)
304
#define pSPORT0_COUNT_RX ((volatile unsigned short *)SPORT0_COUNT_RX)
305
#define pSPORT0_NEXT_DESCR_RX ((volatile unsigned short *)SPORT0_NEXT_DESCR_RX)
306
#define pSPORT0_DESCR_RDY_RX ((volatile unsigned short *)SPORT0_DESCR_RDY_RX)
307
#define pSPORT0_IRQSTAT_RX ((volatile unsigned short *)SPORT0_IRQSTAT_RX)
308
#define pSPORT0_CURR_PTR_TX ((volatile unsigned short *)SPORT0_CURR_PTR_TX)
309
#define pSPORT0_CONFIG_DMA_TX ((volatile unsigned short *)SPORT0_CONFIG_DMA_TX)
310
#define pSPORT0_START_ADDR_HI_TX ((volatile unsigned short *)SPORT0_START_ADDR_HI_TX)
311
#define pSPORT0_START_ADDR_LO_TX ((volatile unsigned short *)SPORT0_START_ADDR_LO_TX)
312
#define pSPORT0_COUNT_TX ((volatile unsigned short *)SPORT0_COUNT_TX)
313
#define pSPORT0_NEXT_DESCR_TX ((volatile unsigned short *)SPORT0_NEXT_DESCR_TX)
314
#define pSPORT0_DESCR_RDY_TX ((volatile unsigned short *)SPORT0_DESCR_RDY_TX)
315
#define pSPORT0_IRQSTAT_TX ((volatile unsigned short *)SPORT0_IRQSTAT_TX)
316
 
317
/* SPORT1 Controller (0xFFC0 2C00-0xFFC0 2FFF) */
318
#define pSPORT1_TX_CONFIG ((volatile unsigned short *)SPORT1_TX_CONFIG)
319
#define pSPORT1_RX_CONFIG ((volatile unsigned short *)SPORT1_RX_CONFIG)
320
#define pSPORT1_TX ((volatile short *)SPORT1_TX)
321
#define pSPORT1_RX ((volatile short *)SPORT1_RX)
322
#define pSPORT1_TSCLKDIV ((volatile unsigned short *)SPORT1_TSCLKDIV)
323
#define pSPORT1_RSCLKDIV ((volatile unsigned short *)SPORT1_RSCLKDIV)
324
#define pSPORT1_TFSDIV ((volatile unsigned short *)SPORT1_TFSDIV)
325
#define pSPORT1_RFSDIV ((volatile unsigned short *)SPORT1_RFSDIV)
326
#define pSPORT1_STAT ((volatile unsigned short *)SPORT1_STAT)
327
#define pSPORT1_MTCS0 ((volatile unsigned short *)SPORT1_MTCS0)
328
#define pSPORT1_MTCS1 ((volatile unsigned short *)SPORT1_MTCS1)
329
#define pSPORT1_MTCS2 ((volatile unsigned short *)SPORT1_MTCS2)
330
#define pSPORT1_MTCS3 ((volatile unsigned short *)SPORT1_MTCS3)
331
#define pSPORT1_MTCS4 ((volatile unsigned short *)SPORT1_MTCS4)
332
#define pSPORT1_MTCS5 ((volatile unsigned short *)SPORT1_MTCS5)
333
#define pSPORT1_MTCS6 ((volatile unsigned short *)SPORT1_MTCS6)
334
#define pSPORT1_MTCS7 ((volatile unsigned short *)SPORT1_MTCS7)
335
#define pSPORT1_MRCS0 ((volatile unsigned short *)SPORT1_MRCS0)
336
#define pSPORT1_MRCS1 ((volatile unsigned short *)SPORT1_MRCS1)
337
#define pSPORT1_MRCS2 ((volatile unsigned short *)SPORT1_MRCS2)
338
#define pSPORT1_MRCS3 ((volatile unsigned short *)SPORT1_MRCS3)
339
#define pSPORT1_MRCS4 ((volatile unsigned short *)SPORT1_MRCS4)
340
#define pSPORT1_MRCS5 ((volatile unsigned short *)SPORT1_MRCS5)
341
#define pSPORT1_MRCS6 ((volatile unsigned short *)SPORT1_MRCS6)
342
#define pSPORT1_MRCS7 ((volatile unsigned short *)SPORT1_MRCS7)
343
#define pSPORT1_MCMC1 ((volatile unsigned short *)SPORT1_MCMC1)
344
#define pSPORT1_MCMC2 ((volatile unsigned short *)SPORT1_MCMC2)
345
#define pSPORT1_CURR_PTR_RX ((volatile unsigned short *)SPORT1_CURR_PTR_RX)
346
#define pSPORT1_CONFIG_DMA_RX ((volatile unsigned short *)SPORT1_CONFIG_DMA_RX)
347
#define pSPORT1_START_ADDR_HI_RX ((volatile unsigned short *)SPORT1_START_ADDR_HI_RX)
348
#define pSPORT1_START_ADDR_LO_RX ((volatile unsigned short *)SPORT1_START_ADDR_LO_RX)
349
#define pSPORT1_COUNT_RX ((volatile unsigned short *)SPORT1_COUNT_RX)
350
#define pSPORT1_NEXT_DESCR_RX ((volatile unsigned short *)SPORT1_NEXT_DESCR_RX)
351
#define pSPORT1_DESCR_RDY_RX ((volatile unsigned short *)SPORT1_DESCR_RDY_RX)
352
#define pSPORT1_IRQSTAT_RX ((volatile unsigned short *)SPORT1_IRQSTAT_RX)
353
#define pSPORT1_CURR_PTR_TX ((volatile unsigned short *)SPORT1_CURR_PTR_TX)
354
#define pSPORT1_CONFIG_DMA_TX ((volatile unsigned short *)SPORT1_CONFIG_DMA_TX)
355
#define pSPORT1_START_ADDR_HI_TX ((volatile unsigned short *)SPORT1_START_ADDR_HI_TX)
356
#define pSPORT1_START_ADDR_LO_TX ((volatile unsigned short *)SPORT1_START_ADDR_LO_TX)
357
#define pSPORT1_COUNT_TX ((volatile unsigned short *)SPORT1_COUNT_TX)
358
#define pSPORT1_NEXT_DESCR_TX ((volatile unsigned short *)SPORT1_NEXT_DESCR_TX)
359
#define pSPORT1_DESCR_RDY_TX ((volatile unsigned short *)SPORT1_DESCR_RDY_TX)
360
#define pSPORT1_IRQSTAT_TX ((volatile unsigned short *)SPORT1_IRQSTAT_TX)
361
 
362
/* SPI 0 Controller (0xFFC0 3000-0xFFC0 33FF) */
363
#define pSPI0_CTL ((volatile unsigned short *)SPI0_CTL)
364
#define pSPI0_FLG ((volatile unsigned short *)SPI0_FLG)
365
#define pSPI0_ST ((volatile unsigned short *)SPI0_ST)
366
#define pSPI0_TDBR ((volatile unsigned short *)SPI0_TDBR)
367
#define pSPI0_RDBR ((volatile unsigned short *)SPI0_RDBR)
368
#define pSPI0_BAUD ((volatile unsigned short *)SPI0_BAUD)
369
#define pSPI0_SHADOW ((volatile unsigned short *)SPI0_SHADOW)
370
#define pSPI0_CURR_PTR ((volatile unsigned short *)SPI0_CURR_PTR)
371
#define pSPI0_CONFIG ((volatile unsigned short *)SPI0_CONFIG)
372
#define pSPI0_START_ADDR_HI ((volatile unsigned short *)SPI0_START_ADDR_HI)
373
#define pSPI0_START_ADDR_LO ((volatile unsigned short *)SPI0_START_ADDR_LO)
374
#define pSPI0_COUNT ((volatile unsigned short *)SPI0_COUNT)
375
#define pSPI0_NEXT_DESCR ((volatile unsigned short *)SPI0_NEXT_DESCR)
376
#define pSPI0_DESCR_RDY ((volatile unsigned short *)SPI0_DESCR_RDY)
377
#define pSPI0_DMA_INT ((volatile unsigned short *)SPI0_DMA_INT)
378
 
379
/* SPI 1 Controller (0xFFC0 3400-0xFFC0 37FF) */
380
#define pSPI1_CTL ((volatile unsigned short *)SPI1_CTL)
381
#define pSPI1_FLG ((volatile unsigned short *)SPI1_FLG)
382
#define pSPI1_ST ((volatile unsigned short *)SPI1_ST)
383
#define pSPI1_TDBR ((volatile unsigned short *)SPI1_TDBR)
384
#define pSPI1_RDBR ((volatile unsigned short *)SPI1_RDBR)
385
#define pSPI1_BAUD ((volatile unsigned short *)SPI1_BAUD)
386
#define pSPI1_SHADOW ((volatile unsigned short *)SPI1_SHADOW)
387
#define pSPI1_CURR_PTR ((volatile unsigned short *)SPI1_CURR_PTR)
388
#define pSPI1_CONFIG ((volatile unsigned short *)SPI1_CONFIG)
389
#define pSPI1_START_ADDR_HI ((volatile unsigned short *)SPI1_START_ADDR_HI)
390
#define pSPI1_START_ADDR_LO ((volatile unsigned short *)SPI1_START_ADDR_LO)
391
#define pSPI1_COUNT ((volatile unsigned short *)SPI1_COUNT)
392
#define pSPI1_NEXT_DESCR ((volatile unsigned short *)SPI1_NEXT_DESCR)
393
#define pSPI1_DESCR_RDY ((volatile unsigned short *)SPI1_DESCR_RDY)
394
#define pSPI1_DMA_INT ((volatile unsigned short *)SPI1_DMA_INT)
395
 
396
/* Memory DMA Controller (0xFFC0 3800-0xFFC0 3BFF) */
397
#define pMDD_DCP ((volatile unsigned short *)MDD_DCP)
398
#define pMDD_DCFG ((volatile unsigned short *)MDD_DCFG)
399
#define pMDD_DSAH ((volatile unsigned short *)MDD_DSAH)
400
#define pMDD_DSAL ((volatile unsigned short *)MDD_DSAL)
401
#define pMDD_DCT ((volatile unsigned short *)MDD_DCT)
402
#define pMDD_DND ((volatile unsigned short *)MDD_DND)
403
#define pMDD_DDR ((volatile unsigned short *)MDD_DDR)
404
#define pMDD_DI ((volatile unsigned short *)MDD_DI)
405
#define pMDS_DCP ((volatile unsigned short *)MDS_DCP)
406
#define pMDS_DCFG ((volatile unsigned short *)MDS_DCFG)
407
#define pMDS_DSAH ((volatile unsigned short *)MDS_DSAH)
408
#define pMDS_DSAL ((volatile unsigned short *)MDS_DSAL)
409
#define pMDS_DCT ((volatile unsigned short *)MDS_DCT)
410
#define pMDS_DND ((volatile unsigned short *)MDS_DND)
411
#define pMDS_DDR ((volatile unsigned short *)MDS_DDR)
412
#define pMDS_DI ((volatile unsigned short *)MDS_DI)
413
 
414
/* PCI Bridge PAB Registers (0xFFC0 4000-0xFFC0 43FF) */
415
#define pPCI_CTL ((volatile unsigned short *)PCI_CTL)
416
#define pPCI_STAT ((volatile unsigned long *)PCI_STAT)
417
#define pPCI_ICTL ((volatile unsigned long *)PCI_ICTL)
418
#define pPCI_MBAP (_PTR_TO_VOL_VOID_PTR PCI_MBAP)
419
#define pPCI_IBAP (_PTR_TO_VOL_VOID_PTR PCI_IBAP)
420
#define pPCI_CBAP (_PTR_TO_VOL_VOID_PTR PCI_CBAP)
421
#define pPCI_TMBAP (_PTR_TO_VOL_VOID_PTR PCI_TMBAP)
422
#define pPCI_TIBAP (_PTR_TO_VOL_VOID_PTR PCI_TIBAP)
423
 
424
/* PCI Bridge External Access Bus Registers (0xEEFF FF00-0xEEFF FFFF) */
425
#define pPCI_DMBARM ((volatile unsigned long *)PCI_DMBARM)
426
#define pPCI_DIBARM ((volatile unsigned long *)PCI_DIBARM)
427
#define pPCI_CFG_DIC ((volatile unsigned long *)PCI_CFG_DIC)
428
#define pPCI_CFG_VIC ((volatile unsigned long *)PCI_CFG_VIC)
429
#define pPCI_CFG_STAT ((volatile unsigned long *)PCI_CFG_STAT)
430
#define pPCI_CFG_CMD ((volatile unsigned long *)PCI_CFG_CMD)
431
#define pPCI_CFG_CC ((volatile unsigned long *)PCI_CFG_CC)
432
#define pPCI_CFG_RID ((volatile unsigned long *)PCI_CFG_RID)
433
#define pPCI_CFG_BIST ((volatile unsigned long *)PCI_CFG_BIST)
434
#define pPCI_CFG_HT ((volatile unsigned long *)PCI_CFG_HT)
435
#define pPCI_CFG_MLT ((volatile unsigned long *)PCI_CFG_MLT)
436
#define pPCI_CFG_CLS ((volatile unsigned long *)PCI_CFG_CLS)
437
#define pPCI_CFG_MBAR ((volatile unsigned long *)PCI_CFG_MBAR)
438
#define pPCI_CFG_IBAR ((volatile unsigned long *)PCI_CFG_IBAR)
439
#define pPCI_CFG_SID ((volatile unsigned long *)PCI_CFG_SID)
440
#define pPCI_CFG_SVID ((volatile unsigned long *)PCI_CFG_SVID)
441
#define pPCI_CFG_MAXL ((volatile unsigned long *)PCI_CFG_MAXL)
442
#define pPCI_CFG_MING ((volatile unsigned long *)PCI_CFG_MING)
443
#define pPCI_CFG_IP ((volatile unsigned long *)PCI_CFG_IP)
444
#define pPCI_CFG_IL ((volatile unsigned long *)PCI_CFG_IL)
445
#define pPCI_HMCTL ((volatile unsigned long *)PCI_HMCTL)
446
 
447
/* System Bus Interface Unit (0xFFC0 4800-0xFFC0 4FFF) */
448
#define pDMA_DBP ((volatile unsigned short *)DMA_DBP)
449
#define pDB_ACOMP (_PTR_TO_VOL_VOID_PTR DB_ACOMP)
450
#define pDB_CCOMP ((volatile unsigned long *)DB_CCOMP)
451
 
452
#endif /* _CDEF_BF535_H */

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