OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [newlib-1.17.0/] [libgloss/] [hp74x/] [hppa.ld] - Blame information for rev 461

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 148 jeremybenn
STARTUP(crt0-hppa.o)
2
OUTPUT_ARCH(hppa)
3
/*** INPUT(hppa.o) ***/
4
SEARCH_DIR(.)
5
__DYNAMIC  =  0;
6
 
7
/*
8
 * Setup the memory map of the MC68ec0x0 Board (IDP)
9
 * stack grows up towards high memory. This works for
10
 * both the rom68k and the mon68k monitors.
11
 */
12
MEMORY
13
{
14
  ram (rwx) : ORIGIN = 0x10000, LENGTH = 32M
15
}
16
 
17
/*
18
 * stick everything in ram (of course)
19
 */
20
SECTIONS
21
{
22
  .text :
23
  {
24
    CREATE_OBJECT_SYMBOLS
25
    *(.text)
26
     etext  =  .;
27
     __CTOR_LIST__ = .;
28
     LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
29
    *(.ctors)
30
     LONG(0)
31
     __CTOR_END__ = .;
32
     __DTOR_LIST__ = .;
33
     LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
34
    *(.dtors)
35
     LONG(0)
36
     __DTOR_END__ = .;
37
    *(.lit)
38
    *(.shdata)
39
  }  > ram
40
  .shbss SIZEOF(.text) + ADDR(.text) :  {
41
    *(.shbss)
42
  }
43
  .data  : {
44
    *(.data)
45
    CONSTRUCTORS
46
    _edata  =  .;
47
  } > ram
48
 
49
  .bss SIZEOF(.data) + ADDR(.data) :
50
  {
51
   _bss_start = ALIGN(0x8);
52
   *(.bss)
53
   *(COMMON)
54
      _bss_end = ALIGN(0x8);
55
  }
56
  .stab  0 (NOLOAD) :
57
  {
58
    [ .stab ]
59
  }
60
  .stabstr  0 (NOLOAD) :
61
  {
62
    [ .stabstr ]
63
  }
64
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.