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[/] [openrisc/] [trunk/] [gnu-src/] [newlib-1.17.0/] [libgloss/] [mips/] [entry.S] - Blame information for rev 407

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1 148 jeremybenn
/* entry.S - exception handler for emulating MIPS16 'entry' and 'exit'
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   pseudo-instructions.  These instructions are generated by the compiler
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   when the -mentry switch is used.  The instructions are not implemented
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   in the MIPS16 CPU; hence the exception handler that emulates them.
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   This module contains the following public functions:
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   * void __install_entry_handler(void);
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     This function installs the entry/exit exception handler.  It should
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     be called before executing any MIPS16 functions that were compiled with
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     -mentry, typically before main() is called.
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14
   * void __remove_entry_handler(void);
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     This function removes the entry/exit exception handler.  It should
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     be called when the program is exiting, or when it is known that no
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     more MIPS16 functions compiled with -mentry will be called.
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*/
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#ifdef __mips16
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/* This file contains 32 bit assembly code.  */
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        .set nomips16
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#endif
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#include "regs.S"
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#define CAUSE_EXCMASK   0x3c    /* mask for ExcCode in Cause Register */
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#define EXC_RI          0x28    /* 101000 == 10 << 2 */
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/* Set DEBUG to 1 to enable recording of the last 16 interrupt causes.  */
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#define DEBUG 0
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#if DEBUG
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        .sdata
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int_count:
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        .space  4                       /* interrupt count modulo 16 */
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int_cause:
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        .space  4*16                    /* last 16 interrupt causes */
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#endif
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        .text
45
 
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        .set    noreorder               /* Do NOT reorder instructions */
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48
 
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/* __entry_exit_handler - the reserved instruction exception handler
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   that emulates the entry and exit instruction.  */
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__entry_exit_handler:
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        .set    noat                    /* Do NOT use at register */
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#if DEBUG
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/* Must avoid using 'la' pseudo-op because it uses gp register, which
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   may not have a good value in an exception handler. */
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#       la      k0, int_count           /* intcount = (intcount + 1) & 0xf */
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        lui     k0 ,%hi(int_count)
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        addiu   k0, k0 ,%lo(int_count)
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        lw      k1, (k0)
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        addiu   k1, k1, 1
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        andi    k1, k1, 0x0f
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        sw      k1, (k0)
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#       la      k0, int_cause           /* k1 = &int_cause[intcount] */
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        lui     k0, %hi(int_cause)
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        addiu   k0, k0, %lo(int_cause)
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        sll     k1, k1, 2
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        add     k1, k1, k0
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#endif
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        mfc0    k0, C0_CAUSE            /* Fetch cause */
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#if DEBUG
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        sw      k0, -4(k1)              /* Save exception cause in buffer */
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#endif
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        mfc0    k1, C0_EPC              /* Check for Reserved Inst. without */
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        and     k0, CAUSE_EXCMASK       /*   destroying any register */
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        subu    k0, EXC_RI
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        bne     k0, zero, check_others  /* Sorry, go do something else */
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        and     k0, k1, 1               /* Check for TR mode (pc.0 = 1) */
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        beq     k0, zero, ri_in_32      /* Sorry, RI in 32-bit mode */
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        xor     k1, 1
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/* Since we now are going to emulate or die, we can use all the T-registers */
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/* that MIPS16 does not use (at, t0-t8), and we don't have to save them. */
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        .set    at                      /* Now it's ok to use at again */
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89
#if 0
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        j       leave
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        rfe
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#endif
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        lhu     t0, 0(k1)               /* Fetch the offending instruction */
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        xor     t8, k1, 1               /* Prepare t8 for exit */
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        and     t1, t0, 0xf81f          /* Check for entry/exit opcode */
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        bne     t1, 0xe809, other_ri
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deareg: and     t1, t0, 0x0700          /* Isolate the three a-bits */
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        srl     t1, 6                   /* Adjust them so x4 is applied */
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        slt     t2, t1, 17              /* See if this is the exit instruction */
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        beqz    t2, doexit
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        la      t2, savea
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        subu    t2, t1
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        jr      t2                      /* Jump into the instruction table */
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        rfe                             /* We run the rest in user-mode */
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                                        /* This is the entry instruction! */
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        sw      a3, 12(sp)              /* 4: a0-a3 saved */
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        sw      a2,  8(sp)              /* 3: a0-a2 saved */
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        sw      a1,  4(sp)              /* 2: a0-a1 saved */
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        sw      a0,  0(sp)              /* 1: a0    saved */
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savea:                                  /* 0: No arg regs saved */
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dera:   and     t1, t0, 0x0020          /* Isolate the save-ra bit */
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        move    t7, sp                  /* Temporary SP */
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        beq     t1, zero, desreg
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        subu    sp, 32                  /* Default SP adjustment */
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        sw      ra, -4(t7)
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        subu    t7, 4
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desreg: and     t1, t0, 0x00c0          /* Isolate the two s-bits */
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        beq     t1, zero, leave
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        subu    t1, 0x0040
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        beq     t1, zero, leave         /* Only one to save... */
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        sw      s0, -4(t7)              /* Do the first one */
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        sw      s1, -8(t7)              /* Do the last one */
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leave:  jr      t8                      /* Exit to unmodified EPC */
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        nop                             /* Urgh - the only nop!! */
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132
doexf0: mtc1    v0,$f0                  /* Copy float value */
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        b       doex2
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doexf1: mtc1    v1,$f0                  /* Copy double value */
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        mtc1    v0,$f1
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        b       doex2
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doexit: slt     t2, t1, 21
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        beq     t2, zero, doexf0
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        slt     t2, t1, 25
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        beq     t2, zero, doexf1
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doex2:  and     t1, t0, 0x0020          /* Isolate ra bit */
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        beq     t1, zero, dxsreg        /* t1 holds ra-bit */
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        addu    t7, sp, 32              /* Temporary SP */
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        lw      ra, -4(t7)
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        subu    t7, 4
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dxsreg: and     t1, t0, 0x00c0          /* Isolate the two s-bits */
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        beq     t1, zero, leavex
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        subu    t1, 0x0040
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        beq     t1, zero, leavex        /* Only one to save... */
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        lw      s0, -4(t7)              /* Do the first one */
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        lw      s1, -8(t7)              /* Do the last one */
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157
leavex: jr      ra                      /* Exit to ra */
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        addu    sp, 32                  /* Clean up stack pointer */
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160
/* Come here for exceptions we can't handle.  */
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162
ri_in_32:
163
other_ri:
164
check_others:                           /* call the previous handler */
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        la      k0,__previous
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        jr      k0
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        nop
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__exception_code:
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        .set noreorder
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        la      k0, __entry_exit_handler
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#       lui     k0, %hi(exception)
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#       addiu   k0, k0, %lo(exception)
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        jr      k0
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        nop
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        .set reorder
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__exception_code_end:
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179
        .data
180
__previous:
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        .space  (__exception_code_end - __exception_code)
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        .text
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185
/* void __install_entry_handler(void)
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187
   Install our entry/exit reserved instruction exception handler.
188
*/
189
        .ent    __install_entry_handler
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        .globl  __install_entry_handler
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__install_entry_handler:
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        .set noreorder
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        mfc0    a0,C0_SR
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        nop
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        li      a1,SR_BEV
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        and     a1,a1,a0
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        beq     a1,$0,baseaddr
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        lui     a0,0x8000       /* delay slot */
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        lui     a0,0xbfc0
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        addiu   a0,a0,0x0100
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baseaddr:
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        addiu   a0,a0,0x080     /* a0 = base vector table address */
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        li      a1,(__exception_code_end - __exception_code)
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        la      a2,__exception_code
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        la      a3,__previous
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/* there must be a better way of doing this???? */
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copyloop:
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        lw      v0,0(a0)
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        sw      v0,0(a3)
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        lw      v0,0(a2)
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        sw      v0,0(a0)
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        addiu   a0,a0,4
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        addiu   a2,a2,4
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        addiu   a3,a3,4
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        subu    a1,a1,4
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        bne     a1,$0,copyloop
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        nop
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        j       ra
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        nop
220
        .set reorder
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        .end    __install_entry_handler
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223
 
224
/* void __remove_entry_handler(void);
225
 
226
   Remove our entry/exit reserved instruction exception handler.
227
*/
228
 
229
        .ent    __remove_entry_handler
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        .globl  __remove_entry_handler
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__remove_entry_handler:
232
        .set noreorder
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234
        mfc0    a0,C0_SR
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        nop
236
        li      a1,SR_BEV
237
        and     a1,a1,a0
238
        beq     a1,$0,res_baseaddr
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        lui     a0,0x8000       /* delay slot */
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        lui     a0,0xbfc0
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        addiu   a0,a0,0x0200
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res_baseaddr:
243
        addiu   a0,a0,0x0180    /* a0 = base vector table address */
244
        li      a1,(__exception_code_end - __exception_code)
245
        la      a3,__previous
246
 
247
/* there must be a better way of doing this???? */
248
res_copyloop:
249
        lw      v0,0(a3)
250
        sw      v0,0(a0)
251
        addiu   a0,a0,4
252
        addiu   a3,a3,4
253
        subu    a1,a1,4
254
        bne     a1,$0,res_copyloop
255
        nop
256
        j       ra
257
        nop
258
        .set reorder
259
        .end    __remove_entry_handler
260
 
261
 
262
/* software_init_hook - install entry/exit handler and arrange to have it
263
   removed at exit.  This function is called by crt0.S.  */
264
 
265
        .text
266
        .globl  software_init_hook
267
        .ent    software_init_hook
268
software_init_hook:
269
        .set    noreorder
270
        subu    sp, sp, 8                       /* allocate stack space */
271
        sw      ra, 4(sp)                       /* save return address */
272
        jal     __install_entry_handler         /* install entry/exit handler */
273
        nop
274
        lui     a0, %hi(__remove_entry_handler) /* arrange for exit to */
275
        jal     atexit                          /*  de-install handler */
276
        addiu   a0, a0, %lo(__remove_entry_handler)     /* delay slot */
277
        lw      ra, 4(sp)                       /* get return address */
278
        j       ra                              /* return */
279
        addu    sp, sp, 8                       /* deallocate stack */
280
        .set    reorder
281
        .end    software_init_hook

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