OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [newlib-1.17.0/] [libgloss/] [mt/] [crt0-16-002.S] - Blame information for rev 407

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 148 jeremybenn
; crt0_2.s - Startup code for the mrisc1. This code initializes the C
2
;              run-time model.
3
;
4
; Copyright 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5
;
6
;  The authors hereby grant permission to use, copy, modify, distribute,
7
;  and license this software and its documentation for any purpose, provided
8
;  that existing copyright notices are retained in all copies and that this
9
;  notice is included verbatim in any distributions. No written agreement,
10
;  license, or royalty fee is required for any of the authorized uses.
11
;  Modifications to this software may be copyrighted by their authors
12
;  and need not follow the licensing terms described here, provided that
13
;  the new terms are clearly indicated on the first page of each file where
14
;  they apply.
15
;
16
 
17
        ; Create a label for the start of the eh_frame section.
18
        .section .eh_frame
19
__eh_frame_begin:
20
 
21
        .text
22
        .global _start
23
_start:
24
        ;; Initialize the stack pointer
25
        ldui    sp, #%hi16(__stack)
26
        addui   sp, sp, #%lo16(__stack)
27
        or      fp, sp, sp
28
        ;; Zero the bss space
29
        ldui    r9, #%hi16(__bss_start)
30
        addui   r9, r9, #%lo16(__bss_start)
31
        ldui    r10, #%hi16(__bss_end)
32
        addui   r10, r10, #%lo16(__bss_end)
33
        or      r0, r0, r0
34
        brle    r10, r9, .Lnext1
35
        or      r0, r0, r0
36
.Lcpy0:
37
        stw     r0, r9, #0
38
        addi    r9, r9, #4
39
        or      r0, r0, r0      ; nop
40
        brle    r9, r10, .Lcpy0
41
        or      r0, r0, r0      ; nop
42
 
43
.Lnext1:
44
        ;; Copy data from ROM to Frame Buffer (on-chip memory)
45
        ldui    r9, #%hi16(_fbdata_start)
46
        ori     r9, r9, #%lo16(_fbdata_start)
47
        ldui    r10, #%hi16(_fbdata_end)
48
        ori     r10, r10, #%lo16(_fbdata_end)
49
        ldui    r11, #%hi16(_fbdata_vma)
50
        brle    r10, r9, .Lnext2
51
        ori     r11, r11, #%lo16(_fbdata_vma)
52
.Lcpy1:
53
        ldw     r5, r9, #$0
54
        addi    r9, r9, #$4
55
        stw     r5, r11, #$0
56
        brlt    r9, r10, .Lcpy1
57
        addi    r11, r11, #$4
58
 
59
.Lnext2:
60
        ;; Zero the frame buffer bss section
61
        ldui    r9, #%hi16(_fbbss_start)
62
        ori     r9, r9, #%lo16(_fbbss_start)
63
        ldui    r10, #%hi16(_fbbss_end)
64
        ori     r10, r10, #%lo16(_fbbss_end)
65
        or      r0, r0, r0
66
        brle    r10, r9, .Lnext3
67
        or      r0, r0, r0
68
.Lcpy2:
69
        stw     r0, r9, #$0
70
        addi    r9, r9, #$4
71
        or      r0, r0, r0
72
        brle    r9, r10, .Lcpy2
73
        or      r0, r0, r0
74
 
75
.Lnext3:
76
        ;; Call global and static constructors
77
        ldui    r10, #%hi16(_init)
78
        ori     r10, r10, #%lo16(_init)
79
        or      r0, r0, r0      ; nop
80
        jal     r14, r10
81
        or      r0, r0, r0      ; nop
82
 
83
        ;; Call main
84
        ldui    r10, #%hi16(main)
85
        ori     r10, r10, #%lo16(main)
86
        or      r0, r0, r0      ; nop
87
        jal     r14, r10
88
        or      r0, r0, r0      ; nop
89
 
90
        ;; DJK - Added 12Nov01. Pass main's return value to exit.
91
        or      r1, r11, r0
92
 
93
        ;; Jump to exit
94
        ldui    r10, #%hi16(exit)
95
        ori     r10, r10, #%lo16(exit)
96
        or      r0, r0, r0      ; nop
97
        jal     r14, r10
98
        or      r0, r0, r0      ; nop
99
 
100
        ;; Exit does not return, however, this code is to catch an
101
        ;;   error if it does. Set the processor into sleep mode.
102
        ori     r1, r0, #$1
103
        stw     r1, r0, #%lo16(_DEBUG_HALT_REG)
104
        or      r0, r0, r0
105
        or      r0, r0, r0
106
        or      r0, r0, r0
107
        or      r0, r0, r0
108
        or      r0, r0, r0
109
.Lend:
110
        jmp .Lend
111
        or      r0, r0, r0

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.