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https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
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jeremybenn |
/* Copyright (c) 1995 Cygnus Support
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*
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* The authors hereby grant permission to use, copy, modify, distribute,
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* and license this software and its documentation for any purpose, provided
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* that existing copyright notices are retained in all copies and that this
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* notice is included verbatim in any distributions. No written agreement,
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* license, or royalty fee is required for any of the authorized uses.
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* Modifications to this software may be copyrighted by their authors
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* and need not follow the licensing terms described here, provided that
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* the new terms are clearly indicated on the first page of each file where
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* they apply.
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*
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* The w89k uses a memory mapped I/O scheme as well as a PC style ISA bus.
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* All I/O accesses are via a port.
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*/
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#define IOSPACE 0xf0000000
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#define outp(port,val) *((volatile unsigned char*)(IOSPACE+port))=val
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#define inp(port) *((volatile unsigned char*)(IOSPACE+port))
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#define RS232PORT 0x3f8
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#define COM1_LSR (0x3f8 + 5)
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#define COM1_DATA (0x3f8 + 0)
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#define RS232REG 0x3fd
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#define TRANSMIT 0x20
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#define RECEIVE 0x01
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