URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [newlib-1.17.0/] [newlib/] [libc/] [machine/] [arm/] [machine/] [param.h] - Blame information for rev 194

Go to most recent revision | Details | Compare with Previous | View Log


/* ARM configuration file; HZ is 100 rather than the default 60 */
 
#ifndef _MACHINE_PARAM_H
# define _MACHINE_PARAM_H
 
# define HZ (100)
 
#ifdef __ARMEB__
#define BYTE_ORDER BIG_ENDIAN
#else
#define BYTE_ORDER LITTLE_ENDIAN
#endif
 
#endif

Line No.	Rev	Author	Line
1	148	jeremybenn	`/* ARM configuration file; HZ is 100 rather than the default 60 */`
2
3			`#ifndef _MACHINE_PARAM_H`
4			`# define _MACHINE_PARAM_H`
5
6			`# define HZ (100)`
7
8			`#ifdef __ARMEB__`
9			`#define BYTE_ORDER BIG_ENDIAN`
10			`#else`
11			`#define BYTE_ORDER LITTLE_ENDIAN`
12			`#endif`
13
14			`#endif`

Browse

Tools

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [newlib-1.17.0/] [newlib/] [libc/] [machine/] [arm/] [machine/] [param.h] - Blame information for rev 194