OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [newlib-1.17.0/] [newlib/] [libc/] [machine/] [mn10300/] [strchr.S] - Blame information for rev 407

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 148 jeremybenn
        .file "strchr.S"
2
 
3
        .section .text
4
        .global _strchr
5
        .type    _strchr,@function
6
_strchr:
7
        movm [d2,d3,a2,a3],(sp)
8
        add -12,sp
9
.Lend_of_prologue:
10
        mov d0,a1
11
        movbu d1,(7,sp)
12
#ifndef __OPTIMIZE_SIZE__
13
        btst 3,d0
14
        bne .L20
15
        clr d0
16
        setlb
17
        mov sp,a2
18
        mov d0,d3
19
        add d3,a2
20
        mov a2,a0
21
        add 12,a0
22
        movbu (7,sp),d3
23
        movbu d3,(-4,a0)
24
        inc d0
25
        cmp 3,d0
26
        lls
27
        mov a1,a0
28
        mov -16843009,a1
29
        mov (a0),d2
30
        mov a1,d1
31
        add d2,d1
32
        mov d2,d0
33
        not d0
34
        and d0,d1
35
        mov -2139062144,d3
36
        mov d3,(0,sp)
37
        btst -2139062144,d1
38
        bne .L27
39
        jmp .L38
40
.L28:
41
        inc4 a0
42
        mov (a0),d2
43
        mov a1,d1
44
        add d2,d1
45
        mov d2,d0
46
        not d0
47
        and d0,d1
48
        mov (0,sp),d3
49
        and d3,d1
50
        bne .L27
51
.L38:
52
        mov (8,sp),d0
53
        xor d2,d0
54
        mov a1,d1
55
        add d0,d1
56
        not d0
57
        and d0,d1
58
        and d3,d1
59
        beq .L28
60
.L27:
61
        mov a0,a1
62
.L20:
63
#endif
64
        movbu (a1),d0
65
        cmp 0,d0
66
        beq .L32
67
        movbu (7,sp),d1
68
        setlb
69
        cmp d1,d0
70
        beq .L36
71
        inc a1
72
        movbu (a1),d0
73
        cmp 0,d0
74
        lne
75
.L32:
76
        movbu (7,sp),d0
77
        movbu (a1),d3
78
        cmp d0,d3
79
        beq .L36
80
        mov 0,a0
81
        jmp .Lepilogue
82
.L36:
83
        mov a1,a0
84
.Lepilogue:
85
        ret [d2,d3,a2,a3],28
86
.Lend_of_strchr:
87
        .size    _strchr, .Lend_of_strchr - _strchr
88
 
89
        .section        .debug_frame,"",@progbits
90
.Lstart_of_debug_frame:
91
        # Common Information Entry (CIE)
92
        .4byte  .Lend_of_CIE - .Lstart_of_CIE   # CIE Length
93
.Lstart_of_CIE:
94
        .4byte   0xffffffff                     # CIE Identifier Tag
95
        .byte    0x1                            # CIE Version
96
        .ascii   "\0"                           # CIE Augmentation
97
        .uleb128 0x1                            # CIE Code Alignment Factor
98
        .sleb128 -4                             # CIE Data Alignment Factor
99
        .byte    0x32                           # CIE RA Column
100
        .byte    0xc                            # DW_CFA_def_cfa
101
        .uleb128 0x9
102
        .uleb128 0x0
103
        .byte    0xb2                           # DW_CFA_offset, column 0x32
104
        .uleb128 0x0
105
        .align   2
106
.Lend_of_CIE:
107
 
108
        # Frame Description Entry (FDE)
109
        .4byte  .Lend_of_FDE - .Lstart_of_FDE   # FDE Length
110
.Lstart_of_FDE:
111
        .4byte   .Lstart_of_debug_frame         # FDE CIE offset
112
        .4byte   _strchr                        # FDE initial location
113
        .4byte   .Lend_of_strchr - _strchr      # FDE address range
114
        .byte    0x4                            # DW_CFA_advance_loc4
115
        .4byte   .Lend_of_prologue - _strchr
116
        .byte    0xe                            # DW_CFA_def_cfa_offset
117
        .uleb128 0x4
118
        .byte    0x87                           # DW_CFA_offset, column 0x7
119
        .uleb128 0x1
120
        .align 2
121
.Lend_of_FDE:

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.