OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [newlib-1.17.0/] [newlib/] [libc/] [machine/] [xscale/] [strcmp.c] - Blame information for rev 407

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 148 jeremybenn
#if defined __thumb__
2
 
3
#include "../../string/strcmp.c"
4
 
5
#else
6
 
7
#include <string.h>
8
#include "xscale.h"
9
 
10
int
11
strcmp (const char *s1, const char *s2)
12
{
13
  asm (PRELOADSTR ("%0") : : "r" (s1));
14
  asm (PRELOADSTR ("%0") : : "r" (s2));
15
 
16
#ifndef __OPTIMIZE_SIZE__
17
  if (((long)s1 & 3) == ((long)s2 & 3))
18
    {
19
      int result;
20
 
21
      /* Skip unaligned part.  */
22
      while ((long)s1 & 3)
23
        {
24
          if (*s1 == '\0' || *s1 != *s2)
25
            goto out;
26
          s1++;
27
          s2++;
28
        }
29
 
30
  /* Load two constants:
31
     lr = 0xfefefeff [ == ~(0x80808080 << 1) ]
32
     ip = 0x80808080  */
33
 
34
      asm (
35
       "ldr     r2, [%1, #0]\n\
36
        ldr     r3, [%2, #0]\n\
37
        cmp     r2, r3\n\
38
        bne     2f\n\
39
\n\
40
        mov     ip, #0x80\n\
41
        add     ip, ip, #0x8000\n\
42
        add     ip, ip, ip, lsl #16\n\
43
        mvn     lr, ip, lsl #1\n\
44
\n\
45
0:\n\
46
        ldr     r2, [%1, #0]\n\
47
        add     r3, r2, lr\n\
48
        bic     r3, r3, r2\n\
49
        tst     r3, ip\n\
50
        beq     1f\n\
51
        mov     %0, #0x0\n\
52
        b       3f\n\
53
1:\n\
54
        ldr     r2, [%1, #4]!\n\
55
        ldr     r3, [%2, #4]!\n\
56
"       PRELOADSTR("%1") "\n\
57
"       PRELOADSTR("%2") "\n\
58
        cmp     r2, r3\n\
59
        beq     0b"
60
 
61
       /* The following part could be done in a C loop as well, but it needs
62
          to be assembler to save some cycles in the case where the optimized
63
          loop above finds the strings to be equal.  */
64
"\n\
65
2:\n\
66
        ldrb    r2, [%1, #0]\n\
67
"       PRELOADSTR("%1") "\n\
68
"       PRELOADSTR("%2") "\n\
69
        cmp     r2, #0x0\n\
70
        beq     1f\n\
71
        ldrb    r3, [%2, #0]\n\
72
        cmp     r2, r3\n\
73
        bne     1f\n\
74
0:\n\
75
        ldrb    r3, [%1, #1]!\n\
76
        add     %2, %2, #1\n\
77
        ands    ip, r3, #0xff\n\
78
        beq     1f\n\
79
        ldrb    r3, [%2]\n\
80
        cmp     ip, r3\n\
81
        beq     0b\n\
82
1:\n\
83
        ldrb    lr, [%1, #0]\n\
84
        ldrb    ip, [%2, #0]\n\
85
        rsb     %0, ip, lr\n\
86
3:\n\
87
"
88
 
89
       : "=r" (result), "=&r" (s1), "=&r" (s2)
90
       : "1" (s1), "2" (s2)
91
       : "lr", "ip", "r2", "r3", "cc");
92
      return result;
93
    }
94
#endif
95
 
96
  while (*s1 != '\0' && *s1 == *s2)
97
    {
98
      asm (PRELOADSTR("%0") : : "r" (s1));
99
      asm (PRELOADSTR("%0") : : "r" (s2));
100
      s1++;
101
      s2++;
102
    }
103
 out:
104
  return (*(unsigned char *) s1) - (*(unsigned char *) s2);
105
}
106
 
107
#endif

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.