| 1 |
148 |
jeremybenn |
/* -------------------------------------------------------------- */
|
| 2 |
|
|
/* (C)Copyright 2006,2008, */
|
| 3 |
|
|
/* International Business Machines Corporation */
|
| 4 |
|
|
/* All Rights Reserved. */
|
| 5 |
|
|
/* */
|
| 6 |
|
|
/* Redistribution and use in source and binary forms, with or */
|
| 7 |
|
|
/* without modification, are permitted provided that the */
|
| 8 |
|
|
/* following conditions are met: */
|
| 9 |
|
|
/* */
|
| 10 |
|
|
/* - Redistributions of source code must retain the above copyright*/
|
| 11 |
|
|
/* notice, this list of conditions and the following disclaimer. */
|
| 12 |
|
|
/* */
|
| 13 |
|
|
/* - Redistributions in binary form must reproduce the above */
|
| 14 |
|
|
/* copyright notice, this list of conditions and the following */
|
| 15 |
|
|
/* disclaimer in the documentation and/or other materials */
|
| 16 |
|
|
/* provided with the distribution. */
|
| 17 |
|
|
/* */
|
| 18 |
|
|
/* - Neither the name of IBM Corporation nor the names of its */
|
| 19 |
|
|
/* contributors may be used to endorse or promote products */
|
| 20 |
|
|
/* derived from this software without specific prior written */
|
| 21 |
|
|
/* permission. */
|
| 22 |
|
|
/* */
|
| 23 |
|
|
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND */
|
| 24 |
|
|
/* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, */
|
| 25 |
|
|
/* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
|
| 26 |
|
|
/* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE */
|
| 27 |
|
|
/* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
|
| 28 |
|
|
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */
|
| 29 |
|
|
/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT */
|
| 30 |
|
|
/* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; */
|
| 31 |
|
|
/* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) */
|
| 32 |
|
|
/* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN */
|
| 33 |
|
|
/* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
|
| 34 |
|
|
/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
|
| 35 |
|
|
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
|
| 36 |
|
|
/* -------------------------------------------------------------- */
|
| 37 |
|
|
/* PROLOG END TAG zYx */
|
| 38 |
|
|
#ifdef __SPU__
|
| 39 |
|
|
#ifndef _ISNAND2_H_
|
| 40 |
|
|
#define _ISNAND2_H_ 1
|
| 41 |
|
|
|
| 42 |
|
|
#include <spu_intrinsics.h>
|
| 43 |
|
|
|
| 44 |
|
|
/*
|
| 45 |
|
|
* FUNCTION
|
| 46 |
|
|
* vector unsigned long long _isnand2(vector double x)
|
| 47 |
|
|
*
|
| 48 |
|
|
* DESCRIPTION
|
| 49 |
|
|
* The _isnand2 function returns a vector in which each element indicates
|
| 50 |
|
|
* if the corresponding element of x is not a number. (NaN)
|
| 51 |
|
|
*
|
| 52 |
|
|
* RETURNS
|
| 53 |
|
|
* The function _isnand2 returns an unsigned long long vector in which
|
| 54 |
|
|
* each element is defined as:
|
| 55 |
|
|
*
|
| 56 |
|
|
* - ULLONG_MAX if the element of x is NaN
|
| 57 |
|
|
* - 0 otherwise
|
| 58 |
|
|
*
|
| 59 |
|
|
*/
|
| 60 |
|
|
static __inline vector unsigned long long _isnand2(vector double x)
|
| 61 |
|
|
{
|
| 62 |
|
|
|
| 63 |
|
|
#ifndef __SPU_EDP__
|
| 64 |
|
|
|
| 65 |
|
|
vec_uint4 sign_mask = (vec_uint4) { 0x7FFFFFFF, 0xFFFFFFFF, 0x7FFFFFFF, 0xFFFFFFFF };
|
| 66 |
|
|
vec_uint4 test_mask = (vec_uint4) { 0x7FF00000, 0x00000000, 0x7FF00000, 0x00000000 };
|
| 67 |
|
|
vec_uchar16 hi_promote = (vec_uchar16) { 0, 1, 2, 3, 0, 1, 2, 3, 8, 9, 10, 11, 8, 9, 10, 11 };
|
| 68 |
|
|
|
| 69 |
|
|
// Remove the sign bits
|
| 70 |
|
|
vec_uint4 signless = spu_and((vec_uint4)x,sign_mask);
|
| 71 |
|
|
|
| 72 |
|
|
// Check if the high word is equal to the max_exp
|
| 73 |
|
|
vec_uint4 x2 = spu_cmpeq(signless,test_mask);
|
| 74 |
|
|
|
| 75 |
|
|
// This checks two things:
|
| 76 |
|
|
// 1) If the high word is greater than max_exp (indicates a NaN)
|
| 77 |
|
|
// 2) If the low word is non-zero (indicates a NaN in conjunction with an
|
| 78 |
|
|
// exp equal to max_exp)
|
| 79 |
|
|
vec_uint4 x1 = spu_cmpgt(signless,test_mask);
|
| 80 |
|
|
|
| 81 |
|
|
// rotate the low word test of x1 into the high word slot, then and it
|
| 82 |
|
|
// with the high word of x2 (checking for #2 above)
|
| 83 |
|
|
vec_uint4 exp_and_lw = spu_and(spu_rlqwbyte(x1,4),x2);
|
| 84 |
|
|
|
| 85 |
|
|
// All the goodies are in the high words, so if the high word of either x1
|
| 86 |
|
|
// or exp_and_lw is set, then we have a NaN, so we "or" them together
|
| 87 |
|
|
vec_uint4 result = spu_or(x1,exp_and_lw);
|
| 88 |
|
|
|
| 89 |
|
|
// And then promote the resulting high word to 64 bit length
|
| 90 |
|
|
result = spu_shuffle(result,result,hi_promote);
|
| 91 |
|
|
|
| 92 |
|
|
return (vec_ullong2) result;
|
| 93 |
|
|
|
| 94 |
|
|
#else
|
| 95 |
|
|
|
| 96 |
|
|
return spu_testsv(x, SPU_SV_NAN);
|
| 97 |
|
|
|
| 98 |
|
|
#endif /* __SPU_EDP__ */
|
| 99 |
|
|
}
|
| 100 |
|
|
|
| 101 |
|
|
#endif // _ISNAND2_H_
|
| 102 |
|
|
#endif /* __SPU__ */
|
