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jeremybenn |
/*
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* The authors hereby grant permission to use, copy, modify, distribute,
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* and license this software and its documentation for any purpose, provided
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* that existing copyright notices are retained in all copies and that this
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* notice is included verbatim in any distributions. No written agreement,
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* license, or royalty fee is required for any of the authorized uses.
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* Modifications to this software may be copyrighted by their authors
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* and need not follow the licensing terms described here, provided that
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* the new terms are clearly indicated on the first page of each file where
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* they apply.
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*/
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/************************************************************************
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*
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* cdefBF561.h
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*
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* Copyright (C) 2008, 2009 Analog Devices, Inc.
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*
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************************************************************************/
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/* C POINTERS TO SYSTEM MMR REGISTER AND MEMORY MAP FOR ADSP-BF561 */
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#ifndef _CDEF_BF561_H
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#define _CDEF_BF561_H
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#if !defined(__ADSPBF561__)
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#warning cdefBF561.h should only be included for BF561 chip.
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#endif
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/* include all Core registers and bit definitions */
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#include <defBF561.h>
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#include <cdef_LPBlackfin.h>
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#ifdef _MISRA_RULES
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#pragma diag(push)
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#pragma diag(suppress:misra_rule_19_4:"some macro definitions not MISRA compliant")
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#endif /* _MISRA_RULES */
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/*********************************************************************************** */
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/* System MMR Register Map */
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/*********************************************************************************** */
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#ifndef _PTR_TO_VOL_VOID_PTR
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#ifndef _USE_LEGACY_CDEF_BEHAVIOUR
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#define _PTR_TO_VOL_VOID_PTR (void * volatile *)
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#else
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#define _PTR_TO_VOL_VOID_PTR (volatile void **)
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#endif
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#endif
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/* Clock and System Control (0xFFC00000 - 0xFFC000FF) */
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#define pPLL_CTL ((volatile unsigned short *)PLL_CTL)
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#define pPLL_DIV ((volatile unsigned short *)PLL_DIV)
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#define pVR_CTL ((volatile unsigned short *)VR_CTL)
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#define pPLL_STAT ((volatile unsigned short *)PLL_STAT)
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#define pPLL_LOCKCNT ((volatile unsigned short *)PLL_LOCKCNT)
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#define pCHIPID ((volatile unsigned long*)CHIPID)
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/* System Reset and Interrupt Controller registers for core A (0xFFC0 0100-0xFFC0 01FF) */
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#define pSICA_SWRST ((volatile unsigned short *)SICA_SWRST)
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#define pSICA_SYSCR ((volatile unsigned short *)SICA_SYSCR)
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#define pSICA_RVECT ((volatile unsigned short *)SICA_RVECT)
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#define pSICA_IMASK ((volatile unsigned long *)SICA_IMASK)
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#define pSICA_IMASK0 ((volatile unsigned long *)SICA_IMASK0)
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#define pSICA_IMASK1 ((volatile unsigned long *)SICA_IMASK1)
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#define pSICA_IAR0 ((volatile unsigned long *)SICA_IAR0)
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#define pSICA_IAR1 ((volatile unsigned long *)SICA_IAR1)
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#define pSICA_IAR2 ((volatile unsigned long *)SICA_IAR2)
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#define pSICA_IAR3 ((volatile unsigned long *)SICA_IAR3)
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#define pSICA_IAR4 ((volatile unsigned long *)SICA_IAR4)
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#define pSICA_IAR5 ((volatile unsigned long *)SICA_IAR5)
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#define pSICA_IAR6 ((volatile unsigned long *)SICA_IAR6)
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#define pSICA_IAR7 ((volatile unsigned long *)SICA_IAR7)
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#define pSICA_ISR0 ((volatile unsigned long *)SICA_ISR0)
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#define pSICA_ISR1 ((volatile unsigned long *)SICA_ISR1)
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#define pSICA_IWR0 ((volatile unsigned long *)SICA_IWR0)
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#define pSICA_IWR1 ((volatile unsigned long *)SICA_IWR1)
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/* System Reset and Interrupt Controller registers for Core B (0xFFC0 1100-0xFFC0 11FF) */
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#define pSICB_SWRST ((volatile unsigned short *)SICB_SWRST)
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#define pSICB_SYSCR ((volatile unsigned short *)SICB_SYSCR)
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#define pSICB_RVECT ((volatile unsigned short *)SICB_RVECT)
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#define pSICB_IMASK0 ((volatile unsigned long *)SICB_IMASK0)
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#define pSICB_IMASK1 ((volatile unsigned long *)SICB_IMASK1)
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#define pSICB_IAR0 ((volatile unsigned long *)SICB_IAR0)
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#define pSICB_IAR1 ((volatile unsigned long *)SICB_IAR1)
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#define pSICB_IAR2 ((volatile unsigned long *)SICB_IAR2)
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#define pSICB_IAR3 ((volatile unsigned long *)SICB_IAR3)
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#define pSICB_IAR4 ((volatile unsigned long *)SICB_IAR4)
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#define pSICB_IAR5 ((volatile unsigned long *)SICB_IAR5)
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#define pSICB_IAR6 ((volatile unsigned long *)SICB_IAR6)
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#define pSICB_IAR7 ((volatile unsigned long *)SICB_IAR7)
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#define pSICB_ISR0 ((volatile unsigned long *)SICB_ISR0)
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#define pSICB_ISR1 ((volatile unsigned long *)SICB_ISR1)
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#define pSICB_IWR0 ((volatile unsigned long *)SICB_IWR0)
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#define pSICB_IWR1 ((volatile unsigned long *)SICB_IWR1)
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/* Watchdog Timer registers for Core A (0xFFC0 0200-0xFFC0 02FF) */
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#define pWDOGA_CTL ((volatile unsigned short *)WDOGA_CTL)
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#define pWDOGA_CNT ((volatile unsigned long *)WDOGA_CNT)
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#define pWDOGA_STAT ((volatile unsigned long *)WDOGA_STAT)
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/* Watchdog Timer registers for Core B (0xFFC0 1200-0xFFC0 12FF) */
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#define pWDOGB_CTL ((volatile unsigned short *)WDOGB_CTL)
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#define pWDOGB_CNT ((volatile unsigned long *)WDOGB_CNT)
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#define pWDOGB_STAT ((volatile unsigned long *)WDOGB_STAT)
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/* UART Controller (0xFFC00400 - 0xFFC004FF) */
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#define pUART_THR ((volatile unsigned short *)UART_THR)
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#define pUART_RBR ((volatile unsigned short *)UART_RBR)
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#define pUART_DLL ((volatile unsigned short *)UART_DLL)
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#define pUART_IER ((volatile unsigned short *)UART_IER)
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#define pUART_DLH ((volatile unsigned short *)UART_DLH)
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#define pUART_IIR ((volatile unsigned short *)UART_IIR)
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#define pUART_LCR ((volatile unsigned short *)UART_LCR)
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#define pUART_MCR ((volatile unsigned short *)UART_MCR)
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#define pUART_LSR ((volatile unsigned short *)UART_LSR)
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#define pUART_MSR ((volatile unsigned short *)UART_MSR)
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#define pUART_SCR ((volatile unsigned short *)UART_SCR)
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#define pUART_GCTL ((volatile unsigned short *)UART_GCTL)
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/* SPI Controller (0xFFC00500 - 0xFFC005FF) */
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#define pSPI_CTL ((volatile unsigned short *)SPI_CTL)
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#define pSPI_FLG ((volatile unsigned short *)SPI_FLG)
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#define pSPI_STAT ((volatile unsigned short *)SPI_STAT)
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#define pSPI_TDBR ((volatile unsigned short *)SPI_TDBR)
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#define pSPI_RDBR ((volatile unsigned short *)SPI_RDBR)
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#define pSPI_BAUD ((volatile unsigned short *)SPI_BAUD)
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#define pSPI_SHADOW ((volatile unsigned short *)SPI_SHADOW)
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/* Timer 0-7 registers (0xFFC0 0600-0xFFC0 06FF) */
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#define pTIMER0_CONFIG ((volatile unsigned short *)TIMER0_CONFIG)
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#define pTIMER0_COUNTER ((volatile unsigned long *)TIMER0_COUNTER)
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#define pTIMER0_PERIOD ((volatile unsigned long *)TIMER0_PERIOD)
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#define pTIMER0_WIDTH ((volatile unsigned long *)TIMER0_WIDTH)
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#define pTIMER1_CONFIG ((volatile unsigned short *)TIMER1_CONFIG)
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#define pTIMER1_COUNTER ((volatile unsigned long *)TIMER1_COUNTER)
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#define pTIMER1_PERIOD ((volatile unsigned long *)TIMER1_PERIOD)
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#define pTIMER1_WIDTH ((volatile unsigned long *)TIMER1_WIDTH)
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#define pTIMER2_CONFIG ((volatile unsigned short *)TIMER2_CONFIG)
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#define pTIMER2_COUNTER ((volatile unsigned long *)TIMER2_COUNTER)
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#define pTIMER2_PERIOD ((volatile unsigned long *)TIMER2_PERIOD)
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#define pTIMER2_WIDTH ((volatile unsigned long *)TIMER2_WIDTH)
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#define pTIMER3_CONFIG ((volatile unsigned short *)TIMER3_CONFIG)
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#define pTIMER3_COUNTER ((volatile unsigned long *)TIMER3_COUNTER)
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#define pTIMER3_PERIOD ((volatile unsigned long *)TIMER3_PERIOD)
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#define pTIMER3_WIDTH ((volatile unsigned long *)TIMER3_WIDTH)
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#define pTIMER4_CONFIG ((volatile unsigned short *)TIMER4_CONFIG)
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#define pTIMER4_COUNTER ((volatile unsigned long *)TIMER4_COUNTER)
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#define pTIMER4_PERIOD ((volatile unsigned long *)TIMER4_PERIOD)
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#define pTIMER4_WIDTH ((volatile unsigned long *)TIMER4_WIDTH)
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#define pTIMER5_CONFIG ((volatile unsigned short *)TIMER5_CONFIG)
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#define pTIMER5_COUNTER ((volatile unsigned long *)TIMER5_COUNTER)
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#define pTIMER5_PERIOD ((volatile unsigned long *)TIMER5_PERIOD)
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#define pTIMER5_WIDTH ((volatile unsigned long *)TIMER5_WIDTH)
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#define pTIMER6_CONFIG ((volatile unsigned short *)TIMER6_CONFIG)
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#define pTIMER6_COUNTER ((volatile unsigned long *)TIMER6_COUNTER)
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#define pTIMER6_PERIOD ((volatile unsigned long *)TIMER6_PERIOD)
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#define pTIMER6_WIDTH ((volatile unsigned long *)TIMER6_WIDTH)
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#define pTIMER7_CONFIG ((volatile unsigned short *)TIMER7_CONFIG)
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#define pTIMER7_COUNTER ((volatile unsigned long *)TIMER7_COUNTER)
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#define pTIMER7_PERIOD ((volatile unsigned long *)TIMER7_PERIOD)
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#define pTIMER7_WIDTH ((volatile unsigned long *)TIMER7_WIDTH)
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/* Timer registers 8-11 (0xFFC0 1600-0xFFC0 16FF) */
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#define pTMRS8_ENABLE ((volatile unsigned short *)TMRS8_ENABLE)
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#define pTMRS8_DISABLE ((volatile unsigned short *)TMRS8_DISABLE)
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#define pTMRS8_STATUS ((volatile unsigned long *)TMRS8_STATUS)
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#define pTIMER8_CONFIG ((volatile unsigned short *)TIMER8_CONFIG)
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#define pTIMER8_COUNTER ((volatile unsigned long *)TIMER8_COUNTER)
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#define pTIMER8_PERIOD ((volatile unsigned long *)TIMER8_PERIOD)
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#define pTIMER8_WIDTH ((volatile unsigned long *)TIMER8_WIDTH)
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#define pTIMER9_CONFIG ((volatile unsigned short *)TIMER9_CONFIG)
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#define pTIMER9_COUNTER ((volatile unsigned long *)TIMER9_COUNTER)
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#define pTIMER9_PERIOD ((volatile unsigned long *)TIMER9_PERIOD)
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#define pTIMER9_WIDTH ((volatile unsigned long *)TIMER9_WIDTH)
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#define pTIMER10_CONFIG ((volatile unsigned short *)TIMER10_CONFIG)
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#define pTIMER10_COUNTER ((volatile unsigned long *)TIMER10_COUNTER)
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#define pTIMER10_PERIOD ((volatile unsigned long *)TIMER10_PERIOD)
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#define pTIMER10_WIDTH ((volatile unsigned long *)TIMER10_WIDTH)
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#define pTIMER11_CONFIG ((volatile unsigned short *)TIMER11_CONFIG)
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#define pTIMER11_COUNTER ((volatile unsigned long *)TIMER11_COUNTER)
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#define pTIMER11_PERIOD ((volatile unsigned long *)TIMER11_PERIOD)
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#define pTIMER11_WIDTH ((volatile unsigned long *)TIMER11_WIDTH)
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#define pTMRS4_ENABLE ((volatile unsigned short *)TMRS4_ENABLE)
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#define pTMRS4_DISABLE ((volatile unsigned short *)TMRS4_DISABLE)
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#define pTMRS4_STATUS ((volatile unsigned long *)TMRS4_STATUS)
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/* Programmable Flag 0 registers (0xFFC0 0700-0xFFC0 07FF) */
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#define pFIO0_FLAG_D ((volatile unsigned short *)FIO0_FLAG_D)
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#define pFIO0_FLAG_C ((volatile unsigned short *)FIO0_FLAG_C)
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#define pFIO0_FLAG_S ((volatile unsigned short *)FIO0_FLAG_S)
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#define pFIO0_FLAG_T ((volatile unsigned short *)FIO0_FLAG_T)
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#define pFIO0_MASKA_D ((volatile unsigned short *)FIO0_MASKA_D)
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#define pFIO0_MASKA_C ((volatile unsigned short *)FIO0_MASKA_C)
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#define pFIO0_MASKA_S ((volatile unsigned short *)FIO0_MASKA_S)
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#define pFIO0_MASKA_T ((volatile unsigned short *)FIO0_MASKA_T)
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#define pFIO0_MASKB_D ((volatile unsigned short *)FIO0_MASKB_D)
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#define pFIO0_MASKB_C ((volatile unsigned short *)FIO0_MASKB_C)
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#define pFIO0_MASKB_S ((volatile unsigned short *)FIO0_MASKB_S)
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#define pFIO0_MASKB_T ((volatile unsigned short *)FIO0_MASKB_T)
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#define pFIO0_DIR ((volatile unsigned short *)FIO0_DIR)
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#define pFIO0_POLAR ((volatile unsigned short *)FIO0_POLAR)
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#define pFIO0_EDGE ((volatile unsigned short *)FIO0_EDGE)
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#define pFIO0_BOTH ((volatile unsigned short *)FIO0_BOTH)
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#define pFIO0_INEN ((volatile unsigned short *)FIO0_INEN)
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/* Programmable Flag 1 registers (0xFFC0 1500-0xFFC0 15FF) */
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#define pFIO1_FLAG_D ((volatile unsigned short *)FIO1_FLAG_D)
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#define pFIO1_FLAG_C ((volatile unsigned short *)FIO1_FLAG_C)
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#define pFIO1_FLAG_S ((volatile unsigned short *)FIO1_FLAG_S)
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#define pFIO1_FLAG_T ((volatile unsigned short *)FIO1_FLAG_T)
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#define pFIO1_MASKA_D ((volatile unsigned short *)FIO1_MASKA_D)
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#define pFIO1_MASKA_C ((volatile unsigned short *)FIO1_MASKA_C)
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#define pFIO1_MASKA_S ((volatile unsigned short *)FIO1_MASKA_S)
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#define pFIO1_MASKA_T ((volatile unsigned short *)FIO1_MASKA_T)
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#define pFIO1_MASKB_D ((volatile unsigned short *)FIO1_MASKB_D)
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#define pFIO1_MASKB_C ((volatile unsigned short *)FIO1_MASKB_C)
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#define pFIO1_MASKB_S ((volatile unsigned short *)FIO1_MASKB_S)
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#define pFIO1_MASKB_T ((volatile unsigned short *)FIO1_MASKB_T)
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#define pFIO1_DIR ((volatile unsigned short *)FIO1_DIR)
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#define pFIO1_POLAR ((volatile unsigned short *)FIO1_POLAR)
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#define pFIO1_EDGE ((volatile unsigned short *)FIO1_EDGE)
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#define pFIO1_BOTH ((volatile unsigned short *)FIO1_BOTH)
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#define pFIO1_INEN ((volatile unsigned short *)FIO1_INEN)
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/* Programmable Flag registers (0xFFC0 1700-0xFFC0 17FF) */
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#define pFIO2_FLAG_D ((volatile unsigned short *)FIO2_FLAG_D)
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#define pFIO2_FLAG_C ((volatile unsigned short *)FIO2_FLAG_C)
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#define pFIO2_FLAG_S ((volatile unsigned short *)FIO2_FLAG_S)
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#define pFIO2_FLAG_T ((volatile unsigned short *)FIO2_FLAG_T)
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#define pFIO2_MASKA_D ((volatile unsigned short *)FIO2_MASKA_D)
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#define pFIO2_MASKA_C ((volatile unsigned short *)FIO2_MASKA_C)
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#define pFIO2_MASKA_S ((volatile unsigned short *)FIO2_MASKA_S)
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#define pFIO2_MASKA_T ((volatile unsigned short *)FIO2_MASKA_T)
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#define pFIO2_MASKB_D ((volatile unsigned short *)FIO2_MASKB_D)
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#define pFIO2_MASKB_C ((volatile unsigned short *)FIO2_MASKB_C)
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#define pFIO2_MASKB_S ((volatile unsigned short *)FIO2_MASKB_S)
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#define pFIO2_MASKB_T ((volatile unsigned short *)FIO2_MASKB_T)
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#define pFIO2_DIR ((volatile unsigned short *)FIO2_DIR)
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#define pFIO2_POLAR ((volatile unsigned short *)FIO2_POLAR)
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#define pFIO2_EDGE ((volatile unsigned short *)FIO2_EDGE)
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#define pFIO2_BOTH ((volatile unsigned short *)FIO2_BOTH)
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#define pFIO2_INEN ((volatile unsigned short *)FIO2_INEN)
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/* SPORT0 Controller (0xFFC00800 - 0xFFC008FF) */
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#define pSPORT0_TCR1 ((volatile unsigned short *)SPORT0_TCR1)
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#define pSPORT0_TCR2 ((volatile unsigned short *)SPORT0_TCR2)
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#define pSPORT0_TCLKDIV ((volatile unsigned short *)SPORT0_TCLKDIV)
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#define pSPORT0_TFSDIV ((volatile unsigned short *)SPORT0_TFSDIV)
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#define pSPORT0_TX ((volatile unsigned long *)SPORT0_TX)
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#define pSPORT0_RX ((volatile unsigned long *)SPORT0_RX)
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#define pSPORT0_TX32 ((volatile long *)SPORT0_TX)
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#define pSPORT0_RX32 ((volatile long *)SPORT0_RX)
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#define pSPORT0_TX16 ((volatile unsigned short *)SPORT0_TX)
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252 |
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|
#define pSPORT0_RX16 ((volatile unsigned short *)SPORT0_RX)
|
253 |
|
|
#define pSPORT0_RCR1 ((volatile unsigned short *)SPORT0_RCR1)
|
254 |
|
|
#define pSPORT0_RCR2 ((volatile unsigned short *)SPORT0_RCR2)
|
255 |
|
|
#define pSPORT0_RCLKDIV ((volatile unsigned short *)SPORT0_RCLKDIV)
|
256 |
|
|
#define pSPORT0_RFSDIV ((volatile unsigned short *)SPORT0_RFSDIV)
|
257 |
|
|
#define pSPORT0_STAT ((volatile unsigned short *)SPORT0_STAT)
|
258 |
|
|
#define pSPORT0_CHNL ((volatile unsigned short *)SPORT0_CHNL)
|
259 |
|
|
#define pSPORT0_MCMC1 ((volatile unsigned short *)SPORT0_MCMC1)
|
260 |
|
|
#define pSPORT0_MCMC2 ((volatile unsigned short *)SPORT0_MCMC2)
|
261 |
|
|
#define pSPORT0_MTCS0 ((volatile unsigned long *)SPORT0_MTCS0)
|
262 |
|
|
#define pSPORT0_MTCS1 ((volatile unsigned long *)SPORT0_MTCS1)
|
263 |
|
|
#define pSPORT0_MTCS2 ((volatile unsigned long *)SPORT0_MTCS2)
|
264 |
|
|
#define pSPORT0_MTCS3 ((volatile unsigned long *)SPORT0_MTCS3)
|
265 |
|
|
#define pSPORT0_MRCS0 ((volatile unsigned long *)SPORT0_MRCS0)
|
266 |
|
|
#define pSPORT0_MRCS1 ((volatile unsigned long *)SPORT0_MRCS1)
|
267 |
|
|
#define pSPORT0_MRCS2 ((volatile unsigned long *)SPORT0_MRCS2)
|
268 |
|
|
#define pSPORT0_MRCS3 ((volatile unsigned long *)SPORT0_MRCS3)
|
269 |
|
|
/* SPORT1 Controller (0xFFC00900 - 0xFFC009FF) */
|
270 |
|
|
#define pSPORT1_TCR1 ((volatile unsigned short *)SPORT1_TCR1)
|
271 |
|
|
#define pSPORT1_TCR2 ((volatile unsigned short *)SPORT1_TCR2)
|
272 |
|
|
#define pSPORT1_TCLKDIV ((volatile unsigned short *)SPORT1_TCLKDIV)
|
273 |
|
|
#define pSPORT1_TFSDIV ((volatile unsigned short *)SPORT1_TFSDIV)
|
274 |
|
|
#define pSPORT1_TX ((volatile unsigned long *)SPORT1_TX)
|
275 |
|
|
#define pSPORT1_RX ((volatile unsigned long *)SPORT1_RX)
|
276 |
|
|
#define pSPORT1_TX32 ((volatile long *)SPORT1_TX)
|
277 |
|
|
#define pSPORT1_RX32 ((volatile long *)SPORT1_RX)
|
278 |
|
|
#define pSPORT1_TX16 ((volatile unsigned short *)SPORT1_TX)
|
279 |
|
|
#define pSPORT1_RX16 ((volatile unsigned short *)SPORT1_RX)
|
280 |
|
|
#define pSPORT1_RCR1 ((volatile unsigned short *)SPORT1_RCR1)
|
281 |
|
|
#define pSPORT1_RCR2 ((volatile unsigned short *)SPORT1_RCR2)
|
282 |
|
|
#define pSPORT1_RCLKDIV ((volatile unsigned short *)SPORT1_RCLKDIV)
|
283 |
|
|
#define pSPORT1_RFSDIV ((volatile unsigned short *)SPORT1_RFSDIV)
|
284 |
|
|
#define pSPORT1_STAT ((volatile unsigned short *)SPORT1_STAT)
|
285 |
|
|
#define pSPORT1_CHNL ((volatile unsigned short *)SPORT1_CHNL)
|
286 |
|
|
#define pSPORT1_MCMC1 ((volatile unsigned short *)SPORT1_MCMC1)
|
287 |
|
|
#define pSPORT1_MCMC2 ((volatile unsigned short *)SPORT1_MCMC2)
|
288 |
|
|
#define pSPORT1_MTCS0 ((volatile unsigned long *)SPORT1_MTCS0)
|
289 |
|
|
#define pSPORT1_MTCS1 ((volatile unsigned long *)SPORT1_MTCS1)
|
290 |
|
|
#define pSPORT1_MTCS2 ((volatile unsigned long *)SPORT1_MTCS2)
|
291 |
|
|
#define pSPORT1_MTCS3 ((volatile unsigned long *)SPORT1_MTCS3)
|
292 |
|
|
#define pSPORT1_MRCS0 ((volatile unsigned long *)SPORT1_MRCS0)
|
293 |
|
|
#define pSPORT1_MRCS1 ((volatile unsigned long *)SPORT1_MRCS1)
|
294 |
|
|
#define pSPORT1_MRCS2 ((volatile unsigned long *)SPORT1_MRCS2)
|
295 |
|
|
#define pSPORT1_MRCS3 ((volatile unsigned long *)SPORT1_MRCS3)
|
296 |
|
|
/* Asynchronous Memory Controller - External Bus Interface Unit */
|
297 |
|
|
#define pEBIU_AMGCTL ((volatile unsigned short *)EBIU_AMGCTL)
|
298 |
|
|
#define pEBIU_AMBCTL0 ((volatile unsigned long *)EBIU_AMBCTL0)
|
299 |
|
|
#define pEBIU_AMBCTL1 ((volatile unsigned long *)EBIU_AMBCTL1)
|
300 |
|
|
/* SDRAM Controller External Bus Interface Unit (0xFFC00A00 - 0xFFC00AFF) */
|
301 |
|
|
#define pEBIU_SDGCTL ((volatile unsigned long *)EBIU_SDGCTL)
|
302 |
|
|
#define pEBIU_SDBCTL ((volatile unsigned long *)EBIU_SDBCTL)
|
303 |
|
|
#define pEBIU_SDRRC ((volatile unsigned short *)EBIU_SDRRC)
|
304 |
|
|
#define pEBIU_SDSTAT ((volatile unsigned short *)EBIU_SDSTAT)
|
305 |
|
|
/* Parallel Peripheral Interface (PPI) 0 registers (0xFFC0 1000-0xFFC0 10FF) */
|
306 |
|
|
#define pPPI0_CONTROL ((volatile unsigned short *)PPI0_CONTROL)
|
307 |
|
|
#define pPPI0_STATUS ((volatile unsigned short *)PPI0_STATUS)
|
308 |
|
|
#define pPPI0_COUNT ((volatile unsigned short *)PPI0_COUNT)
|
309 |
|
|
#define pPPI0_DELAY ((volatile unsigned short *)PPI0_DELAY)
|
310 |
|
|
#define pPPI0_FRAME ((volatile unsigned short *)PPI0_FRAME)
|
311 |
|
|
/* Parallel Peripheral Interface (PPI) 1 registers (0xFFC0 1300-0xFFC0 13FF) */
|
312 |
|
|
#define pPPI1_CONTROL ((volatile unsigned short *)PPI1_CONTROL)
|
313 |
|
|
#define pPPI1_STATUS ((volatile unsigned short *)PPI1_STATUS)
|
314 |
|
|
#define pPPI1_COUNT ((volatile unsigned short *)PPI1_COUNT)
|
315 |
|
|
#define pPPI1_DELAY ((volatile unsigned short *)PPI1_DELAY)
|
316 |
|
|
#define pPPI1_FRAME ((volatile unsigned short *)PPI1_FRAME)
|
317 |
|
|
/*DMA traffic control registers */
|
318 |
|
|
#define pDMA1_TC_PER ((volatile unsigned short *)DMA1_TC_PER)
|
319 |
|
|
#define pDMA1_TC_CNT ((volatile unsigned short *)DMA1_TC_CNT)
|
320 |
|
|
#define pDMA2_TC_PER ((volatile unsigned short *)DMA2_TC_PER)
|
321 |
|
|
#define pDMA2_TC_CNT ((volatile unsigned short *)DMA2_TC_CNT)
|
322 |
|
|
/* DMA1 Controller registers (0xFFC0 1C00-0xFFC0 1FFF) */
|
323 |
|
|
#define pDMA1_0_CONFIG ((volatile unsigned short *)DMA1_0_CONFIG)
|
324 |
|
|
#define pDMA1_0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_0_NEXT_DESC_PTR)
|
325 |
|
|
#define pDMA1_0_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_0_START_ADDR)
|
326 |
|
|
#define pDMA1_0_X_COUNT ((volatile unsigned short *)DMA1_0_X_COUNT)
|
327 |
|
|
#define pDMA1_0_Y_COUNT ((volatile unsigned short *)DMA1_0_Y_COUNT)
|
328 |
|
|
#define pDMA1_0_X_MODIFY (volatile signed short *)DMA1_0_X_MODIFY
|
329 |
|
|
#define pDMA1_0_Y_MODIFY (volatile signed short *)DMA1_0_Y_MODIFY
|
330 |
|
|
#define pDMA1_0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_0_CURR_DESC_PTR)
|
331 |
|
|
#define pDMA1_0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_0_CURR_ADDR)
|
332 |
|
|
#define pDMA1_0_CURR_X_COUNT ((volatile unsigned short *)DMA1_0_CURR_X_COUNT)
|
333 |
|
|
#define pDMA1_0_CURR_Y_COUNT ((volatile unsigned short *)DMA1_0_CURR_Y_COUNT)
|
334 |
|
|
#define pDMA1_0_IRQ_STATUS ((volatile unsigned short *)DMA1_0_IRQ_STATUS)
|
335 |
|
|
#define pDMA1_0_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_0_PERIPHERAL_MAP)
|
336 |
|
|
#define pDMA1_1_CONFIG ((volatile unsigned short *)DMA1_1_CONFIG)
|
337 |
|
|
#define pDMA1_1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_1_NEXT_DESC_PTR)
|
338 |
|
|
#define pDMA1_1_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_1_START_ADDR)
|
339 |
|
|
#define pDMA1_1_X_COUNT ((volatile unsigned short *)DMA1_1_X_COUNT)
|
340 |
|
|
#define pDMA1_1_Y_COUNT ((volatile unsigned short *)DMA1_1_Y_COUNT)
|
341 |
|
|
#define pDMA1_1_X_MODIFY (volatile signed short *)DMA1_1_X_MODIFY
|
342 |
|
|
#define pDMA1_1_Y_MODIFY (volatile signed short *)DMA1_1_Y_MODIFY
|
343 |
|
|
#define pDMA1_1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_1_CURR_DESC_PTR)
|
344 |
|
|
#define pDMA1_1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_1_CURR_ADDR)
|
345 |
|
|
#define pDMA1_1_CURR_X_COUNT ((volatile unsigned short *)DMA1_1_CURR_X_COUNT)
|
346 |
|
|
#define pDMA1_1_CURR_Y_COUNT ((volatile unsigned short *)DMA1_1_CURR_Y_COUNT)
|
347 |
|
|
#define pDMA1_1_IRQ_STATUS ((volatile unsigned short *)DMA1_1_IRQ_STATUS)
|
348 |
|
|
#define pDMA1_1_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_1_PERIPHERAL_MAP)
|
349 |
|
|
#define pDMA1_2_CONFIG ((volatile unsigned short *)DMA1_2_CONFIG)
|
350 |
|
|
#define pDMA1_2_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_2_NEXT_DESC_PTR)
|
351 |
|
|
#define pDMA1_2_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_2_START_ADDR)
|
352 |
|
|
#define pDMA1_2_X_COUNT ((volatile unsigned short *)DMA1_2_X_COUNT)
|
353 |
|
|
#define pDMA1_2_Y_COUNT ((volatile unsigned short *)DMA1_2_Y_COUNT)
|
354 |
|
|
#define pDMA1_2_X_MODIFY (volatile signed short *)DMA1_2_X_MODIFY
|
355 |
|
|
#define pDMA1_2_Y_MODIFY (volatile signed short *)DMA1_2_Y_MODIFY
|
356 |
|
|
#define pDMA1_2_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_2_CURR_DESC_PTR)
|
357 |
|
|
#define pDMA1_2_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_2_CURR_ADDR)
|
358 |
|
|
#define pDMA1_2_CURR_X_COUNT ((volatile unsigned short *)DMA1_2_CURR_X_COUNT)
|
359 |
|
|
#define pDMA1_2_CURR_Y_COUNT ((volatile unsigned short *)DMA1_2_CURR_Y_COUNT)
|
360 |
|
|
#define pDMA1_2_IRQ_STATUS ((volatile unsigned short *)DMA1_2_IRQ_STATUS)
|
361 |
|
|
#define pDMA1_2_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_2_PERIPHERAL_MAP)
|
362 |
|
|
#define pDMA1_3_CONFIG ((volatile unsigned short *)DMA1_3_CONFIG)
|
363 |
|
|
#define pDMA1_3_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_3_NEXT_DESC_PTR)
|
364 |
|
|
#define pDMA1_3_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_3_START_ADDR)
|
365 |
|
|
#define pDMA1_3_X_COUNT ((volatile unsigned short *)DMA1_3_X_COUNT)
|
366 |
|
|
#define pDMA1_3_Y_COUNT ((volatile unsigned short *)DMA1_3_Y_COUNT)
|
367 |
|
|
#define pDMA1_3_X_MODIFY (volatile signed short *)DMA1_3_X_MODIFY
|
368 |
|
|
#define pDMA1_3_Y_MODIFY (volatile signed short *)DMA1_3_Y_MODIFY
|
369 |
|
|
#define pDMA1_3_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_3_CURR_DESC_PTR)
|
370 |
|
|
#define pDMA1_3_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_3_CURR_ADDR)
|
371 |
|
|
#define pDMA1_3_CURR_X_COUNT ((volatile unsigned short *)DMA1_3_CURR_X_COUNT)
|
372 |
|
|
#define pDMA1_3_CURR_Y_COUNT ((volatile unsigned short *)DMA1_3_CURR_Y_COUNT)
|
373 |
|
|
#define pDMA1_3_IRQ_STATUS ((volatile unsigned short *)DMA1_3_IRQ_STATUS)
|
374 |
|
|
#define pDMA1_3_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_3_PERIPHERAL_MAP)
|
375 |
|
|
#define pDMA1_4_CONFIG ((volatile unsigned short *)DMA1_4_CONFIG)
|
376 |
|
|
#define pDMA1_4_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_4_NEXT_DESC_PTR)
|
377 |
|
|
#define pDMA1_4_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_4_START_ADDR)
|
378 |
|
|
#define pDMA1_4_X_COUNT ((volatile unsigned short *)DMA1_4_X_COUNT)
|
379 |
|
|
#define pDMA1_4_Y_COUNT ((volatile unsigned short *)DMA1_4_Y_COUNT)
|
380 |
|
|
#define pDMA1_4_X_MODIFY (volatile signed short *)DMA1_4_X_MODIFY
|
381 |
|
|
#define pDMA1_4_Y_MODIFY (volatile signed short *)DMA1_4_Y_MODIFY
|
382 |
|
|
#define pDMA1_4_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_4_CURR_DESC_PTR)
|
383 |
|
|
#define pDMA1_4_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_4_CURR_ADDR)
|
384 |
|
|
#define pDMA1_4_CURR_X_COUNT ((volatile unsigned short *)DMA1_4_CURR_X_COUNT)
|
385 |
|
|
#define pDMA1_4_CURR_Y_COUNT ((volatile unsigned short *)DMA1_4_CURR_Y_COUNT)
|
386 |
|
|
#define pDMA1_4_IRQ_STATUS ((volatile unsigned short *)DMA1_4_IRQ_STATUS)
|
387 |
|
|
#define pDMA1_4_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_4_PERIPHERAL_MAP)
|
388 |
|
|
#define pDMA1_5_CONFIG ((volatile unsigned short *)DMA1_5_CONFIG)
|
389 |
|
|
#define pDMA1_5_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_5_NEXT_DESC_PTR)
|
390 |
|
|
#define pDMA1_5_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_5_START_ADDR)
|
391 |
|
|
#define pDMA1_5_X_COUNT ((volatile unsigned short *)DMA1_5_X_COUNT)
|
392 |
|
|
#define pDMA1_5_Y_COUNT ((volatile unsigned short *)DMA1_5_Y_COUNT)
|
393 |
|
|
#define pDMA1_5_X_MODIFY (volatile signed short *)DMA1_5_X_MODIFY
|
394 |
|
|
#define pDMA1_5_Y_MODIFY (volatile signed short *)DMA1_5_Y_MODIFY
|
395 |
|
|
#define pDMA1_5_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_5_CURR_DESC_PTR)
|
396 |
|
|
#define pDMA1_5_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_5_CURR_ADDR)
|
397 |
|
|
#define pDMA1_5_CURR_X_COUNT ((volatile unsigned short *)DMA1_5_CURR_X_COUNT)
|
398 |
|
|
#define pDMA1_5_CURR_Y_COUNT ((volatile unsigned short *)DMA1_5_CURR_Y_COUNT)
|
399 |
|
|
#define pDMA1_5_IRQ_STATUS ((volatile unsigned short *)DMA1_5_IRQ_STATUS)
|
400 |
|
|
#define pDMA1_5_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_5_PERIPHERAL_MAP)
|
401 |
|
|
#define pDMA1_6_CONFIG ((volatile unsigned short *)DMA1_6_CONFIG)
|
402 |
|
|
#define pDMA1_6_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_6_NEXT_DESC_PTR)
|
403 |
|
|
#define pDMA1_6_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_6_START_ADDR)
|
404 |
|
|
#define pDMA1_6_X_COUNT ((volatile unsigned short *)DMA1_6_X_COUNT)
|
405 |
|
|
#define pDMA1_6_Y_COUNT ((volatile unsigned short *)DMA1_6_Y_COUNT)
|
406 |
|
|
#define pDMA1_6_X_MODIFY (volatile signed short *)DMA1_6_X_MODIFY
|
407 |
|
|
#define pDMA1_6_Y_MODIFY (volatile signed short *)DMA1_6_Y_MODIFY
|
408 |
|
|
#define pDMA1_6_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_6_CURR_DESC_PTR)
|
409 |
|
|
#define pDMA1_6_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_6_CURR_ADDR)
|
410 |
|
|
#define pDMA1_6_CURR_X_COUNT ((volatile unsigned short *)DMA1_6_CURR_X_COUNT)
|
411 |
|
|
#define pDMA1_6_CURR_Y_COUNT ((volatile unsigned short *)DMA1_6_CURR_Y_COUNT)
|
412 |
|
|
#define pDMA1_6_IRQ_STATUS ((volatile unsigned short *)DMA1_6_IRQ_STATUS)
|
413 |
|
|
#define pDMA1_6_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_6_PERIPHERAL_MAP)
|
414 |
|
|
#define pDMA1_7_CONFIG ((volatile unsigned short *)DMA1_7_CONFIG)
|
415 |
|
|
#define pDMA1_7_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_7_NEXT_DESC_PTR)
|
416 |
|
|
#define pDMA1_7_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_7_START_ADDR)
|
417 |
|
|
#define pDMA1_7_X_COUNT ((volatile unsigned short *)DMA1_7_X_COUNT)
|
418 |
|
|
#define pDMA1_7_Y_COUNT ((volatile unsigned short *)DMA1_7_Y_COUNT)
|
419 |
|
|
#define pDMA1_7_X_MODIFY (volatile signed short *)DMA1_7_X_MODIFY
|
420 |
|
|
#define pDMA1_7_Y_MODIFY (volatile signed short *)DMA1_7_Y_MODIFY
|
421 |
|
|
#define pDMA1_7_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_7_CURR_DESC_PTR)
|
422 |
|
|
#define pDMA1_7_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_7_CURR_ADDR)
|
423 |
|
|
#define pDMA1_7_CURR_X_COUNT ((volatile unsigned short *)DMA1_7_CURR_X_COUNT)
|
424 |
|
|
#define pDMA1_7_CURR_Y_COUNT ((volatile unsigned short *)DMA1_7_CURR_Y_COUNT)
|
425 |
|
|
#define pDMA1_7_IRQ_STATUS ((volatile unsigned short *)DMA1_7_IRQ_STATUS)
|
426 |
|
|
#define pDMA1_7_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_7_PERIPHERAL_MAP)
|
427 |
|
|
#define pDMA1_8_CONFIG ((volatile unsigned short *)DMA1_8_CONFIG)
|
428 |
|
|
#define pDMA1_8_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_8_NEXT_DESC_PTR)
|
429 |
|
|
#define pDMA1_8_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_8_START_ADDR)
|
430 |
|
|
#define pDMA1_8_X_COUNT ((volatile unsigned short *)DMA1_8_X_COUNT)
|
431 |
|
|
#define pDMA1_8_Y_COUNT ((volatile unsigned short *)DMA1_8_Y_COUNT)
|
432 |
|
|
#define pDMA1_8_X_MODIFY (volatile signed short *)DMA1_8_X_MODIFY
|
433 |
|
|
#define pDMA1_8_Y_MODIFY (volatile signed short *)DMA1_8_Y_MODIFY
|
434 |
|
|
#define pDMA1_8_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_8_CURR_DESC_PTR)
|
435 |
|
|
#define pDMA1_8_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_8_CURR_ADDR)
|
436 |
|
|
#define pDMA1_8_CURR_X_COUNT ((volatile unsigned short *)DMA1_8_CURR_X_COUNT)
|
437 |
|
|
#define pDMA1_8_CURR_Y_COUNT ((volatile unsigned short *)DMA1_8_CURR_Y_COUNT)
|
438 |
|
|
#define pDMA1_8_IRQ_STATUS ((volatile unsigned short *)DMA1_8_IRQ_STATUS)
|
439 |
|
|
#define pDMA1_8_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_8_PERIPHERAL_MAP)
|
440 |
|
|
#define pDMA1_9_CONFIG ((volatile unsigned short *)DMA1_9_CONFIG)
|
441 |
|
|
#define pDMA1_9_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_9_NEXT_DESC_PTR)
|
442 |
|
|
#define pDMA1_9_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_9_START_ADDR)
|
443 |
|
|
#define pDMA1_9_X_COUNT ((volatile unsigned short *)DMA1_9_X_COUNT)
|
444 |
|
|
#define pDMA1_9_Y_COUNT ((volatile unsigned short *)DMA1_9_Y_COUNT)
|
445 |
|
|
#define pDMA1_9_X_MODIFY (volatile signed short *)DMA1_9_X_MODIFY
|
446 |
|
|
#define pDMA1_9_Y_MODIFY (volatile signed short *)DMA1_9_Y_MODIFY
|
447 |
|
|
#define pDMA1_9_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_9_CURR_DESC_PTR)
|
448 |
|
|
#define pDMA1_9_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_9_CURR_ADDR)
|
449 |
|
|
#define pDMA1_9_CURR_X_COUNT ((volatile unsigned short *)DMA1_9_CURR_X_COUNT)
|
450 |
|
|
#define pDMA1_9_CURR_Y_COUNT ((volatile unsigned short *)DMA1_9_CURR_Y_COUNT)
|
451 |
|
|
#define pDMA1_9_IRQ_STATUS ((volatile unsigned short *)DMA1_9_IRQ_STATUS)
|
452 |
|
|
#define pDMA1_9_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_9_PERIPHERAL_MAP)
|
453 |
|
|
#define pDMA1_10_CONFIG ((volatile unsigned short *)DMA1_10_CONFIG)
|
454 |
|
|
#define pDMA1_10_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_10_NEXT_DESC_PTR)
|
455 |
|
|
#define pDMA1_10_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_10_START_ADDR)
|
456 |
|
|
#define pDMA1_10_X_COUNT ((volatile unsigned short *)DMA1_10_X_COUNT)
|
457 |
|
|
#define pDMA1_10_Y_COUNT ((volatile unsigned short *)DMA1_10_Y_COUNT)
|
458 |
|
|
#define pDMA1_10_X_MODIFY (volatile signed short *)DMA1_10_X_MODIFY
|
459 |
|
|
#define pDMA1_10_Y_MODIFY (volatile signed short *)DMA1_10_Y_MODIFY
|
460 |
|
|
#define pDMA1_10_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_10_CURR_DESC_PTR)
|
461 |
|
|
#define pDMA1_10_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_10_CURR_ADDR)
|
462 |
|
|
#define pDMA1_10_CURR_X_COUNT ((volatile unsigned short *)DMA1_10_CURR_X_COUNT)
|
463 |
|
|
#define pDMA1_10_CURR_Y_COUNT ((volatile unsigned short *)DMA1_10_CURR_Y_COUNT)
|
464 |
|
|
#define pDMA1_10_IRQ_STATUS ((volatile unsigned short *)DMA1_10_IRQ_STATUS)
|
465 |
|
|
#define pDMA1_10_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_10_PERIPHERAL_MAP)
|
466 |
|
|
#define pDMA1_11_CONFIG ((volatile unsigned short *)DMA1_11_CONFIG)
|
467 |
|
|
#define pDMA1_11_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_11_NEXT_DESC_PTR)
|
468 |
|
|
#define pDMA1_11_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_11_START_ADDR)
|
469 |
|
|
#define pDMA1_11_X_COUNT ((volatile unsigned short *)DMA1_11_X_COUNT)
|
470 |
|
|
#define pDMA1_11_Y_COUNT ((volatile unsigned short *)DMA1_11_Y_COUNT)
|
471 |
|
|
#define pDMA1_11_X_MODIFY (volatile signed short *)DMA1_11_X_MODIFY
|
472 |
|
|
#define pDMA1_11_Y_MODIFY (volatile signed short *)DMA1_11_Y_MODIFY
|
473 |
|
|
#define pDMA1_11_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_11_CURR_DESC_PTR)
|
474 |
|
|
#define pDMA1_11_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_11_CURR_ADDR)
|
475 |
|
|
#define pDMA1_11_CURR_X_COUNT ((volatile unsigned short *)DMA1_11_CURR_X_COUNT)
|
476 |
|
|
#define pDMA1_11_CURR_Y_COUNT ((volatile unsigned short *)DMA1_11_CURR_Y_COUNT)
|
477 |
|
|
#define pDMA1_11_IRQ_STATUS ((volatile unsigned short *)DMA1_11_IRQ_STATUS)
|
478 |
|
|
#define pDMA1_11_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_11_PERIPHERAL_MAP)
|
479 |
|
|
/* Memory DMA1 Controller registers (0xFFC0 1E80-0xFFC0 1FFF) */
|
480 |
|
|
#define pMDMA1_D0_CONFIG ((volatile unsigned short *)MDMA1_D0_CONFIG)
|
481 |
|
|
#define pMDMA1_D0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_D0_NEXT_DESC_PTR)
|
482 |
|
|
#define pMDMA1_D0_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA1_D0_START_ADDR)
|
483 |
|
|
#define pMDMA1_D0_X_COUNT ((volatile unsigned short *)MDMA1_D0_X_COUNT)
|
484 |
|
|
#define pMDMA1_D0_Y_COUNT ((volatile unsigned short *)MDMA1_D0_Y_COUNT)
|
485 |
|
|
#define pMDMA1_D0_X_MODIFY (volatile signed short *)MDMA1_D0_X_MODIFY
|
486 |
|
|
#define pMDMA1_D0_Y_MODIFY (volatile signed short *)MDMA1_D0_Y_MODIFY
|
487 |
|
|
#define pMDMA1_D0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_D0_CURR_DESC_PTR)
|
488 |
|
|
#define pMDMA1_D0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA1_D0_CURR_ADDR)
|
489 |
|
|
#define pMDMA1_D0_CURR_X_COUNT ((volatile unsigned short *)MDMA1_D0_CURR_X_COUNT )
|
490 |
|
|
#define pMDMA1_D0_CURR_Y_COUNT ((volatile unsigned short *)MDMA1_D0_CURR_Y_COUNT)
|
491 |
|
|
#define pMDMA1_D0_IRQ_STATUS ((volatile unsigned short *)MDMA1_D0_IRQ_STATUS)
|
492 |
|
|
#define pMDMA1_D0_PERIPHERAL_MAP ((volatile unsigned short *)MDMA1_D0_PERIPHERAL_MAP)
|
493 |
|
|
#define pMDMA1_S0_CONFIG ((volatile unsigned short *)MDMA1_S0_CONFIG)
|
494 |
|
|
#define pMDMA1_S0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_S0_NEXT_DESC_PTR)
|
495 |
|
|
#define pMDMA1_S0_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA1_S0_START_ADDR)
|
496 |
|
|
#define pMDMA1_S0_X_COUNT ((volatile unsigned short *)MDMA1_S0_X_COUNT)
|
497 |
|
|
#define pMDMA1_S0_Y_COUNT ((volatile unsigned short *)MDMA1_S0_Y_COUNT)
|
498 |
|
|
#define pMDMA1_S0_X_MODIFY (volatile signed short *)MDMA1_S0_X_MODIFY
|
499 |
|
|
#define pMDMA1_S0_Y_MODIFY (volatile signed short *)MDMA1_S0_Y_MODIFY
|
500 |
|
|
#define pMDMA1_S0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_S0_CURR_DESC_PTR)
|
501 |
|
|
#define pMDMA1_S0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA1_S0_CURR_ADDR)
|
502 |
|
|
#define pMDMA1_S0_CURR_X_COUNT ((volatile unsigned short *)MDMA1_S0_CURR_X_COUNT)
|
503 |
|
|
#define pMDMA1_S0_CURR_Y_COUNT ((volatile unsigned short *)MDMA1_S0_CURR_Y_COUNT)
|
504 |
|
|
#define pMDMA1_S0_IRQ_STATUS ((volatile unsigned short *)MDMA1_S0_IRQ_STATUS)
|
505 |
|
|
#define pMDMA1_S0_PERIPHERAL_MAP ((volatile unsigned short *)MDMA1_S0_PERIPHERAL_MAP)
|
506 |
|
|
#define pMDMA1_D1_CONFIG ((volatile unsigned short *)MDMA1_D1_CONFIG)
|
507 |
|
|
#define pMDMA1_D1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_D1_NEXT_DESC_PTR)
|
508 |
|
|
#define pMDMA1_D1_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA1_D1_START_ADDR)
|
509 |
|
|
#define pMDMA1_D1_X_COUNT ((volatile unsigned short *)MDMA1_D1_X_COUNT)
|
510 |
|
|
#define pMDMA1_D1_Y_COUNT ((volatile unsigned short *)MDMA1_D1_Y_COUNT)
|
511 |
|
|
#define pMDMA1_D1_X_MODIFY (volatile signed short *)MDMA1_D1_X_MODIFY
|
512 |
|
|
#define pMDMA1_D1_Y_MODIFY (volatile signed short *)MDMA1_D1_Y_MODIFY
|
513 |
|
|
#define pMDMA1_D1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_D1_CURR_DESC_PTR)
|
514 |
|
|
#define pMDMA1_D1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA1_D1_CURR_ADDR)
|
515 |
|
|
#define pMDMA1_D1_CURR_X_COUNT ((volatile unsigned short *)MDMA1_D1_CURR_X_COUNT)
|
516 |
|
|
#define pMDMA1_D1_CURR_Y_COUNT ((volatile unsigned short *)MDMA1_D1_CURR_Y_COUNT)
|
517 |
|
|
#define pMDMA1_D1_IRQ_STATUS ((volatile unsigned short *)MDMA1_D1_IRQ_STATUS)
|
518 |
|
|
#define pMDMA1_D1_PERIPHERAL_MAP ((volatile unsigned short *)MDMA1_D1_PERIPHERAL_MAP)
|
519 |
|
|
#define pMDMA1_S1_CONFIG ((volatile unsigned short *)MDMA1_S1_CONFIG)
|
520 |
|
|
#define pMDMA1_S1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_S1_NEXT_DESC_PTR)
|
521 |
|
|
#define pMDMA1_S1_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA1_S1_START_ADDR)
|
522 |
|
|
#define pMDMA1_S1_X_COUNT ((volatile unsigned short *)MDMA1_S1_X_COUNT)
|
523 |
|
|
#define pMDMA1_S1_Y_COUNT ((volatile unsigned short *)MDMA1_S1_Y_COUNT)
|
524 |
|
|
#define pMDMA1_S1_X_MODIFY (volatile signed short *)MDMA1_S1_X_MODIFY
|
525 |
|
|
#define pMDMA1_S1_Y_MODIFY (volatile signed short *)MDMA1_S1_Y_MODIFY
|
526 |
|
|
#define pMDMA1_S1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_S1_CURR_DESC_PTR)
|
527 |
|
|
#define pMDMA1_S1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA1_S1_CURR_ADDR)
|
528 |
|
|
#define pMDMA1_S1_CURR_X_COUNT ((volatile unsigned short *)MDMA1_S1_CURR_X_COUNT)
|
529 |
|
|
#define pMDMA1_S1_CURR_Y_COUNT ((volatile unsigned short *)MDMA1_S1_CURR_Y_COUNT)
|
530 |
|
|
#define pMDMA1_S1_IRQ_STATUS ((volatile unsigned short *)MDMA1_S1_IRQ_STATUS)
|
531 |
|
|
#define pMDMA1_S1_PERIPHERAL_MAP ((volatile unsigned short *)MDMA1_S1_PERIPHERAL_MAP)
|
532 |
|
|
/* DMA2 Controller registers (0xFFC0 0C00-0xFFC0 0DFF) */
|
533 |
|
|
#define pDMA2_0_CONFIG ((volatile unsigned short *)DMA2_0_CONFIG)
|
534 |
|
|
#define pDMA2_0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_0_NEXT_DESC_PTR)
|
535 |
|
|
#define pDMA2_0_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_0_START_ADDR)
|
536 |
|
|
#define pDMA2_0_X_COUNT ((volatile unsigned short *)DMA2_0_X_COUNT)
|
537 |
|
|
#define pDMA2_0_Y_COUNT ((volatile unsigned short *)DMA2_0_Y_COUNT)
|
538 |
|
|
#define pDMA2_0_X_MODIFY (volatile signed short *)DMA2_0_X_MODIFY
|
539 |
|
|
#define pDMA2_0_Y_MODIFY (volatile signed short *)DMA2_0_Y_MODIFY
|
540 |
|
|
#define pDMA2_0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_0_CURR_DESC_PTR)
|
541 |
|
|
#define pDMA2_0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_0_CURR_ADDR)
|
542 |
|
|
#define pDMA2_0_CURR_X_COUNT ((volatile unsigned short *)DMA2_0_CURR_X_COUNT)
|
543 |
|
|
#define pDMA2_0_CURR_Y_COUNT ((volatile unsigned short *)DMA2_0_CURR_Y_COUNT)
|
544 |
|
|
#define pDMA2_0_IRQ_STATUS ((volatile unsigned short *)DMA2_0_IRQ_STATUS)
|
545 |
|
|
#define pDMA2_0_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_0_PERIPHERAL_MAP)
|
546 |
|
|
#define pDMA2_1_CONFIG ((volatile unsigned short *)DMA2_1_CONFIG)
|
547 |
|
|
#define pDMA2_1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_1_NEXT_DESC_PTR)
|
548 |
|
|
#define pDMA2_1_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_1_START_ADDR)
|
549 |
|
|
#define pDMA2_1_X_COUNT ((volatile unsigned short *)DMA2_1_X_COUNT)
|
550 |
|
|
#define pDMA2_1_Y_COUNT ((volatile unsigned short *)DMA2_1_Y_COUNT)
|
551 |
|
|
#define pDMA2_1_X_MODIFY (volatile signed short *)DMA2_1_X_MODIFY
|
552 |
|
|
#define pDMA2_1_Y_MODIFY (volatile signed short *)DMA2_1_Y_MODIFY
|
553 |
|
|
#define pDMA2_1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_1_CURR_DESC_PTR)
|
554 |
|
|
#define pDMA2_1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_1_CURR_ADDR)
|
555 |
|
|
#define pDMA2_1_CURR_X_COUNT ((volatile unsigned short *)DMA2_1_CURR_X_COUNT)
|
556 |
|
|
#define pDMA2_1_CURR_Y_COUNT ((volatile unsigned short *)DMA2_1_CURR_Y_COUNT)
|
557 |
|
|
#define pDMA2_1_IRQ_STATUS ((volatile unsigned short *)DMA2_1_IRQ_STATUS)
|
558 |
|
|
#define pDMA2_1_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_1_PERIPHERAL_MAP)
|
559 |
|
|
#define pDMA2_2_CONFIG ((volatile unsigned short *)DMA2_2_CONFIG)
|
560 |
|
|
#define pDMA2_2_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_2_NEXT_DESC_PTR)
|
561 |
|
|
#define pDMA2_2_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_2_START_ADDR)
|
562 |
|
|
#define pDMA2_2_X_COUNT ((volatile unsigned short *)DMA2_2_X_COUNT)
|
563 |
|
|
#define pDMA2_2_Y_COUNT ((volatile unsigned short *)DMA2_2_Y_COUNT)
|
564 |
|
|
#define pDMA2_2_X_MODIFY (volatile signed short *)DMA2_2_X_MODIFY
|
565 |
|
|
#define pDMA2_2_Y_MODIFY (volatile signed short *)DMA2_2_Y_MODIFY
|
566 |
|
|
#define pDMA2_2_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_2_CURR_DESC_PTR)
|
567 |
|
|
#define pDMA2_2_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_2_CURR_ADDR)
|
568 |
|
|
#define pDMA2_2_CURR_X_COUNT ((volatile unsigned short *)DMA2_2_CURR_X_COUNT)
|
569 |
|
|
#define pDMA2_2_CURR_Y_COUNT ((volatile unsigned short *)DMA2_2_CURR_Y_COUNT)
|
570 |
|
|
#define pDMA2_2_IRQ_STATUS ((volatile unsigned short *)DMA2_2_IRQ_STATUS)
|
571 |
|
|
#define pDMA2_2_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_2_PERIPHERAL_MAP)
|
572 |
|
|
#define pDMA2_3_CONFIG ((volatile unsigned short *)DMA2_3_CONFIG)
|
573 |
|
|
#define pDMA2_3_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_3_NEXT_DESC_PTR)
|
574 |
|
|
#define pDMA2_3_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_3_START_ADDR)
|
575 |
|
|
#define pDMA2_3_X_COUNT ((volatile unsigned short *)DMA2_3_X_COUNT)
|
576 |
|
|
#define pDMA2_3_Y_COUNT ((volatile unsigned short *)DMA2_3_Y_COUNT)
|
577 |
|
|
#define pDMA2_3_X_MODIFY (volatile signed short *)DMA2_3_X_MODIFY
|
578 |
|
|
#define pDMA2_3_Y_MODIFY (volatile signed short *)DMA2_3_Y_MODIFY
|
579 |
|
|
#define pDMA2_3_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_3_CURR_DESC_PTR)
|
580 |
|
|
#define pDMA2_3_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_3_CURR_ADDR)
|
581 |
|
|
#define pDMA2_3_CURR_X_COUNT ((volatile unsigned short *)DMA2_3_CURR_X_COUNT)
|
582 |
|
|
#define pDMA2_3_CURR_Y_COUNT ((volatile unsigned short *)DMA2_3_CURR_Y_COUNT)
|
583 |
|
|
#define pDMA2_3_IRQ_STATUS ((volatile unsigned short *)DMA2_3_IRQ_STATUS)
|
584 |
|
|
#define pDMA2_3_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_3_PERIPHERAL_MAP)
|
585 |
|
|
#define pDMA2_4_CONFIG ((volatile unsigned short *)DMA2_4_CONFIG)
|
586 |
|
|
#define pDMA2_4_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_4_NEXT_DESC_PTR)
|
587 |
|
|
#define pDMA2_4_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_4_START_ADDR)
|
588 |
|
|
#define pDMA2_4_X_COUNT ((volatile unsigned short *)DMA2_4_X_COUNT)
|
589 |
|
|
#define pDMA2_4_Y_COUNT ((volatile unsigned short *)DMA2_4_Y_COUNT)
|
590 |
|
|
#define pDMA2_4_X_MODIFY (volatile signed short *)DMA2_4_X_MODIFY
|
591 |
|
|
#define pDMA2_4_Y_MODIFY (volatile signed short *)DMA2_4_Y_MODIFY
|
592 |
|
|
#define pDMA2_4_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_4_CURR_DESC_PTR)
|
593 |
|
|
#define pDMA2_4_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_4_CURR_ADDR)
|
594 |
|
|
#define pDMA2_4_CURR_X_COUNT ((volatile unsigned short *)DMA2_4_CURR_X_COUNT)
|
595 |
|
|
#define pDMA2_4_CURR_Y_COUNT ((volatile unsigned short *)DMA2_4_CURR_Y_COUNT)
|
596 |
|
|
#define pDMA2_4_IRQ_STATUS ((volatile unsigned short *)DMA2_4_IRQ_STATUS)
|
597 |
|
|
#define pDMA2_4_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_4_PERIPHERAL_MAP)
|
598 |
|
|
#define pDMA2_5_CONFIG ((volatile unsigned short *)DMA2_5_CONFIG)
|
599 |
|
|
#define pDMA2_5_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_5_NEXT_DESC_PTR)
|
600 |
|
|
#define pDMA2_5_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_5_START_ADDR)
|
601 |
|
|
#define pDMA2_5_X_COUNT ((volatile unsigned short *)DMA2_5_X_COUNT)
|
602 |
|
|
#define pDMA2_5_Y_COUNT ((volatile unsigned short *)DMA2_5_Y_COUNT)
|
603 |
|
|
#define pDMA2_5_X_MODIFY (volatile signed short *)DMA2_5_X_MODIFY
|
604 |
|
|
#define pDMA2_5_Y_MODIFY (volatile signed short *)DMA2_5_Y_MODIFY
|
605 |
|
|
#define pDMA2_5_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_5_CURR_DESC_PTR)
|
606 |
|
|
#define pDMA2_5_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_5_CURR_ADDR)
|
607 |
|
|
#define pDMA2_5_CURR_X_COUNT ((volatile unsigned short *)DMA2_5_CURR_X_COUNT)
|
608 |
|
|
#define pDMA2_5_CURR_Y_COUNT ((volatile unsigned short *)DMA2_5_CURR_Y_COUNT)
|
609 |
|
|
#define pDMA2_5_IRQ_STATUS ((volatile unsigned short *)DMA2_5_IRQ_STATUS)
|
610 |
|
|
#define pDMA2_5_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_5_PERIPHERAL_MAP)
|
611 |
|
|
#define pDMA2_6_CONFIG ((volatile unsigned short *)DMA2_6_CONFIG)
|
612 |
|
|
#define pDMA2_6_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_6_NEXT_DESC_PTR)
|
613 |
|
|
#define pDMA2_6_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_6_START_ADDR)
|
614 |
|
|
#define pDMA2_6_X_COUNT ((volatile unsigned short *)DMA2_6_X_COUNT)
|
615 |
|
|
#define pDMA2_6_Y_COUNT ((volatile unsigned short *)DMA2_6_Y_COUNT)
|
616 |
|
|
#define pDMA2_6_X_MODIFY (volatile signed short *)DMA2_6_X_MODIFY
|
617 |
|
|
#define pDMA2_6_Y_MODIFY (volatile signed short *)DMA2_6_Y_MODIFY
|
618 |
|
|
#define pDMA2_6_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_6_CURR_DESC_PTR)
|
619 |
|
|
#define pDMA2_6_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_6_CURR_ADDR)
|
620 |
|
|
#define pDMA2_6_CURR_X_COUNT ((volatile unsigned short *)DMA2_6_CURR_X_COUNT)
|
621 |
|
|
#define pDMA2_6_CURR_Y_COUNT ((volatile unsigned short *)DMA2_6_CURR_Y_COUNT)
|
622 |
|
|
#define pDMA2_6_IRQ_STATUS ((volatile unsigned short *)DMA2_6_IRQ_STATUS)
|
623 |
|
|
#define pDMA2_6_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_6_PERIPHERAL_MAP)
|
624 |
|
|
#define pDMA2_7_CONFIG ((volatile unsigned short *)DMA2_7_CONFIG)
|
625 |
|
|
#define pDMA2_7_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_7_NEXT_DESC_PTR)
|
626 |
|
|
#define pDMA2_7_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_7_START_ADDR)
|
627 |
|
|
#define pDMA2_7_X_COUNT ((volatile unsigned short *)DMA2_7_X_COUNT)
|
628 |
|
|
#define pDMA2_7_Y_COUNT ((volatile unsigned short *)DMA2_7_Y_COUNT)
|
629 |
|
|
#define pDMA2_7_X_MODIFY (volatile signed short *)DMA2_7_X_MODIFY
|
630 |
|
|
#define pDMA2_7_Y_MODIFY (volatile signed short *)DMA2_7_Y_MODIFY
|
631 |
|
|
#define pDMA2_7_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_7_CURR_DESC_PTR)
|
632 |
|
|
#define pDMA2_7_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_7_CURR_ADDR)
|
633 |
|
|
#define pDMA2_7_CURR_X_COUNT ((volatile unsigned short *)DMA2_7_CURR_X_COUNT)
|
634 |
|
|
#define pDMA2_7_CURR_Y_COUNT ((volatile unsigned short *)DMA2_7_CURR_Y_COUNT)
|
635 |
|
|
#define pDMA2_7_IRQ_STATUS ((volatile unsigned short *)DMA2_7_IRQ_STATUS)
|
636 |
|
|
#define pDMA2_7_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_7_PERIPHERAL_MAP)
|
637 |
|
|
#define pDMA2_8_CONFIG ((volatile unsigned short *)DMA2_8_CONFIG)
|
638 |
|
|
#define pDMA2_8_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_8_NEXT_DESC_PTR)
|
639 |
|
|
#define pDMA2_8_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_8_START_ADDR)
|
640 |
|
|
#define pDMA2_8_X_COUNT ((volatile unsigned short *)DMA2_8_X_COUNT)
|
641 |
|
|
#define pDMA2_8_Y_COUNT ((volatile unsigned short *)DMA2_8_Y_COUNT)
|
642 |
|
|
#define pDMA2_8_X_MODIFY (volatile signed short *)DMA2_8_X_MODIFY
|
643 |
|
|
#define pDMA2_8_Y_MODIFY (volatile signed short *)DMA2_8_Y_MODIFY
|
644 |
|
|
#define pDMA2_8_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_8_CURR_DESC_PTR)
|
645 |
|
|
#define pDMA2_8_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_8_CURR_ADDR)
|
646 |
|
|
#define pDMA2_8_CURR_X_COUNT ((volatile unsigned short *)DMA2_8_CURR_X_COUNT)
|
647 |
|
|
#define pDMA2_8_CURR_Y_COUNT ((volatile unsigned short *)DMA2_8_CURR_Y_COUNT)
|
648 |
|
|
#define pDMA2_8_IRQ_STATUS ((volatile unsigned short *)DMA2_8_IRQ_STATUS)
|
649 |
|
|
#define pDMA2_8_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_8_PERIPHERAL_MAP)
|
650 |
|
|
#define pDMA2_9_CONFIG ((volatile unsigned short *)DMA2_9_CONFIG)
|
651 |
|
|
#define pDMA2_9_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_9_NEXT_DESC_PTR)
|
652 |
|
|
#define pDMA2_9_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_9_START_ADDR)
|
653 |
|
|
#define pDMA2_9_X_COUNT ((volatile unsigned short *)DMA2_9_X_COUNT)
|
654 |
|
|
#define pDMA2_9_Y_COUNT ((volatile unsigned short *)DMA2_9_Y_COUNT)
|
655 |
|
|
#define pDMA2_9_X_MODIFY (volatile signed short *)DMA2_9_X_MODIFY
|
656 |
|
|
#define pDMA2_9_Y_MODIFY (volatile signed short *)DMA2_9_Y_MODIFY
|
657 |
|
|
#define pDMA2_9_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_9_CURR_DESC_PTR)
|
658 |
|
|
#define pDMA2_9_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_9_CURR_ADDR)
|
659 |
|
|
#define pDMA2_9_CURR_X_COUNT ((volatile unsigned short *)DMA2_9_CURR_X_COUNT)
|
660 |
|
|
#define pDMA2_9_CURR_Y_COUNT ((volatile unsigned short *)DMA2_9_CURR_Y_COUNT)
|
661 |
|
|
#define pDMA2_9_IRQ_STATUS ((volatile unsigned short *)DMA2_9_IRQ_STATUS)
|
662 |
|
|
#define pDMA2_9_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_9_PERIPHERAL_MAP)
|
663 |
|
|
#define pDMA2_10_CONFIG ((volatile unsigned short *)DMA2_10_CONFIG)
|
664 |
|
|
#define pDMA2_10_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_10_NEXT_DESC_PTR)
|
665 |
|
|
#define pDMA2_10_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_10_START_ADDR)
|
666 |
|
|
#define pDMA2_10_X_COUNT ((volatile unsigned short *)DMA2_10_X_COUNT)
|
667 |
|
|
#define pDMA2_10_Y_COUNT ((volatile unsigned short *)DMA2_10_Y_COUNT)
|
668 |
|
|
#define pDMA2_10_X_MODIFY (volatile signed short *)DMA2_10_X_MODIFY
|
669 |
|
|
#define pDMA2_10_Y_MODIFY (volatile signed short *)DMA2_10_Y_MODIFY
|
670 |
|
|
#define pDMA2_10_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_10_CURR_DESC_PTR)
|
671 |
|
|
#define pDMA2_10_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_10_CURR_ADDR)
|
672 |
|
|
#define pDMA2_10_CURR_X_COUNT ((volatile unsigned short *)DMA2_10_CURR_X_COUNT)
|
673 |
|
|
#define pDMA2_10_CURR_Y_COUNT ((volatile unsigned short *)DMA2_10_CURR_Y_COUNT)
|
674 |
|
|
#define pDMA2_10_IRQ_STATUS ((volatile unsigned short *)DMA2_10_IRQ_STATUS)
|
675 |
|
|
#define pDMA2_10_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_10_PERIPHERAL_MAP)
|
676 |
|
|
#define pDMA2_11_CONFIG ((volatile unsigned short *)DMA2_11_CONFIG)
|
677 |
|
|
#define pDMA2_11_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_11_NEXT_DESC_PTR)
|
678 |
|
|
#define pDMA2_11_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_11_START_ADDR)
|
679 |
|
|
#define pDMA2_11_X_COUNT ((volatile unsigned short *)DMA2_11_X_COUNT)
|
680 |
|
|
#define pDMA2_11_Y_COUNT ((volatile unsigned short *)DMA2_11_Y_COUNT)
|
681 |
|
|
#define pDMA2_11_X_MODIFY (volatile signed short *)DMA2_11_X_MODIFY
|
682 |
|
|
#define pDMA2_11_Y_MODIFY (volatile signed short *)DMA2_11_Y_MODIFY
|
683 |
|
|
#define pDMA2_11_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_11_CURR_DESC_PTR)
|
684 |
|
|
#define pDMA2_11_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_11_CURR_ADDR)
|
685 |
|
|
#define pDMA2_11_CURR_X_COUNT ((volatile unsigned short *)DMA2_11_CURR_X_COUNT)
|
686 |
|
|
#define pDMA2_11_CURR_Y_COUNT ((volatile unsigned short *)DMA2_11_CURR_Y_COUNT)
|
687 |
|
|
#define pDMA2_11_IRQ_STATUS ((volatile unsigned short *)DMA2_11_IRQ_STATUS)
|
688 |
|
|
#define pDMA2_11_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_11_PERIPHERAL_MAP)
|
689 |
|
|
/* Memory DMA2 Controller registers (0xFFC0 0E80-0xFFC0 0FFF) */
|
690 |
|
|
#define pMDMA2_D0_CONFIG ((volatile unsigned short *)MDMA2_D0_CONFIG)
|
691 |
|
|
#define pMDMA2_D0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_D0_NEXT_DESC_PTR)
|
692 |
|
|
#define pMDMA2_D0_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA2_D0_START_ADDR)
|
693 |
|
|
#define pMDMA2_D0_X_COUNT ((volatile unsigned short *)MDMA2_D0_X_COUNT)
|
694 |
|
|
#define pMDMA2_D0_Y_COUNT ((volatile unsigned short *)MDMA2_D0_Y_COUNT)
|
695 |
|
|
#define pMDMA2_D0_X_MODIFY (volatile signed short *)MDMA2_D0_X_MODIFY
|
696 |
|
|
#define pMDMA2_D0_Y_MODIFY (volatile signed short *)MDMA2_D0_Y_MODIFY
|
697 |
|
|
#define pMDMA2_D0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_D0_CURR_DESC_PTR)
|
698 |
|
|
#define pMDMA2_D0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA2_D0_CURR_ADDR)
|
699 |
|
|
#define pMDMA2_D0_CURR_X_COUNT ((volatile unsigned short *)MDMA2_D0_CURR_X_COUNT)
|
700 |
|
|
#define pMDMA2_D0_CURR_Y_COUNT ((volatile unsigned short *)MDMA2_D0_CURR_Y_COUNT)
|
701 |
|
|
#define pMDMA2_D0_IRQ_STATUS ((volatile unsigned short *)MDMA2_D0_IRQ_STATUS)
|
702 |
|
|
#define pMDMA2_D0_PERIPHERAL_MAP ((volatile unsigned short *)MDMA2_D0_PERIPHERAL_MAP)
|
703 |
|
|
#define pMDMA2_S0_CONFIG ((volatile unsigned short *)MDMA2_S0_CONFIG)
|
704 |
|
|
#define pMDMA2_S0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_S0_NEXT_DESC_PTR)
|
705 |
|
|
#define pMDMA2_S0_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA2_S0_START_ADDR)
|
706 |
|
|
#define pMDMA2_S0_X_COUNT ((volatile unsigned short *)MDMA2_S0_X_COUNT)
|
707 |
|
|
#define pMDMA2_S0_Y_COUNT ((volatile unsigned short *)MDMA2_S0_Y_COUNT)
|
708 |
|
|
#define pMDMA2_S0_X_MODIFY (volatile signed short *)MDMA2_S0_X_MODIFY
|
709 |
|
|
#define pMDMA2_S0_Y_MODIFY (volatile signed short *)MDMA2_S0_Y_MODIFY
|
710 |
|
|
#define pMDMA2_S0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_S0_CURR_DESC_PTR)
|
711 |
|
|
#define pMDMA2_S0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA2_S0_CURR_ADDR)
|
712 |
|
|
#define pMDMA2_S0_CURR_X_COUNT ((volatile unsigned short *)MDMA2_S0_CURR_X_COUNT)
|
713 |
|
|
#define pMDMA2_S0_CURR_Y_COUNT ((volatile unsigned short *)MDMA2_S0_CURR_Y_COUNT)
|
714 |
|
|
#define pMDMA2_S0_IRQ_STATUS ((volatile unsigned short *)MDMA2_S0_IRQ_STATUS)
|
715 |
|
|
#define pMDMA2_S0_PERIPHERAL_MAP ((volatile unsigned short *)MDMA2_S0_PERIPHERAL_MAP)
|
716 |
|
|
#define pMDMA2_D1_CONFIG ((volatile unsigned short *)MDMA2_D1_CONFIG)
|
717 |
|
|
#define pMDMA2_D1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_D1_NEXT_DESC_PTR)
|
718 |
|
|
#define pMDMA2_D1_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA2_D1_START_ADDR)
|
719 |
|
|
#define pMDMA2_D1_X_COUNT ((volatile unsigned short *)MDMA2_D1_X_COUNT)
|
720 |
|
|
#define pMDMA2_D1_Y_COUNT ((volatile unsigned short *)MDMA2_D1_Y_COUNT)
|
721 |
|
|
#define pMDMA2_D1_X_MODIFY (volatile signed short *)MDMA2_D1_X_MODIFY
|
722 |
|
|
#define pMDMA2_D1_Y_MODIFY (volatile signed short *)MDMA2_D1_Y_MODIFY
|
723 |
|
|
#define pMDMA2_D1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_D1_CURR_DESC_PTR)
|
724 |
|
|
#define pMDMA2_D1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA2_D1_CURR_ADDR)
|
725 |
|
|
#define pMDMA2_D1_CURR_X_COUNT ((volatile unsigned short *)MDMA2_D1_CURR_X_COUNT)
|
726 |
|
|
#define pMDMA2_D1_CURR_Y_COUNT ((volatile unsigned short *)MDMA2_D1_CURR_Y_COUNT)
|
727 |
|
|
#define pMDMA2_D1_IRQ_STATUS ((volatile unsigned short *)MDMA2_D1_IRQ_STATUS)
|
728 |
|
|
#define pMDMA2_D1_PERIPHERAL_MAP ((volatile unsigned short *)MDMA2_D1_PERIPHERAL_MAP)
|
729 |
|
|
#define pMDMA2_S1_CONFIG ((volatile unsigned short *)MDMA2_S1_CONFIG)
|
730 |
|
|
#define pMDMA2_S1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_S1_NEXT_DESC_PTR)
|
731 |
|
|
#define pMDMA2_S1_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA2_S1_START_ADDR)
|
732 |
|
|
#define pMDMA2_S1_X_COUNT ((volatile unsigned short *)MDMA2_S1_X_COUNT)
|
733 |
|
|
#define pMDMA2_S1_Y_COUNT ((volatile unsigned short *)MDMA2_S1_Y_COUNT)
|
734 |
|
|
#define pMDMA2_S1_X_MODIFY (volatile signed short *)MDMA2_S1_X_MODIFY
|
735 |
|
|
#define pMDMA2_S1_Y_MODIFY (volatile signed short *)MDMA2_S1_Y_MODIFY
|
736 |
|
|
#define pMDMA2_S1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_S1_CURR_DESC_PTR)
|
737 |
|
|
#define pMDMA2_S1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA2_S1_CURR_ADDR)
|
738 |
|
|
#define pMDMA2_S1_CURR_X_COUNT ((volatile unsigned short *)MDMA2_S1_CURR_X_COUNT)
|
739 |
|
|
#define pMDMA2_S1_CURR_Y_COUNT ((volatile unsigned short *)MDMA2_S1_CURR_Y_COUNT)
|
740 |
|
|
#define pMDMA2_S1_IRQ_STATUS ((volatile unsigned short *)MDMA2_S1_IRQ_STATUS)
|
741 |
|
|
#define pMDMA2_S1_PERIPHERAL_MAP ((volatile unsigned short *)MDMA2_S1_PERIPHERAL_MAP)
|
742 |
|
|
/* Internal Memory DMA Registers (0xFFC0_1800 - 0xFFC0_19FF) */
|
743 |
|
|
#define pIMDMA_D0_CONFIG ((volatile unsigned short *)IMDMA_D0_CONFIG)
|
744 |
|
|
#define pIMDMA_D0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_D0_NEXT_DESC_PTR)
|
745 |
|
|
#define pIMDMA_D0_START_ADDR (_PTR_TO_VOL_VOID_PTR IMDMA_D0_START_ADDR)
|
746 |
|
|
#define pIMDMA_D0_X_COUNT ((volatile unsigned short *)IMDMA_D0_X_COUNT)
|
747 |
|
|
#define pIMDMA_D0_Y_COUNT ((volatile unsigned short *)IMDMA_D0_Y_COUNT)
|
748 |
|
|
#define pIMDMA_D0_X_MODIFY (volatile signed short *)IMDMA_D0_X_MODIFY
|
749 |
|
|
#define pIMDMA_D0_Y_MODIFY (volatile signed short *)IMDMA_D0_Y_MODIFY
|
750 |
|
|
#define pIMDMA_D0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_D0_CURR_DESC_PTR)
|
751 |
|
|
#define pIMDMA_D0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR IMDMA_D0_CURR_ADDR)
|
752 |
|
|
#define pIMDMA_D0_CURR_X_COUNT ((volatile unsigned short *)IMDMA_D0_CURR_X_COUNT)
|
753 |
|
|
#define pIMDMA_D0_CURR_Y_COUNT ((volatile unsigned short *)IMDMA_D0_CURR_Y_COUNT)
|
754 |
|
|
#define pIMDMA_D0_IRQ_STATUS ((volatile unsigned short *)IMDMA_D0_IRQ_STATUS)
|
755 |
|
|
#define pIMDMA_S0_CONFIG ((volatile unsigned short *)IMDMA_S0_CONFIG)
|
756 |
|
|
#define pIMDMA_S0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_S0_NEXT_DESC_PTR)
|
757 |
|
|
#define pIMDMA_S0_START_ADDR (_PTR_TO_VOL_VOID_PTR IMDMA_S0_START_ADDR)
|
758 |
|
|
#define pIMDMA_S0_X_COUNT ((volatile unsigned short *)IMDMA_S0_X_COUNT)
|
759 |
|
|
#define pIMDMA_S0_Y_COUNT ((volatile unsigned short *)IMDMA_S0_Y_COUNT)
|
760 |
|
|
#define pIMDMA_S0_X_MODIFY (volatile signed short *)IMDMA_S0_X_MODIFY
|
761 |
|
|
#define pIMDMA_S0_Y_MODIFY (volatile signed short *)IMDMA_S0_Y_MODIFY
|
762 |
|
|
#define pIMDMA_S0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_S0_CURR_DESC_PTR)
|
763 |
|
|
#define pIMDMA_S0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR IMDMA_S0_CURR_ADDR)
|
764 |
|
|
#define pIMDMA_S0_CURR_X_COUNT ((volatile unsigned short *)IMDMA_S0_CURR_X_COUNT)
|
765 |
|
|
#define pIMDMA_S0_CURR_Y_COUNT ((volatile unsigned short *)IMDMA_S0_CURR_Y_COUNT)
|
766 |
|
|
#define pIMDMA_S0_IRQ_STATUS ((volatile unsigned short *)IMDMA_S0_IRQ_STATUS)
|
767 |
|
|
#define pIMDMA_D1_CONFIG ((volatile unsigned short *)IMDMA_D1_CONFIG)
|
768 |
|
|
#define pIMDMA_D1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_D1_NEXT_DESC_PTR)
|
769 |
|
|
#define pIMDMA_D1_START_ADDR (_PTR_TO_VOL_VOID_PTR IMDMA_D1_START_ADDR)
|
770 |
|
|
#define pIMDMA_D1_X_COUNT ((volatile unsigned short *)IMDMA_D1_X_COUNT)
|
771 |
|
|
#define pIMDMA_D1_Y_COUNT ((volatile unsigned short *)IMDMA_D1_Y_COUNT)
|
772 |
|
|
#define pIMDMA_D1_X_MODIFY (volatile signed short *)IMDMA_D1_X_MODIFY
|
773 |
|
|
#define pIMDMA_D1_Y_MODIFY (volatile signed short *)IMDMA_D1_Y_MODIFY
|
774 |
|
|
#define pIMDMA_D1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_D1_CURR_DESC_PTR)
|
775 |
|
|
#define pIMDMA_D1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR IMDMA_D1_CURR_ADDR)
|
776 |
|
|
#define pIMDMA_D1_CURR_X_COUNT ((volatile unsigned short *)IMDMA_D1_CURR_X_COUNT)
|
777 |
|
|
#define pIMDMA_D1_CURR_Y_COUNT ((volatile unsigned short *)IMDMA_D1_CURR_Y_COUNT)
|
778 |
|
|
#define pIMDMA_D1_IRQ_STATUS ((volatile unsigned short *)IMDMA_D1_IRQ_STATUS)
|
779 |
|
|
#define pIMDMA_S1_CONFIG ((volatile unsigned short *)IMDMA_S1_CONFIG)
|
780 |
|
|
#define pIMDMA_S1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_S1_NEXT_DESC_PTR)
|
781 |
|
|
#define pIMDMA_S1_START_ADDR (_PTR_TO_VOL_VOID_PTR IMDMA_S1_START_ADDR)
|
782 |
|
|
#define pIMDMA_S1_X_COUNT ((volatile unsigned short *)IMDMA_S1_X_COUNT)
|
783 |
|
|
#define pIMDMA_S1_Y_COUNT ((volatile unsigned short *)IMDMA_S1_Y_COUNT)
|
784 |
|
|
#define pIMDMA_S1_X_MODIFY (volatile signed short *)IMDMA_S1_X_MODIFY
|
785 |
|
|
#define pIMDMA_S1_Y_MODIFY (volatile signed short *)IMDMA_S1_Y_MODIFY
|
786 |
|
|
#define pIMDMA_S1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_S1_CURR_DESC_PTR)
|
787 |
|
|
#define pIMDMA_S1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR IMDMA_S1_CURR_ADDR)
|
788 |
|
|
#define pIMDMA_S1_CURR_X_COUNT ((volatile unsigned short *)IMDMA_S1_CURR_X_COUNT)
|
789 |
|
|
#define pIMDMA_S1_CURR_Y_COUNT ((volatile unsigned short *)IMDMA_S1_CURR_Y_COUNT)
|
790 |
|
|
#define pIMDMA_S1_IRQ_STATUS ((volatile unsigned short *)IMDMA_S1_IRQ_STATUS)
|
791 |
|
|
|
792 |
|
|
#ifdef _MISRA_RULES
|
793 |
|
|
#pragma diag(pop)
|
794 |
|
|
#endif /* _MISRA_RULES */
|
795 |
|
|
|
796 |
|
|
#endif /* _CDEF_BF561_H */
|