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jeremybenn |
/*
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* The authors hereby grant permission to use, copy, modify, distribute,
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* and license this software and its documentation for any purpose, provided
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* that existing copyright notices are retained in all copies and that this
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* notice is included verbatim in any distributions. No written agreement,
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* license, or royalty fee is required for any of the authorized uses.
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* Modifications to this software may be copyrighted by their authors
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* and need not follow the licensing terms described here, provided that
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* the new terms are clearly indicated on the first page of each file where
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* they apply.
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*/
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#pragma once
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#ifndef __NO_BUILTIN
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#pragma system_header /* exception.h */
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#endif
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/************************************************************************
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*
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* exception.h
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*
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* Copyright (C) 2008, 2009 Analog Devices, Inc.
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*
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************************************************************************/
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#ifndef _EXCEPTION_H
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#define _EXCEPTION_H
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#ifdef _MISRA_RULES
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#pragma diag(push)
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#pragma diag(suppress:misra_rule_5_6)
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#pragma diag(suppress:misra_rule_5_7)
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#pragma diag(suppress:misra_rule_6_3)
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#pragma diag(suppress:misra_rule_19_4)
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#pragma diag(suppress:misra_rule_19_7)
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#pragma diag(suppress:misra_rule_19_10)
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#pragma diag(suppress:misra_rule_19_13)
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#endif /* _MISRA_RULES */
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/*
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** Definitions for user-friendly interrupt handling.
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*/
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/*
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** Memory-Mapped Registers (MMRs) - these record what causes address
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** exceptions.
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*/
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#define EX_DATA_FAULT_STATUS 0xFFE00008
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#define EX_DATA_FAULT_ADDR 0xFFE0000C
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#define EX_CODE_FAULT_STATUS 0xFFE01008
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#define EX_CODE_FAULT_ADDR 0xFFE0100C
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/*
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** Event Vector Table
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*/
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#define EX_EVENT_VECTOR_TABLE 0xFFE02000
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/*
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** Meaning of the various bits in EXCAUSE field in SEQSTAT register.
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*/
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#define EX_BITS 0x3F /* All EXCAUSE bits */
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#define EX_TYPE 0x30 /* The bits which define the type */
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#define EX_DEBUG 0x10 /* If set, is a debug exception type */
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#define EX_SYS 0x20 /* If set, is a system exception type */
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/* If neither set, is from EXCPT instr */
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#define EX_IS_DEBUG_EXCEPTION(E) (((E)&EX_TYPE)==EX_DEBUG)
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#define EX_IS_SYSTEM_EXCEPTION(E) (((E)&EX_TYPE)==EX_SYS)
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#define EX_IS_USER_EXCEPTION(E) (((E)&EX_TYPE)==0)
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/*
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** Service exceptions continue from the instruction after the one
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** that raised the exception.
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** Error exceptions restart the instruction that raised the exception.
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*/
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#define EX_IS_SERVICE_EXCEPTION(E) (!EX_IS_SYSTEM_EXCEPTION(E))
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#define EX_IS_ERROR_EXCEPTION(E) (EX_IS_SYSTEM_EXCEPTION(E))
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#define EX_DB_SINGLE_STEP 0x10 /* Processor is single-stepping */
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#define EX_DB_EMTRCOVRFLW 0x11 /* Emulation Trace buffer overflowed */
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#define EX_SYS_UNDEFINSTR 0x21 /* Undefined instruction */
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#define EX_SYS_ILLINSTRC 0x22 /* Illegal instruction combination */
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#define EX_SYS_DCPLBPROT 0x23 /* Data CPLB Protection violation */
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#define EX_SYS_DALIGN 0x24 /* Data access misaligned address violation */
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#define EX_SYS_UNRECEVT 0x25 /* Unrecoverable event */
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#define EX_SYS_DCPLBMISS 0x26 /* Data access CPLB Miss */
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#define EX_SYS_DCPLBMHIT 0x27 /* Data access CPLB Multiple Hits */
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#define EX_SYS_EMWATCHPT 0x28 /* Emulation watch point match */
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#define EX_SYS_CACCESSEX 0x29 /* Code fetch access exception */
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#define EX_SYS_CALIGN 0x2A /* Attempted misaligned instr cache fetch */
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#define EX_SYS_CCPLBPROT 0x2B /* Code fetch CPLB Protection */
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#define EX_SYS_CCPLBMISS 0x2C /* CPLB miss on an instruction fetch */
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#define EX_SYS_CCPLBMHIT 0x2D /* Code fetch CPLB Multiple Hits */
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#define EX_SYS_ILLUSESUP 0x2E /* Illegal use of Supervisor Resource */
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/*
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** Meaning of the various bits in HWERRCAUSE in SEQSTAT
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*/
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#define EX_HWBITS (0x1F<<14) /* bits 18:14 */
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#if !defined(__ADSPLPBLACKFIN__)
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#define EX_HW_NOMEM1 (0x16<<14)
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#define EX_HW_NOMEM2 (0x17<<14)
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#else
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#define EX_HW_SYSMMR (0x02<<14)
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#define EX_HW_EXTMEM (0x03<<14)
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#endif
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#define EX_HW_DMAHIT (0x01<<14)
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#define EX_HW_PERFMON (0x12<<14)
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#define EX_HW_RAISE (0x18<<14)
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/*
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** Meaning of the bits in DATA_FAULT_STATUS and CODE_FAULT_STATUS
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*/
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#define EX_DATA_FAULT_ILLADDR (1<<19) /* non-existent memory */
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#define EX_DATA_FAULT_DAG (1<<18) /* 0=>DAG0, 1=>DAG1 */
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#define EX_DATA_FAULT_USERSUPV (1<<17) /* 0=>user mode, 1=> supervisor */
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#define EX_DATA_FAULT_READWRITE (1<<16) /* 0=>read, 1=>write */
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#define EX_DATA_FAULT_CPLB 0xFFFF /* 0=>CPLB0, 1=>CPLB1, etc */
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#define EX_CODE_FAULT_ILLADDR (1<<19) /* non-existent memory */
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#define EX_CODE_FAULT_USERSUPV (1<<17) /* 0=>user mode, 1=> supervisor */
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#define EX_CODE_FAULT_CPLB 0xFFFF /* 0=>CPLB0, 1=>CPLB1, etc */
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/*
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** The kinds of interrupt that can occur. These are also the
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** indices into the Event Vector Table.
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*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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ik_err=-1,
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ik_emulation,
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ik_reset,
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ik_nmi,
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ik_exception,
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ik_global_int_enable,
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ik_hardware_err,
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ik_timer,
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ik_ivg7,
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ik_ivg8,
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ik_ivg9,
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ik_ivg10,
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ik_ivg11,
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ik_ivg12,
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ik_ivg13,
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ik_ivg14,
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ik_ivg15,
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num_interrupt_kind
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} interrupt_kind;
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/*
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** Structure for recording details of an exception or interrupt
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** that has occurred.
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*/
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typedef struct {
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interrupt_kind kind; /* whether interrupt, exception, etc. */
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int value; /* interrupt number, exception type, etc. */
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void *pc; /* PC at point where exception occurred */
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void *addr; /* if an address faulted, which one. */
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unsigned status; /* if an address faulted, why. */
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} interrupt_info;
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/*
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** Macro for defining an interrupt routine
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*/
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typedef void (*ex_handler_fn)();
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#define EX_HANDLER(KIND,NAME) \
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_Pragma(#KIND) \
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void NAME (void)
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#define EX_HANDLER_PROTO(KIND, NAME) EX_HANDLER(KIND, NAME)
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#define EX_INTERRUPT_HANDLER(NAME) EX_HANDLER(interrupt,NAME)
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#define EX_EXCEPTION_HANDLER(NAME) EX_HANDLER(exception,NAME)
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#define EX_NMI_HANDLER(NAME) EX_HANDLER(nmi,NAME)
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#define EX_REENTRANT_HANDLER(NAME) \
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_Pragma("interrupt_reentrant") \
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EX_HANDLER(interrupt,NAME)
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/*
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** A convenience function for setting up the interrupt_info contents.
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** Must be called from immediately with the interrupt handler.
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*/
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void get_interrupt_info(interrupt_kind int_kind, interrupt_info *int_info);
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/*
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** Diagnostics function for reporting unexpected events.
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*/
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void _ex_report_event(interrupt_info *int_info);
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/*
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** Register an interrupt handler within the EVT.
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** Return previous value if there was one.
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*/
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ex_handler_fn register_handler(interrupt_kind int_kind, ex_handler_fn handler);
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/*
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** Some magic values for registering default and null handlers.
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*/
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#define EX_INT_DEFAULT ((ex_handler_fn)-1)
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#define EX_INT_IGNORE ((ex_handler_fn)0)
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/*
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** Extended function to register an interrupt handler within the EVT.
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** Returns the old handler.
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**
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** If enabled == EX_INT_ALWAYS_ENABLE, install fn (if fn != EX_INT_IGNORE
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** and fn != EX_INT_DISABLE), and then enable the interrupt in IMASK then
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** return
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**
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** If fn == EX_INT_IGNORE, disable the interrupt
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** If fn == EX_INT_DEFAULT, delete the handler entry in the EVT and disable
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** the interrupt in IMASK
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** Otherwise, install the new interrupt handler. Then,
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** If enabled == EX_INT_DISABLE, disable the interrupt in IMASK
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** If enabled == EX_INT_ENABLE, enable the interrupt in IMASK
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** otherwise leave the interrupt status alone.
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*/
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ex_handler_fn register_handler_ex(interrupt_kind kind, ex_handler_fn fn,
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int enable);
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/* Constants for the enabled parameter of register_handler_ex */
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#define EX_INT_DISABLE 0
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#define EX_INT_ENABLE 1
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#define EX_INT_KEEP_IMASK -1
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#define EX_INT_ALWAYS_ENABLE 2
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/*
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** Allow the user to raise exceptions from C.
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*/
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int raise_interrupt(interrupt_kind kind, int which,
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int cmd, int arg1, int arg2);
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#ifdef __cplusplus
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} /* extern "C" */
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#endif
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#ifdef _MISRA_RULES
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#pragma diag(pop)
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#endif /* _MISRA_RULES */
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#endif /* _EXCEPTION_H */
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