OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [newlib-1.18.0/] [libgloss/] [or32/] [crt0.S] - Blame information for rev 507

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 507 julius
/* crt0.S. C design runtime startup file.
2 207 jeremybenn
 
3
   Copyright (C) 2004, Jacob Bower
4
   Copyright (C) 2010, Embecosm Limited 
5 507 julius
   Copyright (C) 2011, ORSoC AB
6 207 jeremybenn
 
7
   Contributor Jeremy Bennett 
8 507 julius
   Contributor Julius Baxter  
9 207 jeremybenn
 
10
   This file is part of Newlib.
11
 
12
   The original work by Jacob Bower is provided as-is without any kind of
13
   warranty. Use it at your own risk!
14
 
15
   All subsequent work is bound by version 3 of the GPL as follows.
16
 
17
   This program is free software; you can redistribute it and/or modify it
18
   under the terms of the GNU General Public License as published by the Free
19
   Software Foundation; either version 3 of the License, or (at your option)
20
   any later version.
21
 
22
   This program is distributed in the hope that it will be useful, but WITHOUT
23
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
24
   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
25
   more details.
26
 
27
   You should have received a copy of the GNU General Public License along
28
   with this program.  If not, see .            */
29
/* -------------------------------------------------------------------------- */
30
/* This program is commented throughout in a fashion suitable for processing
31
   with Doxygen.                                                              */
32
/* -------------------------------------------------------------------------- */
33
 
34
#include "spr-defs.h"
35
 
36
/* -------------------------------------------------------------------------- */
37 507 julius
/*!Macro to load a symbol's address into a register.
38 207 jeremybenn
 
39 507 julius
  @param[in] gpr  General purpose register to load address into.
40
  @param[in] symbol Name of symbol to load.                                   */
41 207 jeremybenn
/* -------------------------------------------------------------------------- */
42 507 julius
#define LOAD_SYMBOL_2_GPR(gpr,symbol)  \
43
        .global symbol ;               \
44
        l.movhi gpr, hi(symbol) ;      \
45
        l.ori   gpr, gpr, lo(symbol)
46 207 jeremybenn
 
47 507 julius
/* -------------------------------------------------------------------------- */
48
/*!Macro to handle exceptions.
49 207 jeremybenn
 
50 507 julius
  Load NPC into r3, EPCR into r4
51
                                                                              */
52 207 jeremybenn
/* -------------------------------------------------------------------------- */
53 507 julius
// Size of redzone + size of space required to store state
54
// This value must match that in _exception_handler.S
55
#define EXCEPTION_STACK_SIZE 128
56
 
57
#define CALL_EXCEPTION_HANDLER                          \
58
        l.addi  r1, r1, -EXCEPTION_STACK_SIZE;          \
59
        l.sw    4(r1), r3;                              \
60
        l.sw    8(r1), r4;                              \
61
        l.mfspr r3,r0,SPR_NPC;                          \
62
        l.j     _exception_handler;                     \
63
        l.mfspr r4,r0,SPR_EPCR_BASE
64 207 jeremybenn
 
65
/* -------------------------------------------------------------------------- */
66
/*!Exception vectors                                                          */
67
/* -------------------------------------------------------------------------- */
68
        .section .vectors,"ax"
69
 
70
        /* 0x100: RESET exception */
71
        .org    0x100
72 399 jeremybenn
__reset:
73 507 julius
        l.movhi r0, 0
74
        l.movhi r1, 0
75
        l.movhi r2, 0
76
        l.movhi r3, 0
77
        l.movhi r4, 0
78
        l.movhi r5, 0
79
        l.movhi r6, 0
80
        l.movhi r7, 0
81
        l.movhi r8, 0
82
        l.movhi r9, 0
83
        l.movhi r10, 0
84
        l.movhi r11, 0
85
        l.movhi r12, 0
86
        l.movhi r13, 0
87
        l.movhi r14, 0
88
        l.movhi r15, 0
89
        l.movhi r16, 0
90
        l.movhi r17, 0
91
        l.movhi r18, 0
92
        l.movhi r19, 0
93
        l.movhi r20, 0
94
        l.movhi r21, 0
95
        l.movhi r22, 0
96
        l.movhi r23, 0
97
        l.movhi r24, 0
98
        l.movhi r25, 0
99
        l.movhi r26, 0
100
        l.movhi r27, 0
101
        l.movhi r28, 0
102
        l.movhi r29, 0
103
        l.movhi r30, 0
104
        l.movhi r31, 0
105
 
106
        /* Clear status register, set supervisor mode */
107
        l.ori r1, r0, SPR_SR_SM
108
        l.mtspr r0, r1, SPR_SR
109
        /* Clear timer mode register*/
110
        l.mtspr r0, r0, SPR_TTMR
111 207 jeremybenn
        /* Jump to program initialisation code */
112 507 julius
        LOAD_SYMBOL_2_GPR(r4, _start)
113
        l.jr    r4
114 207 jeremybenn
        l.nop
115
 
116
        .org    0x200
117 507 julius
        CALL_EXCEPTION_HANDLER
118 243 jeremybenn
 
119 207 jeremybenn
        /* 0x300: Data Page Fault exception */
120
        .org    0x300
121 507 julius
        CALL_EXCEPTION_HANDLER
122 207 jeremybenn
 
123
        /* 0x400: Insn Page Fault exception */
124
        .org    0x400
125 507 julius
        CALL_EXCEPTION_HANDLER
126 207 jeremybenn
 
127
        /* 0x500: Timer exception */
128
        .org    0x500
129 507 julius
        CALL_EXCEPTION_HANDLER
130 207 jeremybenn
 
131
        /* 0x600: Aligment exception */
132
        .org    0x600
133 507 julius
        CALL_EXCEPTION_HANDLER
134 207 jeremybenn
 
135
        /* 0x700: Illegal insn exception */
136
        .org    0x700
137 507 julius
        CALL_EXCEPTION_HANDLER
138 207 jeremybenn
 
139
        /* 0x800: External interrupt exception */
140
        .org    0x800
141 507 julius
        CALL_EXCEPTION_HANDLER
142 207 jeremybenn
 
143
        /* 0x900: DTLB miss exception */
144
        .org    0x900
145 507 julius
        CALL_EXCEPTION_HANDLER
146 207 jeremybenn
 
147
        /* 0xa00: ITLB miss exception */
148
        .org    0xa00
149 507 julius
        CALL_EXCEPTION_HANDLER
150 207 jeremybenn
 
151
        /* 0xb00: Range exception */
152
        .org    0xb00
153 507 julius
        CALL_EXCEPTION_HANDLER
154 207 jeremybenn
 
155
        /* 0xc00: Syscall exception */
156
        .org    0xc00
157 507 julius
        CALL_EXCEPTION_HANDLER
158 207 jeremybenn
 
159
        /* 0xd00: floating point exception */
160
        .org    0xd00
161 507 julius
        CALL_EXCEPTION_HANDLER
162 207 jeremybenn
 
163
        /* 0xe00: Trap exception */
164
        .org    0xe00
165 507 julius
        CALL_EXCEPTION_HANDLER
166 207 jeremybenn
 
167
        /* 0xf00: Reserved exceptions */
168
        .org    0xf00
169 507 julius
        CALL_EXCEPTION_HANDLER
170 207 jeremybenn
 
171
        .org    0x1000
172 507 julius
        CALL_EXCEPTION_HANDLER
173 207 jeremybenn
 
174
        .org    0x1100
175 507 julius
        CALL_EXCEPTION_HANDLER
176 207 jeremybenn
 
177
        .org    0x1200
178 507 julius
        CALL_EXCEPTION_HANDLER
179 207 jeremybenn
 
180
        .org    0x1300
181 507 julius
        CALL_EXCEPTION_HANDLER
182 207 jeremybenn
 
183
        .org    0x1400
184 507 julius
        CALL_EXCEPTION_HANDLER
185 207 jeremybenn
 
186
        .org    0x1500
187 507 julius
        CALL_EXCEPTION_HANDLER
188 207 jeremybenn
 
189
        .org    0x1600
190 507 julius
        CALL_EXCEPTION_HANDLER
191 207 jeremybenn
 
192
        .org    0x1700
193 507 julius
        CALL_EXCEPTION_HANDLER
194 207 jeremybenn
 
195
        .org    0x1800
196 507 julius
        CALL_EXCEPTION_HANDLER
197 207 jeremybenn
 
198
        .org    0x1900
199 507 julius
        CALL_EXCEPTION_HANDLER
200 207 jeremybenn
 
201
        .org    0x1a00
202 507 julius
        CALL_EXCEPTION_HANDLER
203 207 jeremybenn
 
204
        .org    0x1b00
205 507 julius
        CALL_EXCEPTION_HANDLER
206 207 jeremybenn
 
207
        .org    0x1c00
208 507 julius
        CALL_EXCEPTION_HANDLER
209 207 jeremybenn
 
210
        .org    0x1d00
211 507 julius
        CALL_EXCEPTION_HANDLER
212 207 jeremybenn
 
213
        .org    0x1e00
214 507 julius
        CALL_EXCEPTION_HANDLER
215 207 jeremybenn
 
216
        .org    0x1f00
217 507 julius
        CALL_EXCEPTION_HANDLER
218 207 jeremybenn
 
219
        /* Pad to the end */
220
        .org    0x1ffc
221
        l.nop
222
 
223
/* -------------------------------------------------------------------------- */
224
/*!Main entry point
225
 
226
   We initialise the stack and frame pointer first, before we set up the
227
   caches, since otherwise we'll need to disable the instruction cache when
228
   patching the bus error vector code.
229
 
230
   The remaining tasks are then:
231
   - optionally set up instruction and/or data caches
232
   - clear BSS
233
   - call global and static constructors
234
   - set up destructors to be called from exit
235
   - jump to the main function
236
   - call exit if the main function ever returns.
237
   - loop forever (should never get here)                                     */
238
/* -------------------------------------------------------------------------- */
239
        /* The stack grows down from the top of writable memory. */
240
        .section .data
241 507 julius
        .global stack
242
stack:  .space  4,0
243 207 jeremybenn
 
244
        .section .text
245
        .global _start
246
        .type   _start,@function
247
 
248 243 jeremybenn
 
249 507 julius
        /* Following externs from board-specific object passed at link time */
250
        .extern _board_mem_base
251
        .extern _board_mem_size
252
        .extern _board_uart_base
253 243 jeremybenn
 
254 507 julius
_start:
255
        /* Initialise stack and frame pointer (set to same value) */
256
        l.movhi r1,hi(_board_mem_base)
257
        l.ori   r1,r1,lo(_board_mem_base)
258
        l.lwz   r1,0(r1)
259
        l.movhi r2,hi(_board_mem_size)
260
        l.ori   r2,r2,lo(_board_mem_size)
261
        l.lwz   r2,0(r2)
262
        l.add   r1,r1,r2
263
        l.or    r2,r1,r1
264 207 jeremybenn
 
265 507 julius
        /* Store stack address in stack variable */
266 243 jeremybenn
        l.movhi r26,hi(stack)
267
        l.ori   r26,r26,lo(stack)
268 507 julius
        l.sw    0(r26),r1
269
 
270
        /* Initialise cache */
271
        /* TODO - potentially make this optional for simulation targets to save
272
        time during startup */
273
        l.jal   _cache_init
274 207 jeremybenn
        l.nop
275 226 julius
 
276 207 jeremybenn
        /* Clear BSS */
277 243 jeremybenn
.L10:   l.movhi r28,hi(__bss_start)
278 207 jeremybenn
        l.ori   r28,r28,lo(__bss_start)
279
        l.movhi r30,hi(end)
280
        l.ori   r30,r30,lo(end)
281
 
282 243 jeremybenn
.L1:    l.sw    (0)(r28),r0
283 207 jeremybenn
        l.sfltu r28,r30
284
        l.bf    .L1
285
        l.addi  r28,r28,4               /* Delay slot */
286
 
287
        /* Call global and static constructors */
288 399 jeremybenn
        l.jal   __init
289 207 jeremybenn
        l.nop
290
 
291
        /* Set up destructors to be called from exit if main never returns */
292 399 jeremybenn
        l.movhi r3,hi(__fini)
293 243 jeremybenn
        l.jal   atexit
294 399 jeremybenn
        l.ori   r3,r3,lo(__fini)        /* Delay slot */
295 207 jeremybenn
 
296 507 julius
        /* Check if UART is to be initialised */
297
        l.movhi r4,hi(_board_uart_base)
298
        l.ori   r4,r4,lo(_board_uart_base)
299
        l.lwz   r4,0(r4)
300
        l.sfne  r4,r0           /* Is base set? If not, no UART */
301
        l.bnf   .L2
302
        l.or    r3,r0,r0
303
        l.jal   __uart_init
304 207 jeremybenn
        l.nop
305
 
306 507 julius
.L2:
307 207 jeremybenn
        /* Jump to main program entry point (argc = argv = envp = 0) */
308
        l.or    r3,r0,r0
309
        l.or    r4,r0,r0
310 243 jeremybenn
        l.jal   main
311 207 jeremybenn
        l.or    r5,r0,r0                /* Delay slot */
312
 
313
        /* If program exits, call exit routine */
314 399 jeremybenn
        l.jal   exit
315 207 jeremybenn
        l.addi  r3,r11,0                /* Delay slot */
316
 
317
        /* Loop forever */
318 507 julius
.L3:    l.j     .L3
319 207 jeremybenn
        l.nop
320
 
321
        .size   _start, .-_start

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.