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[/] [openrisc/] [trunk/] [gnu-src/] [newlib-1.18.0/] [libgloss/] [or32/] [sim.cfg] - Blame information for rev 280

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1 207 jeremybenn
/* sim.cfg -- Simulator config file for use with Newlib
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 *
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 * Copyright (C) 2010, Embecosm Limited 
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 *
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 * Contributor Jeremy Bennett 
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 *
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 * This file is part of Newlib.
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 *
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 * This program is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License as published by the Free
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 * Software Foundation; either version 2 of the License, or (at your option)
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 * any later version.
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 *
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 * This program is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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 * more details.
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 *
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 * You should have received a copy of the GNU General Public License along
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 * with this program; if not, write to the Free Software Foundation, Inc., 675
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 * Mass Ave, Cambridge, MA 02139, USA. */
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/* -------------------------------------------------------------------------- */
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/* This script is suitable for use with Or1ksim when used with newlib. There
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 * are versions of this library which use a UART for input/output and a
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 * version which provides just output via l.nop.
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 *
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 * For explanation of the different fields, see the default simulation
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 * configuration file supplied with or1ksim (sim.cfg). */
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/* -------------------------------------------------------------------------- */
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section memory
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  name     =      "RAM"
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  type     =    unknown
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  ce       =          0
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  mc       =          0
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  baseaddr = 0x00000000
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  size     = 0x00800000
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  delayr   =          1
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  delayw   =          2
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end
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section sim
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  verbose  =  0
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  debug    =  0
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  profile  =  0
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  history  =  0
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  clkcycle = 40ns               /* 25MHz clock */
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end
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section cpu
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  ver         =   0x12
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  cfg         =   0x00
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  rev         = 0x0001
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  superscalar =      0
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  hazards     =      0
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  dependstats =      0
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  sbuf_len    =      0
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end
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/* Optional sections which may be disabled on enabled, according to the precise
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   options in or1ksim_board.h and the version of the library selected. */
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section ic
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  enabled   =   1
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  nsets     = 256
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  nways     =   1
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  blocksize =  16
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  hitdelay  =  20
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  missdelay =  20
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end
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section dc
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  enabled         =   0
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  nsets           = 512
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  nways           =   1
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  blocksize       =  16
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  load_hitdelay   =  20
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  load_missdelay  =  20
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  store_hitdelay  =  20
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  store_missdelay =  20
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end
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section uart
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  enabled  = 0
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  baseaddr = 0x90000000
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  channel  = "xterm:"
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  jitter   = -1                     /* async behaviour */
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  16550    = 1
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end
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section debug
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  enabled = 0
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end
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/* Disabled Sections. The first one needs all its additional fields due to a
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   bug in Or1ksim */
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section immu
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  enabled = 0
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end
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section dmmu
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  enabled = 0
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end
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section VAPI
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  enabled = 0
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end
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section dma
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  enabled = 0
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end
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section pm
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  enabled = 0
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end
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section bpb
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  enabled = 0
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end
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section ethernet
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  enabled = 0
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end
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section gpio
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  enabled = 0
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end
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section ata
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  enabled = 0
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end
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section vga
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  enabled = 0
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end
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section fb
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  enabled = 0
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end
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section kbd
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  enabled = 0
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end
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section mc
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  enabled = 0
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end
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section pic
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  enabled = 0
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end

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