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[/] [openrisc/] [trunk/] [gnu-src/] [newlib-1.18.0/] [newlib/] [libc/] [machine/] [cris/] [memset.c] - Blame information for rev 207

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1 207 jeremybenn
/* A memset for CRIS.
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   Copyright (C) 1999-2005 Axis Communications.
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   All rights reserved.
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   Redistribution and use in source and binary forms, with or without
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   modification, are permitted provided that the following conditions
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   are met:
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   1. Redistributions of source code must retain the above copyright
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      notice, this list of conditions and the following disclaimer.
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   2. Neither the name of Axis Communications nor the names of its
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      contributors may be used to endorse or promote products derived
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      from this software without specific prior written permission.
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   THIS SOFTWARE IS PROVIDED BY AXIS COMMUNICATIONS AND ITS CONTRIBUTORS
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   ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL AXIS
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   COMMUNICATIONS OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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   INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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   (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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   SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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   HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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   STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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   IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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   POSSIBILITY OF SUCH DAMAGE.  */
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/* FIXME: This file should really only be used for reference, as the
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   result is somewhat depending on gcc generating what we expect rather
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   than what we describe.  An assembly file should be used instead.  */
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/* Note the multiple occurrence of the expression "12*4", including the
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   asm.  It is hard to get it into the asm in a good way.  Thus better to
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   expose the problem everywhere: no macro.  */
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/* Assuming one cycle per dword written or read (ok, not really true; the
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   world is not ideal), and one cycle per instruction, then 43+3*(n/48-1)
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   <= 24+24*(n/48-1) so n >= 45.7; n >= 0.9; we win on the first full
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   48-byte block to set.  */
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#define MEMSET_BY_BLOCK_THRESHOLD (1 * 48)
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/* No name ambiguities in this file.  */
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__asm__ (".syntax no_register_prefix");
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void *memset(void *pdst, int c, unsigned int plen)
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{
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  /* Now we want the parameters in special registers.  Make sure the
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     compiler does something usable with this.  */
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  register char *return_dst __asm__ ("r10") = pdst;
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  register int n __asm__ ("r12") = plen;
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  register int lc __asm__ ("r11") = c;
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  /* Most apps use memset sanely.  Memsetting about 3..4 bytes or less get
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     penalized here compared to the generic implementation.  */
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  /* This is fragile performancewise at best.  Check with newer GCC
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     releases, if they compile cascaded "x |= x << 8" to sane code.  */
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  __asm__("movu.b %0,r13                                                \n\
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           lslq 8,r13                                                   \n\
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           move.b %0,r13                                                \n\
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           move.d r13,%0                                                \n\
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           lslq 16,r13                                                  \n\
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           or.d r13,%0"
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          : "=r" (lc)           /* Inputs.  */
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          : "0" (lc)             /* Outputs.  */
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          : "r13");             /* Trash.  */
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  {
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    register char *dst __asm__ ("r13") = pdst;
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    if (((unsigned long) pdst & 3) != 0
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        /* Oops! n = 0 must be a valid call, regardless of alignment.  */
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        && n >= 3)
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      {
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        if ((unsigned long) dst & 1)
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          {
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            *dst = (char) lc;
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            n--;
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            dst++;
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          }
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        if ((unsigned long) dst & 2)
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          {
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            *(short *) dst = lc;
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            n -= 2;
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            dst += 2;
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          }
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      }
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    /* Decide which setting method to use.  */
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    if (n >= MEMSET_BY_BLOCK_THRESHOLD)
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      {
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        /* It is not optimal to tell the compiler about clobbering any
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           registers; that will move the saving/restoring of those registers
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           to the function prologue/epilogue, and make non-block sizes
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           suboptimal.  */
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        __asm__ volatile
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          ("\
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           ;; GCC does promise correct register allocations, but let's  \n\
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           ;; make sure it keeps its promises.                          \n\
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           .ifnc %0-%1-%4,$r13-$r12-$r11                                \n\
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           .error \"GCC reg alloc bug: %0-%1-%4 != $r13-$r12-$r11\"     \n\
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           .endif                                                       \n\
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                                                                        \n\
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           ;; Save the registers we'll clobber in the movem process     \n\
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           ;; on the stack.  Don't mention them to gcc, it will only be \n\
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           ;; upset.                                                    \n\
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           subq    11*4,sp                                              \n\
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           movem   r10,[sp]                                             \n\
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                                                                        \n\
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           move.d  r11,r0                                               \n\
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           move.d  r11,r1                                               \n\
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           move.d  r11,r2                                               \n\
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           move.d  r11,r3                                               \n\
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           move.d  r11,r4                                               \n\
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           move.d  r11,r5                                               \n\
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           move.d  r11,r6                                               \n\
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           move.d  r11,r7                                               \n\
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           move.d  r11,r8                                               \n\
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           move.d  r11,r9                                               \n\
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           move.d  r11,r10                                              \n\
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                                                                        \n\
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           ;; Now we've got this:                                       \n\
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           ;; r13 - dst                                                 \n\
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           ;; r12 - n                                                   \n\
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                                                                        \n\
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           ;; Update n for the first loop                               \n\
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           subq    12*4,r12                                             \n\
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0:                                                                      \n\
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"
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#ifdef __arch_common_v10_v32
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           /* Cater to branch offset difference between v32 and v10.  We
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              assume the branch below has an 8-bit offset.  */
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"          setf\n"
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#endif
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"          subq   12*4,r12                                              \n\
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           bge     0b                                                   \n\
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           movem        r11,[r13+]                                      \n\
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                                                                        \n\
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           ;; Compensate for last loop underflowing n.                  \n\
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           addq   12*4,r12                                              \n\
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                                                                        \n\
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           ;; Restore registers from stack.                             \n\
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           movem [sp+],r10"
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           /* Outputs.  */
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           : "=r" (dst), "=r" (n)
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           /* Inputs.  */
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           : "0" (dst), "1" (n), "r" (lc));
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      }
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    /* An ad-hoc unroll, used for 4*12-1..16 bytes. */
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    while (n >= 16)
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      {
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        *(long *) dst = lc; dst += 4;
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        *(long *) dst = lc; dst += 4;
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        *(long *) dst = lc; dst += 4;
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        *(long *) dst = lc; dst += 4;
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        n -= 16;
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      }
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    switch (n)
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      {
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      case 0:
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        break;
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      case 1:
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        *dst = (char) lc;
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        break;
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      case 2:
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        *(short *) dst = (short) lc;
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        break;
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      case 3:
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        *(short *) dst = (short) lc; dst += 2;
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        *dst = (char) lc;
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        break;
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      case 4:
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        *(long *) dst = lc;
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        break;
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      case 5:
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        *(long *) dst = lc; dst += 4;
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        *dst = (char) lc;
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        break;
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      case 6:
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        *(long *) dst = lc; dst += 4;
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        *(short *) dst = (short) lc;
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        break;
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      case 7:
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        *(long *) dst = lc; dst += 4;
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        *(short *) dst = (short) lc; dst += 2;
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        *dst = (char) lc;
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        break;
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      case 8:
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        *(long *) dst = lc; dst += 4;
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        *(long *) dst = lc;
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        break;
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      case 9:
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        *(long *) dst = lc; dst += 4;
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        *(long *) dst = lc; dst += 4;
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        *dst = (char) lc;
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        break;
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      case 10:
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        *(long *) dst = lc; dst += 4;
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        *(long *) dst = lc; dst += 4;
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        *(short *) dst = (short) lc;
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        break;
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      case 11:
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        *(long *) dst = lc; dst += 4;
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        *(long *) dst = lc; dst += 4;
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        *(short *) dst = (short) lc; dst += 2;
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        *dst = (char) lc;
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        break;
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      case 12:
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        *(long *) dst = lc; dst += 4;
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        *(long *) dst = lc; dst += 4;
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        *(long *) dst = lc;
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        break;
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      case 13:
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        *(long *) dst = lc; dst += 4;
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        *(long *) dst = lc; dst += 4;
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        *(long *) dst = lc; dst += 4;
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        *dst = (char) lc;
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        break;
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      case 14:
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        *(long *) dst = lc; dst += 4;
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        *(long *) dst = lc; dst += 4;
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        *(long *) dst = lc; dst += 4;
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        *(short *) dst = (short) lc;
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        break;
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      case 15:
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        *(long *) dst = lc; dst += 4;
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        *(long *) dst = lc; dst += 4;
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        *(long *) dst = lc; dst += 4;
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        *(short *) dst = (short) lc; dst += 2;
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        *dst = (char) lc;
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        break;
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      }
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  }
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  return return_dst;
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}

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