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[/] [openrisc/] [trunk/] [gnu-src/] [newlib-1.18.0/] [newlib/] [libc/] [machine/] [spu/] [spu_clock_svcs.c] - Blame information for rev 437

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Line No. Rev Author Line
1 207 jeremybenn
/*
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(C) Copyright IBM Corp. 2008
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of IBM nor the names of its contributors may be
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used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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*/
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/* SPU clock start and read library services.  */
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#include <spu_timer.h>
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#include "spu_timer_internal.h"
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/* The software managed timebase value.  */
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volatile uint64_t __spu_tb_val __attribute__ ((aligned (16)));
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/* Timeout value of the current interval.  */
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volatile int __spu_tb_timeout __attribute__ ((aligned (16)));
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/* Clock start count (clock is running if >0).  */
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volatile unsigned __spu_clock_startcnt __attribute__ ((aligned (16)));
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/* Saved interrupt state from clock_start.  */
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volatile unsigned __spu_clock_state_was_enabled;
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/* Initializes the software managed timebase, enables the decrementer event,
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   starts the decrementer and enables interrupts. Must be called before
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   clock or timer services can be used. Should only be called by base app/lib
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   code (not from an interrupt/timer handler).
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   Returns with interrupts ENABLED.  */
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void
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spu_clock_start (void)
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{
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  /* Increment clock start and return if it was already running.  */
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  if (++__spu_clock_startcnt > 1)
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    return;
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  __spu_clock_state_was_enabled = spu_readch (SPU_RdMachStat) & 0x1;
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  spu_idisable ();
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  __spu_tb_timeout = CLOCK_START_VALUE;
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  __spu_tb_val = 0;
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  /* Disable, write, enable the decrementer.  */
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  __enable_spu_decr (__spu_tb_timeout, __disable_spu_decr ());
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  spu_ienable ();
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  return;
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}
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/* Returns a monotonically increasing, 64-bit counter, in timebase units,
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   relative to the last call to spu_clock_start().  */
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uint64_t
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spu_clock_read (void)
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{
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  int64_t time;
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  unsigned was_enabled;
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  /* Return 0 if clock is off.  */
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  if (__spu_clock_startcnt == 0)
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    return 0LL;
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  was_enabled = spu_readch (SPU_RdMachStat) & 0x1;
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  spu_idisable ();
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  time = __spu_tb_val + (__spu_tb_timeout - spu_readch (SPU_RdDec));
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  if (__likely (was_enabled))
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    spu_ienable ();
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  return time;
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}

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