| 1 |
207 |
jeremybenn |
/*
|
| 2 |
|
|
Copyright (c) 2007, Toshiba Corporation
|
| 3 |
|
|
|
| 4 |
|
|
All rights reserved.
|
| 5 |
|
|
|
| 6 |
|
|
Redistribution and use in source and binary forms, with or without
|
| 7 |
|
|
modification, are permitted provided that the following conditions are met:
|
| 8 |
|
|
|
| 9 |
|
|
* Redistributions of source code must retain the above copyright notice,
|
| 10 |
|
|
this list of conditions and the following disclaimer.
|
| 11 |
|
|
* Redistributions in binary form must reproduce the above copyright
|
| 12 |
|
|
notice, this list of conditions and the following disclaimer in the
|
| 13 |
|
|
documentation and/or other materials provided with the distribution.
|
| 14 |
|
|
* Neither the names of Toshiba nor the names of its
|
| 15 |
|
|
contributors may be used to endorse or promote products derived from this
|
| 16 |
|
|
software without specific prior written permission.
|
| 17 |
|
|
|
| 18 |
|
|
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
| 19 |
|
|
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
| 20 |
|
|
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
| 21 |
|
|
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
| 22 |
|
|
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
| 23 |
|
|
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
| 24 |
|
|
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
| 25 |
|
|
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
| 26 |
|
|
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
| 27 |
|
|
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
| 28 |
|
|
POSSIBILITY OF SUCH DAMAGE.
|
| 29 |
|
|
*/
|
| 30 |
|
|
/*
|
| 31 |
|
|
* This file contains code use to construct a PIC, spu side, syscall
|
| 32 |
|
|
* function with variable parameters in accordance with the CBE ABI.
|
| 33 |
|
|
*
|
| 34 |
|
|
* This function is equivalent to constructing a va_list structure and
|
| 35 |
|
|
* calling the va_list form of the function. Therefore, for example,
|
| 36 |
|
|
* a printf function stack frame will look like this:
|
| 37 |
|
|
*
|
| 38 |
|
|
* | Stack | high memory
|
| 39 |
|
|
* | Parms |
|
| 40 |
|
|
* | |
|
| 41 |
|
|
* |------------|
|
| 42 |
|
|
* | Link Reg |
|
| 43 |
|
|
* |------------|
|
| 44 |
|
|
* | Back Chain |<-----. <---- input SP
|
| 45 |
|
|
* |------------| |
|
| 46 |
|
|
* | Reg 74 | |
|
| 47 |
|
|
* |------------| |
|
| 48 |
|
|
* | Reg 73 | |
|
| 49 |
|
|
* |------------| |
|
| 50 |
|
|
* // ... // |
|
| 51 |
|
|
* |------------| |
|
| 52 |
|
|
* | Reg 5 | |
|
| 53 |
|
|
* |------------| |
|
| 54 |
|
|
* | Reg 4 |<--. |
|
| 55 |
|
|
* |------------| | |
|
| 56 |
|
|
* va_list.| call_stack |------'
|
| 57 |
|
|
* |------------| |
|
| 58 |
|
|
* va_list.| next_arg |---'
|
| 59 |
|
|
* |------------|
|
| 60 |
|
|
* | format (r3)| <---- start of parameters
|
| 61 |
|
|
* |------------| |------------|
|
| 62 |
|
|
* | stack | | |
|
| 63 |
|
|
* | code | |(Back Chain)| <---- output SP
|
| 64 |
|
|
* | 1-3 qwords | <---- code_ptr `------------'
|
| 65 |
|
|
* `------------'
|
| 66 |
|
|
* low memory
|
| 67 |
|
|
*
|
| 68 |
|
|
* This was written in assembly so that it is smaller than what would
|
| 69 |
|
|
* be produced by using va_start.
|
| 70 |
|
|
*/
|
| 71 |
|
|
|
| 72 |
|
|
#include "c99ppe.h"
|
| 73 |
|
|
|
| 74 |
|
|
#define parms $2 /* Number of fixed arguments */
|
| 75 |
|
|
|
| 76 |
|
|
#define offset $67
|
| 77 |
|
|
#define flag $68
|
| 78 |
|
|
#define regdec $69
|
| 79 |
|
|
#define link $70
|
| 80 |
|
|
|
| 81 |
|
|
#define code_ptr $71
|
| 82 |
|
|
#define ptr $72
|
| 83 |
|
|
#define inst $73
|
| 84 |
|
|
#define tmp $74
|
| 85 |
|
|
|
| 86 |
|
|
.text
|
| 87 |
|
|
.global __stack_reg_va
|
| 88 |
|
|
.type __stack_reg_va, @function
|
| 89 |
|
|
|
| 90 |
|
|
__stack_reg_va:
|
| 91 |
|
|
|
| 92 |
|
|
/* Save registers 69-74 explicitly so that we have some
|
| 93 |
|
|
* working registers.
|
| 94 |
|
|
*/
|
| 95 |
|
|
stqd $74, 16*(-1)($sp)
|
| 96 |
|
|
stqd $73, 16*(-2)($sp)
|
| 97 |
|
|
stqd $72, 16*(-3)($sp)
|
| 98 |
|
|
stqd $71, 16*(-4)($sp)
|
| 99 |
|
|
stqd $70, 16*(-5)($sp)
|
| 100 |
|
|
stqd $69, 16*(-6)($sp)
|
| 101 |
|
|
|
| 102 |
|
|
/* Construct self-modifying stack code that saves the remaining
|
| 103 |
|
|
* volatile registers onto the stack.
|
| 104 |
|
|
*/
|
| 105 |
|
|
il regdec, -1 /* for decrement register value in save instruction */
|
| 106 |
|
|
shlqbyi regdec, regdec, 12
|
| 107 |
|
|
il tmp, -(SPE_STACK_REGS+2+3)*16
|
| 108 |
|
|
a code_ptr, $sp, tmp
|
| 109 |
|
|
lqr tmp, save_regs_1 /* store stack code */
|
| 110 |
|
|
stqd tmp, 0(code_ptr)
|
| 111 |
|
|
lqr inst, save_regs_2
|
| 112 |
|
|
ai ptr, $sp, 16*(-6)
|
| 113 |
|
|
sync
|
| 114 |
|
|
bisl link, code_ptr /* branch to the constructed stack code */
|
| 115 |
|
|
|
| 116 |
|
|
/* Adjust pointer so that it points to the first variable
|
| 117 |
|
|
* argument on the stack.
|
| 118 |
|
|
*/
|
| 119 |
|
|
ai offset, parms, -1 /* offset = parms - 1 */
|
| 120 |
|
|
mpyi offset, offset, 16 /* offset = offset * 16 */
|
| 121 |
|
|
a ptr, ptr, offset /* ptr = ptr + offset */
|
| 122 |
|
|
|
| 123 |
|
|
/* Store the va_list to the parameter list.
|
| 124 |
|
|
*/
|
| 125 |
|
|
stqd $sp, 16*(-1)(ptr)
|
| 126 |
|
|
stqd ptr, 16*(-2)(ptr)
|
| 127 |
|
|
|
| 128 |
|
|
/* Make $3 store address.
|
| 129 |
|
|
*/
|
| 130 |
|
|
ai offset, parms, 2 /* offset = parms + 2 */
|
| 131 |
|
|
mpyi offset, offset, -16 /* offset = offset * -16 */
|
| 132 |
|
|
a ptr, ptr, offset /* ptr = ptr + offset */
|
| 133 |
|
|
|
| 134 |
|
|
/* Save all the fixed (non-variable arguments on the stack)
|
| 135 |
|
|
*/
|
| 136 |
|
|
ceqi flag, parms, 0x01 /* if(parms==1) flag=0xFFFFFFFF */
|
| 137 |
|
|
brnz flag, reg_3 /* if(flag!=0) jump */
|
| 138 |
|
|
ceqi flag, parms, 0x02 /* if(parms==2) flag=0xFFFFFFFF */
|
| 139 |
|
|
brnz flag, reg_4 /* if(flag!=0) jump */
|
| 140 |
|
|
stqd $5, 16*2(ptr)
|
| 141 |
|
|
reg_4:
|
| 142 |
|
|
stqd $4, 16*1(ptr)
|
| 143 |
|
|
reg_3:
|
| 144 |
|
|
stqd $3, 0(ptr)
|
| 145 |
|
|
|
| 146 |
|
|
il $3, -16*(SPE_STACK_REGS+2+2)
|
| 147 |
|
|
stqx $sp, $3, $sp /* save back chain */
|
| 148 |
|
|
a $sp, $sp, $3
|
| 149 |
|
|
bi $0 /* return to caller */
|
| 150 |
|
|
|
| 151 |
|
|
/***************************** stack code *********************************************/
|
| 152 |
|
|
|
| 153 |
|
|
/* The following code is copied into the stack for re-entract,
|
| 154 |
|
|
* self-modified, code execution. This code copies the volatile
|
| 155 |
|
|
* registers into a va_list parameter array.
|
| 156 |
|
|
*/
|
| 157 |
|
|
.balignl 16, 0
|
| 158 |
|
|
save_regs_1:
|
| 159 |
|
|
stqd inst, 16(code_ptr) /* store instruction */
|
| 160 |
|
|
sync
|
| 161 |
|
|
a inst, inst, regdec /* decrement register number in the instruction */
|
| 162 |
|
|
ceqbi tmp, inst, 3 /* if (reg-num == 3) tmp = 0x000000FF 000..0 */
|
| 163 |
|
|
save_regs_2:
|
| 164 |
|
|
stqd $68, -16(ptr)
|
| 165 |
|
|
ai ptr, ptr, -16
|
| 166 |
|
|
brz tmp, save_regs_1 /* if (tmp == 0) jump */
|
| 167 |
|
|
bi link /* finish to make va_list */
|
| 168 |
|
|
|
| 169 |
|
|
.size __stack_reg_va, .-__stack_reg_va
|
| 170 |
|
|
|
