OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [newlib-1.18.0/] [newlib/] [libc/] [machine/] [xscale/] [memchr.c] - Blame information for rev 207

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 207 jeremybenn
#if defined __thumb__
2
 
3
#include "../../string/memchr.c"
4
 
5
#else
6
 
7
#include <string.h>
8
#include "xscale.h"
9
 
10
void *
11
memchr (const void *start, int c, size_t len)
12
{
13
  const char *str = start;
14
 
15
  if (len == 0)
16
    return 0;
17
 
18
  asm (PRELOADSTR ("%0") : : "r" (start));
19
 
20
  c &= 0xff;
21
 
22
#ifndef __OPTIMIZE_SIZE__
23
  /* Skip unaligned part.  */
24
  if ((long)str & 3)
25
    {
26
      str--;
27
      do
28
        {
29
          if (*++str == c)
30
            return (void *)str;
31
        }
32
      while (((long)str & 3) != 0 && --len > 0);
33
    }
34
 
35
  if (len > 3)
36
    {
37
      unsigned int c2 = c + (c << 8);
38
      c2 += c2 << 16;
39
 
40
      /* Load two constants:
41
         R7 = 0xfefefeff [ == ~(0x80808080 << 1) ]
42
         R6 = 0x80808080  */
43
 
44
      asm (
45
       "mov     r6, #0x80\n\
46
        add     r6, r6, #0x8000\n\
47
        add     r6, r6, r6, lsl #16\n\
48
        mvn     r7, r6, lsl #1\n\
49
\n\
50
0:\n\
51
        cmp     %1, #0x7\n\
52
        bls     1f\n\
53
\n\
54
        ldmia   %0!, { r3, r9 }\n\
55
"       PRELOADSTR ("%0") "\n\
56
        sub     %1, %1, #8\n\
57
        eor     r3, r3, %2\n\
58
        eor     r9, r9, %2\n\
59
        add     r2, r3, r7\n\
60
        add     r8, r9, r7\n\
61
        bic     r2, r2, r3\n\
62
        bic     r8, r8, r9\n\
63
        and     r1, r2, r6\n\
64
        and     r9, r8, r6\n\
65
        orrs    r1, r1, r9\n\
66
        beq     0b\n\
67
\n\
68
        add     %1, %1, #8\n\
69
        sub     %0, %0, #8\n\
70
1:\n\
71
        cmp     %1, #0x3\n\
72
        bls     2f\n\
73
\n\
74
        ldr     r3, [%0], #4\n\
75
"       PRELOADSTR ("%0") "\n\
76
        sub     %1, %1, #4\n\
77
        eor     r3, r3, %2\n\
78
        add     r2, r3, r7\n\
79
        bic     r2, r2, r3\n\
80
        ands    r1, r2, r6\n\
81
        beq     1b\n\
82
\n\
83
        sub     %0, %0, #4\n\
84
        add     %1, %1, #4\n\
85
2:\n\
86
"
87
       : "=&r" (str), "=&r" (len)
88
       : "r" (c2), "0" (str), "1" (len)
89
       : "r1", "r2", "r3", "r6", "r7", "r8", "r9", "cc");
90
    }
91
#endif
92
 
93
  while (len-- > 0)
94
    {
95
      if (*str == c)
96
        return (void *)str;
97
      str++;
98
    }
99
 
100
  return 0;
101
}
102
#endif

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.