OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [newlib-1.18.0/] [newlib/] [libm/] [machine/] [spu/] [headers/] [fmodf.h] - Blame information for rev 207

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 207 jeremybenn
/*
2
  (C) Copyright 2001,2006,
3
  International Business Machines Corporation,
4
  Sony Computer Entertainment, Incorporated,
5
  Toshiba Corporation,
6
 
7
  All rights reserved.
8
 
9
  Redistribution and use in source and binary forms, with or without
10
  modification, are permitted provided that the following conditions are met:
11
 
12
    * Redistributions of source code must retain the above copyright notice,
13
  this list of conditions and the following disclaimer.
14
    * Redistributions in binary form must reproduce the above copyright
15
  notice, this list of conditions and the following disclaimer in the
16
  documentation and/or other materials provided with the distribution.
17
    * Neither the names of the copyright holders nor the names of their
18
  contributors may be used to endorse or promote products derived from this
19
  software without specific prior written permission.
20
 
21
  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
22
  IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23
  TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
24
  PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
25
  OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
26
  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
27
  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
28
  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
29
  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
30
  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
31
  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32
*/
33
#ifndef _FMODF_H_
34
#define _FMODF_H_       1
35
 
36
#include <errno.h>
37
#include <spu_intrinsics.h>
38
#include "headers/vec_literal.h"
39
 
40
#include "fabsf.h"
41
 
42
/*
43
 * FUNCTION
44
 *      float _fmodf(float x, float y)
45
 *
46
 * DESCRIPTION
47
 *      The _fmodf subroutine computes the remainder of
48
 *      dividing x by y. The return value is x - n*y, where n is
49
 *      the quotient of x/y, rounded towards zero.
50
 *
51
 *      The full range form (default) provides fmod computation on
52
 *      all IEEE floating point values (excluding floating overflow
53
 *      or underflow).
54
 *
55
 *      The limited range form (selected by defining FMODF_INTEGER_RANGE)
56
 *      compute fmod of all floating-point x/y values in the 32-bit
57
 *      signed integer range. Values outside this range get clamped.
58
 */
59
 
60
static __inline float _fmodf(float x, float y)
61
{
62
#ifdef FMODF_INTEGER_RANGE
63
  /* 32-BIT INTEGER DYNAMIC RANGE
64
   */
65
  float abs_y;
66
  float quotient;
67
 
68
  abs_y = _fabsf(y);
69
  quotient = x/abs_y;
70
 
71
  return (abs_y*(quotient - ((float)((int)quotient))));
72
 
73
#else /* !FMODF_INTEGER_RANGE */
74
  /* FULL FLOATING-POINT RANGE
75
   */
76
  int n;
77
  vec_uint4 vx, vy, z;
78
  vec_uint4 abs_x, abs_y;
79
  vec_uint4 exp_x, exp_y;
80
  vec_uint4 zero_x, zero_y;
81
  vec_uint4 logb_x, logb_y;
82
  vec_uint4 mant_x, mant_y;
83
  vec_uint4 result, result0, resultx, cnt, sign;
84
  vec_uint4 sign_mask = VEC_SPLAT_U32(0x80000000);
85
  vec_uint4 implied_1 = VEC_SPLAT_U32(0x00800000);
86
  vec_uint4 mant_mask = VEC_SPLAT_U32(0x007FFFFF);
87
  vec_uint4 domain;
88
  vec_int4 verrno;
89
  vec_float4 vc = { 0.0, 0.0, 0.0, 0.0 };
90
  vec_int4 fail = { EDOM, EDOM, EDOM, EDOM };
91
 
92
  vx = (vec_uint4)spu_promote(x, 0);
93
  vy = (vec_uint4)spu_promote(y, 0);
94
 
95
  abs_x = spu_andc(vx, sign_mask);
96
  abs_y = spu_andc(vy, sign_mask);
97
 
98
  sign = spu_and(vx, sign_mask);
99
 
100
  /* Determine ilogb of abs_x and abs_y and
101
   * extract the mantissas (mant_x, mant_y)
102
   */
103
  exp_x  = spu_rlmask(abs_x, -23);
104
  exp_y  = spu_rlmask(abs_y, -23);
105
 
106
  resultx = spu_cmpgt(abs_y, abs_x);
107
 
108
  zero_x = spu_cmpeq(exp_x, 0);
109
  zero_y = spu_cmpeq(exp_y, 0);
110
 
111
  logb_x = spu_add(exp_x, -127);
112
  logb_y = spu_add(exp_y, -127);
113
 
114
  mant_x = spu_andc(spu_sel(implied_1, abs_x, mant_mask), zero_x);
115
  mant_y = spu_andc(spu_sel(implied_1, abs_y, mant_mask), zero_y);
116
 
117
  /* Compute fixed point fmod of mant_x and mant_y. Set the flag,
118
   * result0, to all ones if we detect that the final result is
119
   * ever 0.
120
   */
121
  result0 = spu_or(zero_x, zero_y);
122
 
123
  n = spu_extract(spu_sub(logb_x, logb_y), 0);
124
 
125
  while (n-- > 0) {
126
    z = spu_sub(mant_x, mant_y);
127
 
128
    result0 = spu_or(spu_cmpeq(z, 0), result0);
129
 
130
    mant_x = spu_sel(spu_add(mant_x, mant_x), spu_add(z, z),
131
                     spu_cmpgt((vec_int4)z, -1));
132
  }
133
 
134
  z = spu_sub(mant_x, mant_y);
135
  mant_x = spu_sel(mant_x, z, spu_cmpgt((vec_int4)z, -1));
136
 
137
  result0 = spu_or(spu_cmpeq(mant_x, 0), result0);
138
 
139
  /* Convert the result back to floating point and restore
140
   * the sign. If we flagged the result to be zero (result0),
141
   * zero it. If we flagged the result to equal its input x,
142
   * (resultx) then return x.
143
   */
144
  cnt = spu_add(spu_cntlz(mant_x), -8);
145
 
146
  mant_x = spu_rl(spu_andc(mant_x, implied_1), (vec_int4)cnt);
147
 
148
  exp_y = spu_sub(exp_y, cnt);
149
  result0 = spu_orc(result0, spu_cmpgt((vec_int4)exp_y, 0)); /* zero denorm results */
150
  exp_y = spu_rl(exp_y, 23);
151
 
152
 
153
  result = spu_sel(exp_y, spu_or(sign, mant_x), VEC_SPLAT_U32(0x807FFFFF));
154
 
155
  result = spu_sel(spu_andc(result, spu_rlmask(result0, -1)), vx,
156
                   resultx);
157
 
158
#ifndef _IEEE_LIBM
159
  /*
160
   * If y is zero, set errno to EDOM
161
   */
162
  domain = spu_cmpeq(vc, (vec_float4) vy);
163
  verrno = spu_splats(errno);
164
  errno = spu_extract(spu_sel(verrno, fail, (vector unsigned int) domain), 0);
165
#endif
166
 
167
  return (spu_extract((vec_float4)result, 0));
168
#endif /* FMODF_INTEGER_RANGE */
169
}
170
#endif /* _FMODF_H_ */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.