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[/] [openrisc/] [trunk/] [gnu-stable/] [binutils-2.20.1/] [cpu/] [ChangeLog] - Blame information for rev 818

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Line No. Rev Author Line
1 205 julius
2009-07-16  Doug Evans  
2
 
3
        * cpu/simplify.inc (*): One line doc strings don't need \n.
4
        (df): Invoke define-full-ifield instead of claiming it's an alias.
5
        (dno): Define.
6
        (dnop): Mark as deprecated.
7
 
8
2009-06-22  Alan Modra  
9
 
10
        * m32c.opc (parse_lab_5_3): Use correct enum.
11
 
12
2009-01-07  Hans-Peter Nilsson  
13
 
14
        * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
15
        (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
16
        (media-arith-sat-semantics): Explicitly sign- or zero-extend
17
        arguments of "operation" to DI using "mode" and the new pmacros.
18
 
19
2009-01-03  Hans-Peter Nilsson  
20
 
21
        * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
22
        of number 2, PID.
23
 
24
2008-12-23  Jon Beniston 
25
 
26
        * lm32.cpu: New file.
27
        * lm32.opc: New file.
28
 
29
2008-01-29  Alan Modra  
30
 
31
        * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
32
        to source.
33
 
34
2007-10-22  Hans-Peter Nilsson  
35
 
36
        * cris.cpu (movs, movu): Use result of extension operation when
37
        updating flags.
38
 
39
2007-07-04  Nick Clifton  
40
 
41
        * cris.cpu: Update copyright notice to refer to GPLv3.
42
        * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
43
        m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
44
        sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
45
        xc16x.opc: Likewise.
46
        * iq2000.cpu: Fix copyright notice to refer to FSF.
47
 
48
2007-04-30  Mark Salter  
49
 
50
        * frv.cpu (spr-names): Support new coprocessor SPR registers.
51
 
52
2007-04-20  Nick Clifton  
53
 
54
        * xc16x.cpu: Restore after accidentally overwriting this file with
55
        xc16x.opc.
56
 
57
2007-03-29  DJ Delorie  
58
 
59
        * m32c.cpu (Imm-8-s4n): Fix print hook.
60
        (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
61
        (arith-jnz-imm4-dst-defn): Make relaxable.
62
        (arith-jnz16-imm4-dst-defn): Fix encodings.
63
 
64
2007-03-20  DJ Delorie  
65
 
66
        * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
67
        mem20): New.
68
        (src16-16-20-An-relative-*): New.
69
        (dst16-*-20-An-relative-*): New.
70
        (dst16-16-16sa-*): New
71
        (dst16-16-16ar-*): New
72
        (dst32-16-16sa-Unprefixed-*): New
73
        (jsri): Fix operands.
74
        (setzx): Fix encoding.
75
 
76
2007-03-08  Alan Modra  
77
 
78
        * m32r.opc: Formatting.
79
 
80
2006-05-22  Nick Clifton  
81
 
82
        * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
83
 
84
2006-04-10  DJ Delorie  
85
 
86
        * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
87
        decides if this function accepts symbolic constants or not.
88
        (parse_signed_bitbase): Likewise.
89
        (parse_unsigned_bitbase8): Pass the new parameter.
90
        (parse_unsigned_bitbase11): Likewise.
91
        (parse_unsigned_bitbase16): Likewise.
92
        (parse_unsigned_bitbase19): Likewise.
93
        (parse_unsigned_bitbase27): Likewise.
94
        (parse_signed_bitbase8): Likewise.
95
        (parse_signed_bitbase11): Likewise.
96
        (parse_signed_bitbase19): Likewise.
97
 
98
2006-03-13  DJ Delorie  
99
 
100
        * m32c.cpu (Bit3-S): New.
101
        (btst:s): New.
102
        * m32c.opc (parse_bit3_S): New.
103
 
104
        * m32c.cpu (decimal-subtraction16-insn): Add second operand.
105
        (btst): Add optional :G suffix for MACH32.
106
        (or.b:S): New.
107
        (pop.w:G): Add optional :G suffix for MACH16.
108
        (push.b.imm): Fix syntax.
109
 
110
2006-03-10  DJ Delorie  
111
 
112
        * m32c.cpu (mul.l): New.
113
        (mulu.l): New.
114
 
115
2006-03-03 Shrirang Khisti 
116
 
117
        * xc16x.opc (parse_hash): Return NULL if the input was parsed or
118
        an error message otherwise.
119
        (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
120
        Fix up comments to correctly describe the functions.
121
 
122
2006-02-24  DJ Delorie  
123
 
124
        * m32c.cpu (RL_TYPE): New attribute, with macros.
125
        (Lab-8-24): Add RELAX.
126
        (unary-insn-defn-g, binary-arith-imm-dst-defn,
127
        binary-arith-imm4-dst-defn): Add 1ADDR attribute.
128
        (binary-arith-src-dst-defn): Add 2ADDR attribute.
129
        (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
130
        jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
131
        attribute.
132
        (jsri16, jsri32): Add 1ADDR attribute.
133
        (jsr32.w, jsr32.a): Add JUMP attribute.
134
 
135
2006-02-17  Shrirang Khisti  
136
            Anil Paranjape   
137
            Shilin Shakti    
138
 
139
        * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
140
        description.
141
        * xc16x.opc: New file containing supporting XC16C routines.
142
 
143
2006-02-10  Nick Clifton  
144
 
145
        * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
146
 
147
2006-01-06  DJ Delorie  
148
 
149
        * m32c.cpu (mov.w:q): Fix mode.
150
        (push32.b.imm): Likewise, for the comment.
151
 
152
2005-12-16  Nathan Sidwell  
153
 
154
        Second part of ms1 to mt renaming.
155
        * mt.cpu (define-arch, define-isa): Set name to mt.
156
        (define-mach): Adjust.
157
        * mt.opc (CGEN_ASM_HASH): Update.
158
        (mt_asm_hash, mt_cgen_insn_supported): Renamed.
159
        (parse_loopsize, parse_imm16): Adjust.
160
 
161
2005-12-13  DJ Delorie  
162
 
163
        * m32c.cpu (jsri): Fix order so register names aren't treated as
164
        symbols.
165
        (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
166
        indexwd, indexws): Fix encodings.
167
 
168
2005-12-12  Nathan Sidwell  
169
 
170
        * mt.cpu: Rename from ms1.cpu.
171
        * mt.opc: Rename from ms1.opc.
172
 
173
2005-12-06  Hans-Peter Nilsson  
174
 
175
        * cris.cpu (simplecris-common-writable-specregs)
176
        (simplecris-common-readable-specregs): Split from
177
        simplecris-common-specregs.  All users changed.
178
        (cris-implemented-writable-specregs-v0)
179
        (cris-implemented-readable-specregs-v0): Similar from
180
        cris-implemented-specregs-v0.
181
        (cris-implemented-writable-specregs-v3)
182
        (cris-implemented-readable-specregs-v3)
183
        (cris-implemented-writable-specregs-v8)
184
        (cris-implemented-readable-specregs-v8)
185
        (cris-implemented-writable-specregs-v10)
186
        (cris-implemented-readable-specregs-v10)
187
        (cris-implemented-writable-specregs-v32)
188
        (cris-implemented-readable-specregs-v32): Similar.
189
        (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
190
        insns and specializations.
191
 
192
2005-11-08  Nathan Sidwell  
193
 
194
        Add ms2
195
        * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
196
        model.
197
        (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
198
        f-cb2incr, f-rc3): New fields.
199
        (LOOP): New instruction.
200
        (JAL-HAZARD): New hazard.
201
        (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
202
        New operands.
203
        (mul, muli, dbnz, iflush): Enable for ms2
204
        (jal, reti): Has JAL-HAZARD.
205
        (ldctxt, ldfb, stfb): Only ms1.
206
        (fbcb): Only ms1,ms1-003.
207
        (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
208
        fbcbincrs, mfbcbincrs): Enable for ms2.
209
        (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
210
        * ms1.opc (parse_loopsize): New.
211
        (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
212
        (print_pcrel): New.
213
 
214
2005-10-28  Dave Brolley  
215
 
216
        Contribute the following change:
217
        2003-09-24  Dave Brolley  
218
 
219
        * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
220
        CGEN_ATTR_VALUE_TYPE.
221
        * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
222
        Use cgen_bitset_intersect_p.
223
 
224
2005-10-27  DJ Delorie  
225
 
226
        * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
227
        (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
228
        arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
229
        imm operand is needed.
230
        (adjnz, sbjnz): Pass the right operands.
231
        (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
232
        unary-insn): Add -g variants for opcodes that need to support :G.
233
        (not.BW:G, push.BW:G): Call it.
234
        (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
235
        stzx16-imm8-imm8-abs16): Fix operand typos.
236
        * m32c.opc (m32c_asm_hash): Support bnCND.
237
        (parse_signed4n, print_signed4n): New.
238
 
239
2005-10-26  DJ Delorie  
240
 
241
        * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
242
        (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
243
        mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
244
        dsp8[sp] is signed.
245
        (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
246
        (mov.BW:S r0,r1): Fix typo r1l->r1.
247
        (tst): Allow :G suffix.
248
        * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
249
 
250
2005-10-26  Kazuhiro Inaoka 
251
 
252
        * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
253
 
254
2005-10-25  DJ Delorie  
255
 
256
        * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
257
        making one a macro of the other.
258
 
259
2005-10-21  DJ Delorie  
260
 
261
        * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
262
        (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
263
        indexld, indexls): .w variants have `1' bit.
264
        (rot32.b): QI, not SI.
265
        (rot32.w): HI, not SI.
266
        (xchg16): HI for .w variant.
267
 
268
2005-10-19  Nick Clifton  
269
 
270
        * m32r.opc (parse_slo16): Fix bad application of previous patch.
271
 
272
2005-10-18  Andreas Schwab  
273
 
274
        * m32r.opc (parse_slo16): Better version of previous patch.
275
 
276
2005-10-14  Kazuhiro Inaoka 
277
 
278
        * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
279
        size.
280
 
281
2005-07-25  DJ Delorie  
282
 
283
        * m32c.opc (parse_unsigned8): Add %dsp8().
284
        (parse_signed8): Add %hi8().
285
        (parse_unsigned16): Add %dsp16().
286
        (parse_signed16): Add %lo16() and %hi16().
287
        (parse_lab_5_3): Make valuep a bfd_vma *.
288
 
289
2005-07-18  Nick Clifton  
290
 
291
        * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
292
        components.
293
        (f-lab32-jmp-s): Fix insertion sequence.
294
        (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
295
        (Dsp-40-s8): Make parameter be signed.
296
        (Dsp-40-s16): Likewise.
297
        (Dsp-48-s8): Likewise.
298
        (Dsp-48-s16): Likewise.
299
        (Imm-13-u3): Likewise. (Despite its name!)
300
        (BitBase16-16-s8): Make the parameter be unsigned.
301
        (BitBase16-8-u11-S): Likewise.
302
        (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
303
        jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
304
        relaxation.
305
 
306
        * m32c.opc: Fix formatting.
307
        Use safe-ctype.h instead of ctype.h
308
        Move duplicated code sequences into a macro.
309
        Fix compile time warnings about signedness mismatches.
310
        Remove dead code.
311
        (parse_lab_5_3): New parser function.
312
 
313
2005-07-16  Jim Blandy  
314
 
315
        * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
316
        to represent isa sets.
317
 
318
2005-07-15  Jim Blandy  
319
 
320
        * m32c.cpu, m32c.opc: Fix copyright.
321
 
322
2005-07-14  Jim Blandy  
323
 
324
        * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
325
 
326
2005-07-14  Alan Modra  
327
 
328
        * ms1.opc (print_dollarhex): Correct format string.
329
 
330
2005-07-06  Alan Modra  
331
 
332
        * iq2000.cpu: Include from binutils cpu dir.
333
 
334
2005-07-05  Nick Clifton  
335
 
336
        * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
337
        unsigned in order to avoid compile time warnings about sign
338
        conflicts.
339
 
340
        * ms1.opc (parse_*): Likewise.
341
        (parse_imm16): Use a "void *" as it is passed both signed and
342
        unsigned arguments.
343
 
344
2005-07-01  Nick Clifton  
345
 
346
        * frv.opc: Update to ISO C90 function declaration style.
347
        * iq2000.opc: Likewise.
348
        * m32r.opc: Likewise.
349
        * sh.opc: Likewise.
350
 
351
2005-06-15  Dave Brolley  
352
 
353
        Contributed by Red Hat.
354
        * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
355
        * ms1.opc: New file.  Written by Stan Cox.
356
 
357
2005-05-10  Nick Clifton  
358
 
359
        * Update the address and phone number of the FSF organization in
360
        the GPL notices in the following files:
361
        cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
362
        m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
363
        sh64-media.cpu, simplify.inc
364
 
365
2005-02-24  Alan Modra  
366
 
367
        * frv.opc (parse_A): Warning fix.
368
 
369
2005-02-23  Nick Clifton  
370
 
371
        * frv.opc: Fixed compile time warnings about differing signed'ness
372
        of pointers passed to functions.
373
        * m32r.opc: Likewise.
374
 
375
2005-02-11  Nick Clifton  
376
 
377
        * iq2000.opc (parse_jtargq10): Change type of valuep argument to
378
        'bfd_vma *' in order avoid compile time warning message.
379
 
380
2005-01-28  Hans-Peter Nilsson  
381
 
382
        * cris.cpu (mstep): Add missing insn.
383
 
384
2005-01-25  Alexandre Oliva  
385
 
386
        2004-11-10  Alexandre Oliva  
387
        * frv.cpu: Add support for TLS annotations in loads and calll.
388
        * frv.opc (parse_symbolic_address): New.
389
        (parse_ldd_annotation): New.
390
        (parse_call_annotation): New.
391
        (parse_ld_annotation): New.
392
        (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
393
        Introduce TLS relocations.
394
        (parse_d12, parse_s12, parse_u12): Likewise.
395
        (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
396
        (parse_call_label, print_at): New.
397
 
398
2004-12-21  Mikael Starvik  
399
 
400
        * cris.cpu (cris-set-mem): Correct integral write semantics.
401
 
402
2004-11-29  Hans-Peter Nilsson  
403
 
404
        * cris.cpu: New file.
405
 
406
2004-11-15  Michael K. Lechner 
407
 
408
        * iq2000.cpu: Added quotes around macro arguments so that they
409
        will work with newer versions of guile.
410
 
411
2004-10-27  Nick Clifton  
412
 
413
        * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
414
        wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
415
        operand.
416
        * iq2000.cpu (dnop index): Rename to _index to avoid complications
417
        with guile.
418
 
419
2004-08-27  Richard Sandiford  
420
 
421
        * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
422
 
423
2004-05-15  Nick Clifton  
424
 
425
        * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
426
 
427
2004-03-30  Kazuhiro Inaoka  
428
 
429
        * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
430
 
431
2004-03-01  Richard Sandiford  
432
 
433
        * frv.cpu (define-arch frv): Add fr450 mach.
434
        (define-mach fr450): New.
435
        (define-model fr450): New.  Add profile units to every fr450 insn.
436
        (define-attr UNIT): Add MDCUTSSI.
437
        (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
438
        (define-attr AUDIO): New boolean.
439
        (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
440
        (f-LRA-null, f-TLBPR-null): New fields.
441
        (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
442
        (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
443
        (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
444
        (LRA-null, TLBPR-null): New macros.
445
        (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
446
        (load-real-address): New macro.
447
        (lrai, lrad, tlbpr): New instructions.
448
        (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
449
        (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
450
        (mdcutssi): Change UNIT attribute to MDCUTSSI.
451
        (media-low-clear-semantics, media-scope-limit-semantics)
452
        (media-quad-limit, media-quad-shift): New macros.
453
        (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
454
        * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
455
        (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
456
        (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
457
        (fr450_unit_mapping): New array.
458
        (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
459
        for new MDCUTSSI unit.
460
        (fr450_check_insn_major_constraints): New function.
461
        (check_insn_major_constraints): Use it.
462
 
463
2004-03-01  Richard Sandiford  
464
 
465
        * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
466
        (scutss): Change unit to I0.
467
        (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
468
        (mqsaths): Fix FR400-MAJOR categorization.
469
        (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
470
        (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
471
        * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
472
        combinations.
473
 
474
2004-03-01  Richard Sandiford  
475
 
476
        * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
477
        (rstb, rsth, rst, rstd, rstq): Delete.
478
        (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
479
 
480
2004-02-23  Nick Clifton  
481
 
482
        * Apply these patches from Renesas:
483
 
484
        2004-02-10  Kazuhiro Inaoka  
485
 
486
        * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
487
        disassembling codes for 0x*2 addresses.
488
 
489
        2003-12-15  Kazuhiro Inaoka  
490
 
491
        * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
492
 
493
        2003-12-03  Kazuhiro Inaoka  
494
 
495
        * cpu/m32r.cpu : Add new model m32r2.
496
        Add new instructions.
497
        Replace occurrances of 'Mitsubishi' with 'Renesas'.
498
        Changed PIPE attr of push from O to OS.
499
        Care for Little-endian of M32R.
500
        * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
501
        Care for Little-endian of M32R.
502
        (parse_slo16): signed extension for value.
503
 
504
2004-02-20  Andrew Cagney  
505
 
506
        * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
507
        Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
508
 
509
        * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
510
        written by Ben Elliston.
511
 
512
2004-01-14  Richard Sandiford  
513
 
514
        * frv.cpu (UNIT): Add IACC.
515
        (iacc-multiply-r-r): Use it.
516
        * frv.opc (fr400_unit_mapping): Add entry for IACC.
517
        (fr500_unit_mapping, fr550_unit_mapping): Likewise.
518
 
519
2004-01-06  Alexandre Oliva  
520
 
521
        2003-12-19  Alexandre Oliva  
522
        * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
523
        cut&paste errors in shifting/truncating numerical operands.
524
        2003-08-08  Alexandre Oliva  
525
        * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
526
        (parse_uslo16): Likewise.
527
        (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
528
        (parse_d12): Parse gotoff12 and gotofffuncdesc12.
529
        (parse_s12): Likewise.
530
        2003-08-04  Alexandre Oliva  
531
        * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
532
        (parse_uslo16): Likewise.
533
        (parse_uhi16): Parse gothi and gotfuncdeschi.
534
        (parse_d12): Parse got12 and gotfuncdesc12.
535
        (parse_s12): Likewise.
536
 
537
2003-10-10  Dave Brolley  
538
 
539
        * frv.cpu (dnpmop): New p-macro.
540
        (GRdoublek): Use dnpmop.
541
        (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
542
        (store-double-r-r): Use (.sym regtype doublek).
543
        (r-store-double): Ditto.
544
        (store-double-r-r-u): Ditto.
545
        (conditional-store-double): Ditto.
546
        (conditional-store-double-u): Ditto.
547
        (store-double-r-simm): Ditto.
548
        (fmovs): Assign to UNIT FMALL.
549
 
550
2003-10-06  Dave Brolley  
551
 
552
        * frv.cpu, frv.opc: Add support for fr550.
553
 
554
2003-09-24  Dave Brolley  
555
 
556
        * frv.cpu (u-commit): New modelling unit for fr500.
557
        (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
558
        (commit-r): Use u-commit model for fr500.
559
        (commit): Ditto.
560
        (conditional-float-binary-op): Take profiling data as an argument.
561
        Update callers.
562
        (ne-float-binary-op): Ditto.
563
 
564
2003-09-19  Michael Snyder  
565
 
566
        * frv.cpu (nldqi): Delete unimplemented instruction.
567
 
568
2003-09-12  Dave Brolley  
569
 
570
        * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
571
        (clear-ne-flag-r): Pass insn profiling in as an argument. Call
572
        frv_ref_SI to get input register referenced for profiling.
573
        (clear-ne-flag-all): Pass insn profiling in as an argument.
574
        (clrgr,clrfr,clrga,clrfa): Add profiling information.
575
 
576
2003-09-11  Michael Snyder  
577
 
578
        * frv.cpu: Typographical corrections.
579
 
580
2003-09-09  Dave Brolley  
581
 
582
        * frv.cpu (media-dual-complex): Change UNIT to FMALL.
583
        (conditional-media-dual-complex, media-quad-complex): Likewise.
584
 
585
2003-09-04  Dave Brolley  
586
 
587
        * frv.cpu (register-transfer): Pass in all attributes in on argument.
588
        Update all callers.
589
        (conditional-register-transfer): Ditto.
590
        (cache-preload): Ditto.
591
        (floating-point-conversion): Ditto.
592
        (floating-point-neg): Ditto.
593
        (float-abs): Ditto.
594
        (float-binary-op-s): Ditto.
595
        (conditional-float-binary-op): Ditto.
596
        (ne-float-binary-op): Ditto.
597
        (float-dual-arith): Ditto.
598
        (ne-float-dual-arith): Ditto.
599
 
600
2003-09-03  Dave Brolley  
601
 
602
        * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
603
        * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
604
        MCLRACC-1.
605
        (A): Removed operand.
606
        (A0,A1): New operands replace operand A.
607
        (mnop): Now a real insn
608
        (mclracc): Removed insn.
609
        (mclracc-0, mclracc-1): New insns replace mclracc.
610
        (all insns): Use new UNIT attributes.
611
 
612
2003-08-21  Nick Clifton  
613
 
614
        * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
615
        and u-media-dual-btoh with output parameter.
616
        (cmbtoh): Add profiling hack.
617
 
618
2003-08-19  Michael Snyder  
619
 
620
        * frv.cpu: Fix typo, Frintkeven -> FRintkeven
621
 
622
2003-06-10  Doug Evans  
623
 
624
        * frv.cpu: Add IDOC attribute.
625
 
626
2003-06-06  Andrew Cagney  
627
 
628
        Contributed by Red Hat.
629
        * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
630
        Stan Cox, and Frank Ch. Eigler.
631
        * iq2000.opc: New file.  Written by Ben Elliston, Frank
632
        Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
633
        * iq2000m.cpu: New file.  Written by Jeff Johnston.
634
        * iq10.cpu: New file.  Written by Jeff Johnston.
635
 
636
2003-06-05  Nick Clifton  
637
 
638
        * frv.cpu (FRintieven): New operand.  An even-numbered only
639
        version of the FRinti operand.
640
        (FRintjeven): Likewise for FRintj.
641
        (FRintkeven): Likewise for FRintk.
642
        (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
643
        media-quad-arith-sat-semantics, media-quad-arith-sat,
644
        conditional-media-quad-arith-sat, mdunpackh,
645
        media-quad-multiply-semantics, media-quad-multiply,
646
        conditional-media-quad-multiply, media-quad-complex-i,
647
        media-quad-multiply-acc-semantics, media-quad-multiply-acc,
648
        conditional-media-quad-multiply-acc, munpackh,
649
        media-quad-multiply-cross-acc-semantics, mdpackh,
650
        media-quad-multiply-cross-acc, mbtoh-semantics,
651
        media-quad-cross-multiply-cross-acc-semantics,
652
        media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
653
        media-quad-cross-multiply-acc-semantics, cmbtoh,
654
        media-quad-cross-multiply-acc, media-quad-complex, mhtob,
655
        media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
656
        cmhtob): Use new operands.
657
        * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
658
        (parse_even_register): New function.
659
 
660
2003-06-03  Nick Clifton  
661
 
662
        * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
663
        immediate value not unsigned.
664
 
665
2003-06-03  Andrew Cagney  
666
 
667
        Contributed by Red Hat.
668
        * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
669
        and Eric Christopher.
670
        * frv.opc: New file.  Written by Catherine Moore, and Dave
671
        Brolley.
672
        * simplify.inc: New file.  Written by Doug Evans.
673
 
674
2003-05-02  Andrew Cagney  
675
 
676
        * New file.
677
 
678
 
679
Local Variables:
680
mode: change-log
681
left-margin: 8
682
fill-column: 74
683
version-control: never
684
End:

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