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@c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 2002, 2006

@c Free Software Foundation, Inc.

@c This is part of the GAS manual.

@c For copying conditions, see the file as.texinfo.

@ifset GENERIC

@page

@node i960-Dependent

@chapter Intel 80960 Dependent Features

@end ifset

@ifclear GENERIC

@node Machine Dependencies

@chapter Intel 80960 Dependent Features

@end ifclear

@cindex i960 support

@menu

* Options-i960::                i960 Command-line Options

* Floating Point-i960::         Floating Point

* Directives-i960::             i960 Machine Directives

* Opcodes for i960::            i960 Opcodes

@end menu

@c FIXME! Add Syntax sec with discussion of bitfields here, at least so

@c long as they're not turned on for other machines than 960.

@node Options-i960

@section i960 Command-line Options

@cindex i960 options

@cindex options, i960

@table @code

@cindex i960 architecture options

@cindex architecture options, i960

@cindex @code{-A} options, i960

@item -ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC

Select the 80960 architecture.  Instructions or features not supported

by the selected architecture cause fatal errors.

@samp{-ACA} is equivalent to @samp{-ACA_A}; @samp{-AKC} is equivalent to

@samp{-AMC}.  Synonyms are provided for compatibility with other tools.

If you do not specify any of these options, @code{@value{AS}} generates code

for any instruction or feature that is supported by @emph{some} version of the

960 (even if this means mixing architectures!).  In principle,

@code{@value{AS}} attempts to deduce the minimal sufficient processor type if

none is specified; depending on the object code format, the processor type may

be recorded in the object file.  If it is critical that the @code{@value{AS}}

output match a specific architecture, specify that architecture explicitly.

@cindex @code{-b} option, i960

@cindex branch recording, i960

@cindex i960 branch recording

@item -b

Add code to collect information about conditional branches taken, for

later optimization using branch prediction bits.  (The conditional branch

instructions have branch prediction bits in the CA, CB, and CC

architectures.)  If @var{BR} represents a conditional branch instruction,

the following represents the code generated by the assembler when

@samp{-b} is specified:

@smallexample

        call    @var{increment routine}

        .word   0       # pre-counter

Label:  @var{BR}

        call    @var{increment routine}

        .word   0       # post-counter

@end smallexample

The counter following a branch records the number of times that branch

was @emph{not} taken; the difference between the two counters is the

number of times the branch @emph{was} taken.

@cindex @code{gbr960}, i960 postprocessor

@cindex branch statistics table, i960

A table of every such @code{Label} is also generated, so that the

external postprocessor @code{gbr960} (supplied by Intel) can locate all

the counters.  This table is always labeled @samp{__BRANCH_TABLE__};

this is a local symbol to permit collecting statistics for many separate

object files.  The table is word aligned, and begins with a two-word

header.  The first word, initialized to 0, is used in maintaining linked

lists of branch tables.  The second word is a count of the number of

entries in the table, which follow immediately: each is a word, pointing

to one of the labels illustrated above.

@c TEXI2ROFF-KILL

@ifinfo

@c END TEXI2ROFF-KILL

@example

 +------------+------------+------------+ ... +------------+

 |            |            |            |     |            |

 |  *NEXT     |  COUNT: N  | *BRLAB 1   |     | *BRLAB N   |

 |            |            |            |     |            |

 +------------+------------+------------+ ... +------------+

               __BRANCH_TABLE__ layout

@end example

@c TEXI2ROFF-KILL

@end ifinfo

@need 2000

@tex

\vskip 1pc

\line{\leftskip=0pt\hskip\tableindent

\boxit{2cm}{\tt *NEXT}\boxit{2cm}{\tt COUNT: \it N}\boxit{2cm}{\tt

*BRLAB 1}\ibox{1cm}{\quad\dots}\boxit{2cm}{\tt *BRLAB \it N}\hfil}

\centerline{\it {\tt \_\_BRANCH\_TABLE\_\_} layout}

@end tex

@c END TEXI2ROFF-KILL

The first word of the header is used to locate multiple branch tables,

since each object file may contain one. Normally the links are

maintained with a call to an initialization routine, placed at the

beginning of each function in the file.  The @sc{gnu} C compiler

generates these calls automatically when you give it a @samp{-b} option.

For further details, see the documentation of @samp{gbr960}.

@cindex @code{-no-relax} option, i960

@item -no-relax

Normally, Compare-and-Branch instructions with targets that require

displacements greater than 13 bits (or that have external targets) are

replaced with the corresponding compare (or @samp{chkbit}) and branch

instructions.  You can use the @samp{-no-relax} option to specify that

@code{@value{AS}} should generate errors instead, if the target displacement

is larger than 13 bits.

This option does not affect the Compare-and-Jump instructions; the code

emitted for them is @emph{always} adjusted when necessary (depending on

displacement size), regardless of whether you use @samp{-no-relax}.

@end table

@node Floating Point-i960

@section Floating Point

@cindex floating point, i960 (@sc{ieee})

@cindex i960 floating point (@sc{ieee})

@code{@value{AS}} generates @sc{ieee} floating-point numbers for the directives

@samp{.float}, @samp{.double}, @samp{.extended}, and @samp{.single}.

@node Directives-i960

@section i960 Machine Directives

@cindex machine directives, i960

@cindex i960 machine directives

@table @code

@cindex @code{bss} directive, i960

@item .bss @var{symbol}, @var{length}, @var{align}

Reserve @var{length} bytes in the bss section for a local @var{symbol},

aligned to the power of two specified by @var{align}.  @var{length} and

@var{align} must be positive absolute expressions.  This directive

differs from @samp{.lcomm} only in that it permits you to specify

an alignment.  @xref{Lcomm,,@code{.lcomm}}.

@end table

@table @code

@cindex @code{extended} directive, i960

@item .extended @var{flonums}

@code{.extended} expects zero or more flonums, separated by commas; for

each flonum, @samp{.extended} emits an @sc{ieee} extended-format (80-bit)

floating-point number.

@cindex @code{leafproc} directive, i960

@item .leafproc @var{call-lab}, @var{bal-lab}

You can use the @samp{.leafproc} directive in conjunction with the

optimized @code{callj} instruction to enable faster calls of leaf

procedures.  If a procedure is known to call no other procedures, you

may define an entry point that skips procedure prolog code (and that does

not depend on system-supplied saved context), and declare it as the

@var{bal-lab} using @samp{.leafproc}.  If the procedure also has an

entry point that goes through the normal prolog, you can specify that

entry point as @var{call-lab}.

A @samp{.leafproc} declaration is meant for use in conjunction with the

optimized call instruction @samp{callj}; the directive records the data

needed later to choose between converting the @samp{callj} into a

@code{bal} or a @code{call}.

@var{call-lab} is optional; if only one argument is present, or if the

two arguments are identical, the single argument is assumed to be the

@code{bal} entry point.

@cindex @code{sysproc} directive, i960

@item .sysproc @var{name}, @var{index}

The @samp{.sysproc} directive defines a name for a system procedure.

After you define it using @samp{.sysproc}, you can use @var{name} to

refer to the system procedure identified by @var{index} when calling

procedures with the optimized call instruction @samp{callj}.

Both arguments are required; @var{index} must be between 0 and 31

(inclusive).

@end table

@node Opcodes for i960

@section i960 Opcodes

@cindex opcodes, i960

@cindex i960 opcodes

All Intel 960 machine instructions are supported;

@pxref{Options-i960,,i960 Command-line Options} for a discussion of

selecting the instruction subset for a particular 960

architecture.@refill

Some opcodes are processed beyond simply emitting a single corresponding

instruction: @samp{callj}, and Compare-and-Branch or Compare-and-Jump

instructions with target displacements larger than 13 bits.

@menu

* callj-i960::                  @code{callj}

* Compare-and-branch-i960::     Compare-and-Branch

@end menu

@node callj-i960

@subsection @code{callj}

@cindex @code{callj}, i960 pseudo-opcode

@cindex i960 @code{callj} pseudo-opcode

You can write @code{callj} to have the assembler or the linker determine

the most appropriate form of subroutine call: @samp{call},

@samp{bal}, or @samp{calls}.  If the assembly source contains

enough information---a @samp{.leafproc} or @samp{.sysproc} directive

defining the operand---then @code{@value{AS}} translates the

@code{callj}; if not, it simply emits the @code{callj}, leaving it

for the linker to resolve.

@node Compare-and-branch-i960

@subsection Compare-and-Branch

@cindex i960 compare/branch instructions

@cindex compare/branch instructions, i960

The 960 architectures provide combined Compare-and-Branch instructions

that permit you to store the branch target in the lower 13 bits of the

instruction word itself.  However, if you specify a branch target far

enough away that its address won't fit in 13 bits, the assembler can

either issue an error, or convert your Compare-and-Branch instruction

into separate instructions to do the compare and the branch.

@cindex compare and jump expansions, i960

@cindex i960 compare and jump expansions

Whether @code{@value{AS}} gives an error or expands the instruction depends

on two choices you can make: whether you use the @samp{-no-relax} option,

and whether you use a ``Compare and Branch'' instruction or a ``Compare

and Jump'' instruction.  The ``Jump'' instructions are @emph{always}

expanded if necessary; the ``Branch'' instructions are expanded when

necessary @emph{unless} you specify @code{-no-relax}---in which case

@code{@value{AS}} gives an error instead.

These are the Compare-and-Branch instructions, their ``Jump'' variants,

and the instruction pairs they may expand into:

@c TEXI2ROFF-KILL

@ifinfo

@c END TEXI2ROFF-KILL

@example

        Compare and

     Branch      Jump       Expanded to

     ------    ------       ------------

        bbc                 chkbit; bno

        bbs                 chkbit; bo

     cmpibe    cmpije       cmpi; be

     cmpibg    cmpijg       cmpi; bg

    cmpibge   cmpijge       cmpi; bge

     cmpibl    cmpijl       cmpi; bl

    cmpible   cmpijle       cmpi; ble

    cmpibno   cmpijno       cmpi; bno

    cmpibne   cmpijne       cmpi; bne

     cmpibo    cmpijo       cmpi; bo

     cmpobe    cmpoje       cmpo; be

     cmpobg    cmpojg       cmpo; bg

    cmpobge   cmpojge       cmpo; bge

     cmpobl    cmpojl       cmpo; bl

    cmpoble   cmpojle       cmpo; ble

    cmpobne   cmpojne       cmpo; bne

@end example

@c TEXI2ROFF-KILL

@end ifinfo

@tex

\hskip\tableindent

\halign{\hfil {\tt #}\quad&\hfil {\tt #}\qquad&{\tt #}\hfil\cr

\omit{\hfil\it Compare and\hfil}\span\omit&\cr

{\it Branch}&{\it Jump}&{\it Expanded to}\cr

        bbc&                 & chkbit; bno\cr

        bbs&                 & chkbit; bo\cr

     cmpibe&    cmpije&       cmpi; be\cr

     cmpibg&    cmpijg&       cmpi; bg\cr

    cmpibge&   cmpijge&       cmpi; bge\cr

     cmpibl&    cmpijl&       cmpi; bl\cr

    cmpible&   cmpijle&       cmpi; ble\cr

    cmpibno&   cmpijno&       cmpi; bno\cr

    cmpibne&   cmpijne&       cmpi; bne\cr

     cmpibo&    cmpijo&       cmpi; bo\cr

     cmpobe&    cmpoje&       cmpo; be\cr

     cmpobg&    cmpojg&       cmpo; bg\cr

    cmpobge&   cmpojge&       cmpo; bge\cr

     cmpobl&    cmpojl&       cmpo; bl\cr

    cmpoble&   cmpojle&       cmpo; ble\cr

    cmpobne&   cmpojne&       cmpo; bne\cr}

@end tex

@c END TEXI2ROFF-KILL